1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Samsung EXYNOS FIMC-LITE (camera host interface) driver 4* 5 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd. 6 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> 7 */ 8#define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__ 9 10#include <linux/bug.h> 11#include <linux/clk.h> 12#include <linux/device.h> 13#include <linux/errno.h> 14#include <linux/interrupt.h> 15#include <linux/kernel.h> 16#include <linux/list.h> 17#include <linux/module.h> 18#include <linux/of.h> 19#include <linux/types.h> 20#include <linux/platform_device.h> 21#include <linux/pm_runtime.h> 22#include <linux/slab.h> 23#include <linux/videodev2.h> 24 25#include <media/v4l2-device.h> 26#include <media/v4l2-ioctl.h> 27#include <media/v4l2-mem2mem.h> 28#include <media/v4l2-rect.h> 29#include <media/videobuf2-v4l2.h> 30#include <media/videobuf2-dma-contig.h> 31#include <media/drv-intf/exynos-fimc.h> 32 33#include "common.h" 34#include "fimc-core.h" 35#include "fimc-lite.h" 36#include "fimc-lite-reg.h" 37 38static int debug; 39module_param(debug, int, 0644); 40 41static const struct fimc_fmt fimc_lite_formats[] = { 42 { 43 .fourcc = V4L2_PIX_FMT_YUYV, 44 .colorspace = V4L2_COLORSPACE_JPEG, 45 .depth = { 16 }, 46 .color = FIMC_FMT_YCBYCR422, 47 .memplanes = 1, 48 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 49 .flags = FMT_FLAGS_YUV, 50 }, { 51 .fourcc = V4L2_PIX_FMT_UYVY, 52 .colorspace = V4L2_COLORSPACE_JPEG, 53 .depth = { 16 }, 54 .color = FIMC_FMT_CBYCRY422, 55 .memplanes = 1, 56 .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, 57 .flags = FMT_FLAGS_YUV, 58 }, { 59 .fourcc = V4L2_PIX_FMT_VYUY, 60 .colorspace = V4L2_COLORSPACE_JPEG, 61 .depth = { 16 }, 62 .color = FIMC_FMT_CRYCBY422, 63 .memplanes = 1, 64 .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, 65 .flags = FMT_FLAGS_YUV, 66 }, { 67 .fourcc = V4L2_PIX_FMT_YVYU, 68 .colorspace = V4L2_COLORSPACE_JPEG, 69 .depth = { 16 }, 70 .color = FIMC_FMT_YCRYCB422, 71 .memplanes = 1, 72 .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, 73 .flags = FMT_FLAGS_YUV, 74 }, { 75 .fourcc = V4L2_PIX_FMT_SGRBG8, 76 .colorspace = V4L2_COLORSPACE_SRGB, 77 .depth = { 8 }, 78 .color = FIMC_FMT_RAW8, 79 .memplanes = 1, 80 .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, 81 .flags = FMT_FLAGS_RAW_BAYER, 82 }, { 83 .fourcc = V4L2_PIX_FMT_SGRBG10, 84 .colorspace = V4L2_COLORSPACE_SRGB, 85 .depth = { 16 }, 86 .color = FIMC_FMT_RAW10, 87 .memplanes = 1, 88 .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, 89 .flags = FMT_FLAGS_RAW_BAYER, 90 }, { 91 .fourcc = V4L2_PIX_FMT_SGRBG12, 92 .colorspace = V4L2_COLORSPACE_SRGB, 93 .depth = { 16 }, 94 .color = FIMC_FMT_RAW12, 95 .memplanes = 1, 96 .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, 97 .flags = FMT_FLAGS_RAW_BAYER, 98 }, 99}; 100 101/** 102 * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code 103 * @pixelformat: fourcc to match, ignored if null 104 * @mbus_code: media bus code to match, ignored if null 105 * @mask: the color format flags to match 106 * @index: index to the fimc_lite_formats array, ignored if negative 107 */ 108static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat, 109 const u32 *mbus_code, unsigned int mask, int index) 110{ 111 const struct fimc_fmt *fmt, *def_fmt = NULL; 112 unsigned int i; 113 int id = 0; 114 115 if (index >= (int)ARRAY_SIZE(fimc_lite_formats)) 116 return NULL; 117 118 for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) { 119 fmt = &fimc_lite_formats[i]; 120 if (mask && !(fmt->flags & mask)) 121 continue; 122 if (pixelformat && fmt->fourcc == *pixelformat) 123 return fmt; 124 if (mbus_code && fmt->mbus_code == *mbus_code) 125 return fmt; 126 if (index == id) 127 def_fmt = fmt; 128 id++; 129 } 130 return def_fmt; 131} 132 133static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output) 134{ 135 struct fimc_source_info *si; 136 unsigned long flags; 137 138 if (fimc->sensor == NULL) 139 return -ENXIO; 140 141 if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL) 142 return -EINVAL; 143 144 /* Get sensor configuration data from the sensor subdev */ 145 si = v4l2_get_subdev_hostdata(fimc->sensor); 146 if (!si) 147 return -EINVAL; 148 149 spin_lock_irqsave(&fimc->slock, flags); 150 151 flite_hw_set_camera_bus(fimc, si); 152 flite_hw_set_source_format(fimc, &fimc->inp_frame); 153 flite_hw_set_window_offset(fimc, &fimc->inp_frame); 154 flite_hw_set_dma_buf_mask(fimc, 0); 155 flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output); 156 flite_hw_set_interrupt_mask(fimc); 157 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val); 158 159 if (debug > 0) 160 flite_hw_dump_regs(fimc, __func__); 161 162 spin_unlock_irqrestore(&fimc->slock, flags); 163 return 0; 164} 165 166/* 167 * Reinitialize the driver so it is ready to start the streaming again. 168 * Set fimc->state to indicate stream off and the hardware shut down state. 169 * If not suspending (@suspend is false), return any buffers to videobuf2. 170 * Otherwise put any owned buffers onto the pending buffers queue, so they 171 * can be re-spun when the device is being resumed. Also perform FIMC 172 * software reset and disable streaming on the whole pipeline if required. 173 */ 174static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend) 175{ 176 struct flite_buffer *buf; 177 unsigned long flags; 178 bool streaming; 179 180 spin_lock_irqsave(&fimc->slock, flags); 181 streaming = fimc->state & (1 << ST_SENSOR_STREAM); 182 183 fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF | 184 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM); 185 if (suspend) 186 fimc->state |= (1 << ST_FLITE_SUSPENDED); 187 else 188 fimc->state &= ~(1 << ST_FLITE_PENDING | 189 1 << ST_FLITE_SUSPENDED); 190 191 /* Release unused buffers */ 192 while (!suspend && !list_empty(&fimc->pending_buf_q)) { 193 buf = fimc_lite_pending_queue_pop(fimc); 194 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); 195 } 196 /* If suspending put unused buffers onto pending queue */ 197 while (!list_empty(&fimc->active_buf_q)) { 198 buf = fimc_lite_active_queue_pop(fimc); 199 if (suspend) 200 fimc_lite_pending_queue_add(fimc, buf); 201 else 202 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); 203 } 204 205 spin_unlock_irqrestore(&fimc->slock, flags); 206 207 flite_hw_reset(fimc); 208 209 if (!streaming) 210 return 0; 211 212 return fimc_pipeline_call(&fimc->ve, set_stream, 0); 213} 214 215static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend) 216{ 217 unsigned long flags; 218 219 if (!fimc_lite_active(fimc)) 220 return 0; 221 222 spin_lock_irqsave(&fimc->slock, flags); 223 set_bit(ST_FLITE_OFF, &fimc->state); 224 flite_hw_capture_stop(fimc); 225 spin_unlock_irqrestore(&fimc->slock, flags); 226 227 wait_event_timeout(fimc->irq_queue, 228 !test_bit(ST_FLITE_OFF, &fimc->state), 229 (2*HZ/10)); /* 200 ms */ 230 231 return fimc_lite_reinit(fimc, suspend); 232} 233 234/* Must be called with fimc.slock spinlock held. */ 235static void fimc_lite_config_update(struct fimc_lite *fimc) 236{ 237 flite_hw_set_window_offset(fimc, &fimc->inp_frame); 238 flite_hw_set_dma_window(fimc, &fimc->out_frame); 239 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val); 240 clear_bit(ST_FLITE_CONFIG, &fimc->state); 241} 242 243static irqreturn_t flite_irq_handler(int irq, void *priv) 244{ 245 struct fimc_lite *fimc = priv; 246 struct flite_buffer *vbuf; 247 unsigned long flags; 248 u32 intsrc; 249 250 spin_lock_irqsave(&fimc->slock, flags); 251 252 intsrc = flite_hw_get_interrupt_source(fimc); 253 flite_hw_clear_pending_irq(fimc); 254 255 if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) { 256 wake_up(&fimc->irq_queue); 257 goto done; 258 } 259 260 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) { 261 clear_bit(ST_FLITE_RUN, &fimc->state); 262 fimc->events.data_overflow++; 263 } 264 265 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) { 266 flite_hw_clear_last_capture_end(fimc); 267 clear_bit(ST_FLITE_STREAM, &fimc->state); 268 wake_up(&fimc->irq_queue); 269 } 270 271 if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) 272 goto done; 273 274 if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) && 275 test_bit(ST_FLITE_RUN, &fimc->state) && 276 !list_empty(&fimc->pending_buf_q)) { 277 vbuf = fimc_lite_pending_queue_pop(fimc); 278 flite_hw_set_dma_buffer(fimc, vbuf); 279 fimc_lite_active_queue_add(fimc, vbuf); 280 } 281 282 if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMEND) && 283 test_bit(ST_FLITE_RUN, &fimc->state) && 284 !list_empty(&fimc->active_buf_q)) { 285 vbuf = fimc_lite_active_queue_pop(fimc); 286 vbuf->vb.vb2_buf.timestamp = ktime_get_ns(); 287 vbuf->vb.sequence = fimc->frame_count++; 288 flite_hw_mask_dma_buffer(fimc, vbuf->index); 289 vb2_buffer_done(&vbuf->vb.vb2_buf, VB2_BUF_STATE_DONE); 290 } 291 292 if (test_bit(ST_FLITE_CONFIG, &fimc->state)) 293 fimc_lite_config_update(fimc); 294 295 if (list_empty(&fimc->pending_buf_q)) { 296 flite_hw_capture_stop(fimc); 297 clear_bit(ST_FLITE_STREAM, &fimc->state); 298 } 299done: 300 set_bit(ST_FLITE_RUN, &fimc->state); 301 spin_unlock_irqrestore(&fimc->slock, flags); 302 return IRQ_HANDLED; 303} 304 305static int start_streaming(struct vb2_queue *q, unsigned int count) 306{ 307 struct fimc_lite *fimc = q->drv_priv; 308 unsigned long flags; 309 int ret; 310 311 spin_lock_irqsave(&fimc->slock, flags); 312 313 fimc->buf_index = 0; 314 fimc->frame_count = 0; 315 316 spin_unlock_irqrestore(&fimc->slock, flags); 317 318 ret = fimc_lite_hw_init(fimc, false); 319 if (ret) { 320 fimc_lite_reinit(fimc, false); 321 return ret; 322 } 323 324 set_bit(ST_FLITE_PENDING, &fimc->state); 325 326 if (!list_empty(&fimc->active_buf_q) && 327 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) { 328 flite_hw_capture_start(fimc); 329 330 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state)) 331 fimc_pipeline_call(&fimc->ve, set_stream, 1); 332 } 333 if (debug > 0) 334 flite_hw_dump_regs(fimc, __func__); 335 336 return 0; 337} 338 339static void stop_streaming(struct vb2_queue *q) 340{ 341 struct fimc_lite *fimc = q->drv_priv; 342 343 if (!fimc_lite_active(fimc)) 344 return; 345 346 fimc_lite_stop_capture(fimc, false); 347} 348 349static int queue_setup(struct vb2_queue *vq, 350 unsigned int *num_buffers, unsigned int *num_planes, 351 unsigned int sizes[], struct device *alloc_devs[]) 352{ 353 struct fimc_lite *fimc = vq->drv_priv; 354 struct flite_frame *frame = &fimc->out_frame; 355 const struct fimc_fmt *fmt = frame->fmt; 356 unsigned long wh = frame->f_width * frame->f_height; 357 int i; 358 359 if (fmt == NULL) 360 return -EINVAL; 361 362 if (*num_planes) { 363 if (*num_planes != fmt->memplanes) 364 return -EINVAL; 365 for (i = 0; i < *num_planes; i++) 366 if (sizes[i] < (wh * fmt->depth[i]) / 8) 367 return -EINVAL; 368 return 0; 369 } 370 371 *num_planes = fmt->memplanes; 372 373 for (i = 0; i < fmt->memplanes; i++) 374 sizes[i] = (wh * fmt->depth[i]) / 8; 375 376 return 0; 377} 378 379static int buffer_prepare(struct vb2_buffer *vb) 380{ 381 struct vb2_queue *vq = vb->vb2_queue; 382 struct fimc_lite *fimc = vq->drv_priv; 383 int i; 384 385 if (fimc->out_frame.fmt == NULL) 386 return -EINVAL; 387 388 for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) { 389 unsigned long size = fimc->payload[i]; 390 391 if (vb2_plane_size(vb, i) < size) { 392 v4l2_err(&fimc->ve.vdev, 393 "User buffer too small (%ld < %ld)\n", 394 vb2_plane_size(vb, i), size); 395 return -EINVAL; 396 } 397 vb2_set_plane_payload(vb, i, size); 398 } 399 400 return 0; 401} 402 403static void buffer_queue(struct vb2_buffer *vb) 404{ 405 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 406 struct flite_buffer *buf 407 = container_of(vbuf, struct flite_buffer, vb); 408 struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue); 409 unsigned long flags; 410 411 spin_lock_irqsave(&fimc->slock, flags); 412 buf->addr = vb2_dma_contig_plane_dma_addr(vb, 0); 413 414 buf->index = fimc->buf_index++; 415 if (fimc->buf_index >= fimc->reqbufs_count) 416 fimc->buf_index = 0; 417 418 if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) && 419 !test_bit(ST_FLITE_STREAM, &fimc->state) && 420 list_empty(&fimc->active_buf_q)) { 421 flite_hw_set_dma_buffer(fimc, buf); 422 fimc_lite_active_queue_add(fimc, buf); 423 } else { 424 fimc_lite_pending_queue_add(fimc, buf); 425 } 426 427 if (vb2_is_streaming(&fimc->vb_queue) && 428 !list_empty(&fimc->pending_buf_q) && 429 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) { 430 flite_hw_capture_start(fimc); 431 spin_unlock_irqrestore(&fimc->slock, flags); 432 433 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state)) 434 fimc_pipeline_call(&fimc->ve, set_stream, 1); 435 return; 436 } 437 spin_unlock_irqrestore(&fimc->slock, flags); 438} 439 440static const struct vb2_ops fimc_lite_qops = { 441 .queue_setup = queue_setup, 442 .buf_prepare = buffer_prepare, 443 .buf_queue = buffer_queue, 444 .wait_prepare = vb2_ops_wait_prepare, 445 .wait_finish = vb2_ops_wait_finish, 446 .start_streaming = start_streaming, 447 .stop_streaming = stop_streaming, 448}; 449 450static void fimc_lite_clear_event_counters(struct fimc_lite *fimc) 451{ 452 unsigned long flags; 453 454 spin_lock_irqsave(&fimc->slock, flags); 455 memset(&fimc->events, 0, sizeof(fimc->events)); 456 spin_unlock_irqrestore(&fimc->slock, flags); 457} 458 459static int fimc_lite_open(struct file *file) 460{ 461 struct fimc_lite *fimc = video_drvdata(file); 462 struct media_entity *me = &fimc->ve.vdev.entity; 463 int ret; 464 465 mutex_lock(&fimc->lock); 466 if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) { 467 ret = -EBUSY; 468 goto unlock; 469 } 470 471 set_bit(ST_FLITE_IN_USE, &fimc->state); 472 ret = pm_runtime_resume_and_get(&fimc->pdev->dev); 473 if (ret < 0) 474 goto err_in_use; 475 476 ret = v4l2_fh_open(file); 477 if (ret < 0) 478 goto err_pm; 479 480 if (!v4l2_fh_is_singular_file(file) || 481 atomic_read(&fimc->out_path) != FIMC_IO_DMA) 482 goto unlock; 483 484 mutex_lock(&me->graph_obj.mdev->graph_mutex); 485 486 ret = fimc_pipeline_call(&fimc->ve, open, me, true); 487 488 /* Mark video pipeline ending at this video node as in use. */ 489 if (ret == 0) 490 me->use_count++; 491 492 mutex_unlock(&me->graph_obj.mdev->graph_mutex); 493 494 if (!ret) { 495 fimc_lite_clear_event_counters(fimc); 496 goto unlock; 497 } 498 499 v4l2_fh_release(file); 500err_pm: 501 pm_runtime_put_sync(&fimc->pdev->dev); 502err_in_use: 503 clear_bit(ST_FLITE_IN_USE, &fimc->state); 504unlock: 505 mutex_unlock(&fimc->lock); 506 return ret; 507} 508 509static int fimc_lite_release(struct file *file) 510{ 511 struct fimc_lite *fimc = video_drvdata(file); 512 struct media_entity *entity = &fimc->ve.vdev.entity; 513 514 mutex_lock(&fimc->lock); 515 516 if (v4l2_fh_is_singular_file(file) && 517 atomic_read(&fimc->out_path) == FIMC_IO_DMA) { 518 if (fimc->streaming) { 519 video_device_pipeline_stop(&fimc->ve.vdev); 520 fimc->streaming = false; 521 } 522 fimc_lite_stop_capture(fimc, false); 523 fimc_pipeline_call(&fimc->ve, close); 524 clear_bit(ST_FLITE_IN_USE, &fimc->state); 525 526 mutex_lock(&entity->graph_obj.mdev->graph_mutex); 527 entity->use_count--; 528 mutex_unlock(&entity->graph_obj.mdev->graph_mutex); 529 } 530 531 _vb2_fop_release(file, NULL); 532 pm_runtime_put(&fimc->pdev->dev); 533 clear_bit(ST_FLITE_SUSPENDED, &fimc->state); 534 535 mutex_unlock(&fimc->lock); 536 return 0; 537} 538 539static const struct v4l2_file_operations fimc_lite_fops = { 540 .owner = THIS_MODULE, 541 .open = fimc_lite_open, 542 .release = fimc_lite_release, 543 .poll = vb2_fop_poll, 544 .unlocked_ioctl = video_ioctl2, 545 .mmap = vb2_fop_mmap, 546}; 547 548/* 549 * Format and crop negotiation helpers 550 */ 551 552static const struct fimc_fmt *fimc_lite_subdev_try_fmt(struct fimc_lite *fimc, 553 struct v4l2_subdev_state *sd_state, 554 struct v4l2_subdev_format *format) 555{ 556 struct flite_drvdata *dd = fimc->dd; 557 struct v4l2_mbus_framefmt *mf = &format->format; 558 const struct fimc_fmt *fmt = NULL; 559 560 if (format->pad == FLITE_SD_PAD_SINK) { 561 v4l_bound_align_image(&mf->width, 8, dd->max_width, 562 ffs(dd->out_width_align) - 1, 563 &mf->height, 0, dd->max_height, 0, 0); 564 565 fmt = fimc_lite_find_format(NULL, &mf->code, 0, 0); 566 if (WARN_ON(!fmt)) 567 return NULL; 568 569 mf->colorspace = fmt->colorspace; 570 mf->code = fmt->mbus_code; 571 } else { 572 struct flite_frame *sink = &fimc->inp_frame; 573 struct v4l2_mbus_framefmt *sink_fmt; 574 struct v4l2_rect *rect; 575 576 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { 577 sink_fmt = v4l2_subdev_state_get_format(sd_state, 578 FLITE_SD_PAD_SINK); 579 580 mf->code = sink_fmt->code; 581 mf->colorspace = sink_fmt->colorspace; 582 583 rect = v4l2_subdev_state_get_crop(sd_state, 584 FLITE_SD_PAD_SINK); 585 } else { 586 mf->code = sink->fmt->mbus_code; 587 mf->colorspace = sink->fmt->colorspace; 588 rect = &sink->rect; 589 } 590 591 /* Allow changing format only on sink pad */ 592 mf->width = rect->width; 593 mf->height = rect->height; 594 } 595 596 mf->field = V4L2_FIELD_NONE; 597 598 v4l2_dbg(1, debug, &fimc->subdev, "code: %#x (%d), %dx%d\n", 599 mf->code, mf->colorspace, mf->width, mf->height); 600 601 return fmt; 602} 603 604static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r) 605{ 606 struct flite_frame *frame = &fimc->inp_frame; 607 608 v4l_bound_align_image(&r->width, 0, frame->f_width, 0, 609 &r->height, 0, frame->f_height, 0, 0); 610 611 /* Adjust left/top if cropping rectangle got out of bounds */ 612 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width); 613 r->left = round_down(r->left, fimc->dd->win_hor_offs_align); 614 r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height); 615 616 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n", 617 r->left, r->top, r->width, r->height, 618 frame->f_width, frame->f_height); 619} 620 621static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r) 622{ 623 struct flite_frame *frame = &fimc->out_frame; 624 struct v4l2_rect *crop_rect = &fimc->inp_frame.rect; 625 626 /* Scaling is not supported so we enforce compose rectangle size 627 same as size of the sink crop rectangle. */ 628 r->width = crop_rect->width; 629 r->height = crop_rect->height; 630 631 /* Adjust left/top if the composing rectangle got out of bounds */ 632 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width); 633 r->left = round_down(r->left, fimc->dd->out_hor_offs_align); 634 r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height); 635 636 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n", 637 r->left, r->top, r->width, r->height, 638 frame->f_width, frame->f_height); 639} 640 641/* 642 * Video node ioctl operations 643 */ 644static int fimc_lite_querycap(struct file *file, void *priv, 645 struct v4l2_capability *cap) 646{ 647 strscpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver)); 648 strscpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card)); 649 return 0; 650} 651 652static int fimc_lite_enum_fmt(struct file *file, void *priv, 653 struct v4l2_fmtdesc *f) 654{ 655 const struct fimc_fmt *fmt; 656 657 if (f->index >= ARRAY_SIZE(fimc_lite_formats)) 658 return -EINVAL; 659 660 fmt = &fimc_lite_formats[f->index]; 661 f->pixelformat = fmt->fourcc; 662 663 return 0; 664} 665 666static int fimc_lite_g_fmt_mplane(struct file *file, void *fh, 667 struct v4l2_format *f) 668{ 669 struct fimc_lite *fimc = video_drvdata(file); 670 struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp; 671 struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0]; 672 struct flite_frame *frame = &fimc->out_frame; 673 const struct fimc_fmt *fmt = frame->fmt; 674 675 plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8; 676 plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height; 677 678 pixm->num_planes = fmt->memplanes; 679 pixm->pixelformat = fmt->fourcc; 680 pixm->width = frame->f_width; 681 pixm->height = frame->f_height; 682 pixm->field = V4L2_FIELD_NONE; 683 pixm->colorspace = fmt->colorspace; 684 return 0; 685} 686 687static int fimc_lite_try_fmt(struct fimc_lite *fimc, 688 struct v4l2_pix_format_mplane *pixm, 689 const struct fimc_fmt **ffmt) 690{ 691 u32 bpl = pixm->plane_fmt[0].bytesperline; 692 struct flite_drvdata *dd = fimc->dd; 693 const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt; 694 const struct fimc_fmt *fmt; 695 696 if (WARN_ON(inp_fmt == NULL)) 697 return -EINVAL; 698 /* 699 * We allow some flexibility only for YUV formats. In case of raw 700 * raw Bayer the FIMC-LITE's output format must match its camera 701 * interface input format. 702 */ 703 if (inp_fmt->flags & FMT_FLAGS_YUV) 704 fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 705 inp_fmt->flags, 0); 706 else 707 fmt = inp_fmt; 708 709 if (WARN_ON(fmt == NULL)) 710 return -EINVAL; 711 if (ffmt) 712 *ffmt = fmt; 713 v4l_bound_align_image(&pixm->width, 8, dd->max_width, 714 ffs(dd->out_width_align) - 1, 715 &pixm->height, 0, dd->max_height, 0, 0); 716 717 if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width)) 718 pixm->plane_fmt[0].bytesperline = (pixm->width * 719 fmt->depth[0]) / 8; 720 721 if (pixm->plane_fmt[0].sizeimage == 0) 722 pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height * 723 fmt->depth[0]) / 8; 724 pixm->num_planes = fmt->memplanes; 725 pixm->pixelformat = fmt->fourcc; 726 pixm->colorspace = fmt->colorspace; 727 pixm->field = V4L2_FIELD_NONE; 728 return 0; 729} 730 731static int fimc_lite_try_fmt_mplane(struct file *file, void *fh, 732 struct v4l2_format *f) 733{ 734 struct fimc_lite *fimc = video_drvdata(file); 735 return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL); 736} 737 738static int fimc_lite_s_fmt_mplane(struct file *file, void *priv, 739 struct v4l2_format *f) 740{ 741 const struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp; 742 struct fimc_lite *fimc = video_drvdata(file); 743 struct flite_frame *frame = &fimc->out_frame; 744 const struct fimc_fmt *fmt = NULL; 745 int ret; 746 747 if (vb2_is_busy(&fimc->vb_queue)) 748 return -EBUSY; 749 750 ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt); 751 if (ret < 0) 752 return ret; 753 754 frame->fmt = fmt; 755 fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8, 756 pixm->plane_fmt[0].sizeimage); 757 frame->f_width = pixm->width; 758 frame->f_height = pixm->height; 759 760 return 0; 761} 762 763static int fimc_pipeline_validate(struct fimc_lite *fimc) 764{ 765 struct v4l2_subdev *sd = &fimc->subdev; 766 struct v4l2_subdev_format sink_fmt = { 767 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 768 }; 769 struct v4l2_subdev_format src_fmt = { 770 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 771 }; 772 struct media_pad *pad; 773 int ret; 774 775 while (1) { 776 /* Retrieve format at the sink pad */ 777 pad = &sd->entity.pads[0]; 778 if (!(pad->flags & MEDIA_PAD_FL_SINK)) 779 break; 780 /* Don't call FIMC subdev operation to avoid nested locking */ 781 if (sd == &fimc->subdev) { 782 struct flite_frame *ff = &fimc->out_frame; 783 sink_fmt.format.width = ff->f_width; 784 sink_fmt.format.height = ff->f_height; 785 sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code; 786 } else { 787 sink_fmt.pad = pad->index; 788 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, 789 &sink_fmt); 790 if (ret < 0 && ret != -ENOIOCTLCMD) 791 return -EPIPE; 792 } 793 /* Retrieve format at the source pad */ 794 pad = media_pad_remote_pad_first(pad); 795 if (!pad || !is_media_entity_v4l2_subdev(pad->entity)) 796 break; 797 798 sd = media_entity_to_v4l2_subdev(pad->entity); 799 src_fmt.pad = pad->index; 800 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt); 801 if (ret < 0 && ret != -ENOIOCTLCMD) 802 return -EPIPE; 803 804 if (src_fmt.format.width != sink_fmt.format.width || 805 src_fmt.format.height != sink_fmt.format.height || 806 src_fmt.format.code != sink_fmt.format.code) 807 return -EPIPE; 808 } 809 return 0; 810} 811 812static int fimc_lite_streamon(struct file *file, void *priv, 813 enum v4l2_buf_type type) 814{ 815 struct fimc_lite *fimc = video_drvdata(file); 816 int ret; 817 818 if (fimc_lite_active(fimc)) 819 return -EBUSY; 820 821 ret = video_device_pipeline_start(&fimc->ve.vdev, &fimc->ve.pipe->mp); 822 if (ret < 0) 823 return ret; 824 825 ret = fimc_pipeline_validate(fimc); 826 if (ret < 0) 827 goto err_p_stop; 828 829 fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity); 830 831 ret = vb2_ioctl_streamon(file, priv, type); 832 if (!ret) { 833 fimc->streaming = true; 834 return ret; 835 } 836 837err_p_stop: 838 video_device_pipeline_stop(&fimc->ve.vdev); 839 return 0; 840} 841 842static int fimc_lite_streamoff(struct file *file, void *priv, 843 enum v4l2_buf_type type) 844{ 845 struct fimc_lite *fimc = video_drvdata(file); 846 int ret; 847 848 ret = vb2_ioctl_streamoff(file, priv, type); 849 if (ret < 0) 850 return ret; 851 852 video_device_pipeline_stop(&fimc->ve.vdev); 853 fimc->streaming = false; 854 return 0; 855} 856 857static int fimc_lite_reqbufs(struct file *file, void *priv, 858 struct v4l2_requestbuffers *reqbufs) 859{ 860 struct fimc_lite *fimc = video_drvdata(file); 861 int ret; 862 863 reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count); 864 ret = vb2_ioctl_reqbufs(file, priv, reqbufs); 865 if (!ret) 866 fimc->reqbufs_count = reqbufs->count; 867 868 return ret; 869} 870 871static int fimc_lite_g_selection(struct file *file, void *fh, 872 struct v4l2_selection *sel) 873{ 874 struct fimc_lite *fimc = video_drvdata(file); 875 struct flite_frame *f = &fimc->out_frame; 876 877 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 878 return -EINVAL; 879 880 switch (sel->target) { 881 case V4L2_SEL_TGT_COMPOSE_BOUNDS: 882 case V4L2_SEL_TGT_COMPOSE_DEFAULT: 883 sel->r.left = 0; 884 sel->r.top = 0; 885 sel->r.width = f->f_width; 886 sel->r.height = f->f_height; 887 return 0; 888 889 case V4L2_SEL_TGT_COMPOSE: 890 sel->r = f->rect; 891 return 0; 892 } 893 894 return -EINVAL; 895} 896 897static int fimc_lite_s_selection(struct file *file, void *fh, 898 struct v4l2_selection *sel) 899{ 900 struct fimc_lite *fimc = video_drvdata(file); 901 struct flite_frame *f = &fimc->out_frame; 902 struct v4l2_rect rect = sel->r; 903 unsigned long flags; 904 905 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE || 906 sel->target != V4L2_SEL_TGT_COMPOSE) 907 return -EINVAL; 908 909 fimc_lite_try_compose(fimc, &rect); 910 911 if ((sel->flags & V4L2_SEL_FLAG_LE) && 912 !v4l2_rect_enclosed(&rect, &sel->r)) 913 return -ERANGE; 914 915 if ((sel->flags & V4L2_SEL_FLAG_GE) && 916 !v4l2_rect_enclosed(&sel->r, &rect)) 917 return -ERANGE; 918 919 sel->r = rect; 920 spin_lock_irqsave(&fimc->slock, flags); 921 f->rect = rect; 922 set_bit(ST_FLITE_CONFIG, &fimc->state); 923 spin_unlock_irqrestore(&fimc->slock, flags); 924 925 return 0; 926} 927 928static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = { 929 .vidioc_querycap = fimc_lite_querycap, 930 .vidioc_enum_fmt_vid_cap = fimc_lite_enum_fmt, 931 .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane, 932 .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane, 933 .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane, 934 .vidioc_g_selection = fimc_lite_g_selection, 935 .vidioc_s_selection = fimc_lite_s_selection, 936 .vidioc_reqbufs = fimc_lite_reqbufs, 937 .vidioc_querybuf = vb2_ioctl_querybuf, 938 .vidioc_prepare_buf = vb2_ioctl_prepare_buf, 939 .vidioc_create_bufs = vb2_ioctl_create_bufs, 940 .vidioc_qbuf = vb2_ioctl_qbuf, 941 .vidioc_dqbuf = vb2_ioctl_dqbuf, 942 .vidioc_streamon = fimc_lite_streamon, 943 .vidioc_streamoff = fimc_lite_streamoff, 944}; 945 946/* Capture subdev media entity operations */ 947static int fimc_lite_link_setup(struct media_entity *entity, 948 const struct media_pad *local, 949 const struct media_pad *remote, u32 flags) 950{ 951 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); 952 struct fimc_lite *fimc = v4l2_get_subdevdata(sd); 953 int ret = 0; 954 955 if (WARN_ON(fimc == NULL)) 956 return 0; 957 958 v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n", 959 __func__, remote->entity->name, local->entity->name, 960 flags, fimc->source_subdev_grp_id); 961 962 switch (local->index) { 963 case FLITE_SD_PAD_SINK: 964 if (flags & MEDIA_LNK_FL_ENABLED) { 965 if (fimc->source_subdev_grp_id == 0) 966 fimc->source_subdev_grp_id = sd->grp_id; 967 else 968 ret = -EBUSY; 969 } else { 970 fimc->source_subdev_grp_id = 0; 971 fimc->sensor = NULL; 972 } 973 break; 974 975 case FLITE_SD_PAD_SOURCE_DMA: 976 if (!(flags & MEDIA_LNK_FL_ENABLED)) 977 atomic_set(&fimc->out_path, FIMC_IO_NONE); 978 else 979 atomic_set(&fimc->out_path, FIMC_IO_DMA); 980 break; 981 982 case FLITE_SD_PAD_SOURCE_ISP: 983 if (!(flags & MEDIA_LNK_FL_ENABLED)) 984 atomic_set(&fimc->out_path, FIMC_IO_NONE); 985 else 986 atomic_set(&fimc->out_path, FIMC_IO_ISP); 987 break; 988 989 default: 990 v4l2_err(sd, "Invalid pad index\n"); 991 ret = -EINVAL; 992 } 993 mb(); 994 995 return ret; 996} 997 998static const struct media_entity_operations fimc_lite_subdev_media_ops = { 999 .link_setup = fimc_lite_link_setup, 1000}; 1001 1002static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd, 1003 struct v4l2_subdev_state *sd_state, 1004 struct v4l2_subdev_mbus_code_enum *code) 1005{ 1006 const struct fimc_fmt *fmt; 1007 1008 fmt = fimc_lite_find_format(NULL, NULL, 0, code->index); 1009 if (!fmt) 1010 return -EINVAL; 1011 code->code = fmt->mbus_code; 1012 return 0; 1013} 1014 1015static struct v4l2_mbus_framefmt *__fimc_lite_subdev_get_try_fmt( 1016 struct v4l2_subdev *sd, 1017 struct v4l2_subdev_state *sd_state, unsigned int pad) 1018{ 1019 if (pad != FLITE_SD_PAD_SINK) 1020 pad = FLITE_SD_PAD_SOURCE_DMA; 1021 1022 return v4l2_subdev_state_get_format(sd_state, pad); 1023} 1024 1025static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd, 1026 struct v4l2_subdev_state *sd_state, 1027 struct v4l2_subdev_format *fmt) 1028{ 1029 struct fimc_lite *fimc = v4l2_get_subdevdata(sd); 1030 struct v4l2_mbus_framefmt *mf = &fmt->format; 1031 struct flite_frame *f = &fimc->inp_frame; 1032 1033 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 1034 mf = __fimc_lite_subdev_get_try_fmt(sd, sd_state, fmt->pad); 1035 fmt->format = *mf; 1036 return 0; 1037 } 1038 1039 mutex_lock(&fimc->lock); 1040 mf->colorspace = f->fmt->colorspace; 1041 mf->code = f->fmt->mbus_code; 1042 1043 if (fmt->pad == FLITE_SD_PAD_SINK) { 1044 /* full camera input frame size */ 1045 mf->width = f->f_width; 1046 mf->height = f->f_height; 1047 } else { 1048 /* crop size */ 1049 mf->width = f->rect.width; 1050 mf->height = f->rect.height; 1051 } 1052 mutex_unlock(&fimc->lock); 1053 return 0; 1054} 1055 1056static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd, 1057 struct v4l2_subdev_state *sd_state, 1058 struct v4l2_subdev_format *fmt) 1059{ 1060 struct fimc_lite *fimc = v4l2_get_subdevdata(sd); 1061 struct v4l2_mbus_framefmt *mf = &fmt->format; 1062 struct flite_frame *sink = &fimc->inp_frame; 1063 struct flite_frame *source = &fimc->out_frame; 1064 const struct fimc_fmt *ffmt; 1065 1066 v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n", 1067 fmt->pad, mf->code, mf->width, mf->height); 1068 1069 mutex_lock(&fimc->lock); 1070 1071 if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP && 1072 media_entity_is_streaming(&sd->entity)) || 1073 (atomic_read(&fimc->out_path) == FIMC_IO_DMA && 1074 vb2_is_busy(&fimc->vb_queue))) { 1075 mutex_unlock(&fimc->lock); 1076 return -EBUSY; 1077 } 1078 1079 ffmt = fimc_lite_subdev_try_fmt(fimc, sd_state, fmt); 1080 1081 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 1082 struct v4l2_mbus_framefmt *src_fmt; 1083 1084 mf = __fimc_lite_subdev_get_try_fmt(sd, sd_state, fmt->pad); 1085 *mf = fmt->format; 1086 1087 if (fmt->pad == FLITE_SD_PAD_SINK) { 1088 unsigned int pad = FLITE_SD_PAD_SOURCE_DMA; 1089 src_fmt = __fimc_lite_subdev_get_try_fmt(sd, sd_state, 1090 pad); 1091 *src_fmt = *mf; 1092 } 1093 1094 mutex_unlock(&fimc->lock); 1095 return 0; 1096 } 1097 1098 if (fmt->pad == FLITE_SD_PAD_SINK) { 1099 sink->f_width = mf->width; 1100 sink->f_height = mf->height; 1101 sink->fmt = ffmt; 1102 /* Set sink crop rectangle */ 1103 sink->rect.width = mf->width; 1104 sink->rect.height = mf->height; 1105 sink->rect.left = 0; 1106 sink->rect.top = 0; 1107 /* Reset source format and crop rectangle */ 1108 source->rect = sink->rect; 1109 source->f_width = mf->width; 1110 source->f_height = mf->height; 1111 } 1112 1113 mutex_unlock(&fimc->lock); 1114 return 0; 1115} 1116 1117static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd, 1118 struct v4l2_subdev_state *sd_state, 1119 struct v4l2_subdev_selection *sel) 1120{ 1121 struct fimc_lite *fimc = v4l2_get_subdevdata(sd); 1122 struct flite_frame *f = &fimc->inp_frame; 1123 1124 if ((sel->target != V4L2_SEL_TGT_CROP && 1125 sel->target != V4L2_SEL_TGT_CROP_BOUNDS) || 1126 sel->pad != FLITE_SD_PAD_SINK) 1127 return -EINVAL; 1128 1129 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { 1130 sel->r = *v4l2_subdev_state_get_crop(sd_state, sel->pad); 1131 return 0; 1132 } 1133 1134 mutex_lock(&fimc->lock); 1135 if (sel->target == V4L2_SEL_TGT_CROP) { 1136 sel->r = f->rect; 1137 } else { 1138 sel->r.left = 0; 1139 sel->r.top = 0; 1140 sel->r.width = f->f_width; 1141 sel->r.height = f->f_height; 1142 } 1143 mutex_unlock(&fimc->lock); 1144 1145 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n", 1146 __func__, f->rect.left, f->rect.top, f->rect.width, 1147 f->rect.height, f->f_width, f->f_height); 1148 1149 return 0; 1150} 1151 1152static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd, 1153 struct v4l2_subdev_state *sd_state, 1154 struct v4l2_subdev_selection *sel) 1155{ 1156 struct fimc_lite *fimc = v4l2_get_subdevdata(sd); 1157 struct flite_frame *f = &fimc->inp_frame; 1158 int ret = 0; 1159 1160 if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK) 1161 return -EINVAL; 1162 1163 mutex_lock(&fimc->lock); 1164 fimc_lite_try_crop(fimc, &sel->r); 1165 1166 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { 1167 *v4l2_subdev_state_get_crop(sd_state, sel->pad) = sel->r; 1168 } else { 1169 unsigned long flags; 1170 spin_lock_irqsave(&fimc->slock, flags); 1171 f->rect = sel->r; 1172 /* Same crop rectangle on the source pad */ 1173 fimc->out_frame.rect = sel->r; 1174 set_bit(ST_FLITE_CONFIG, &fimc->state); 1175 spin_unlock_irqrestore(&fimc->slock, flags); 1176 } 1177 mutex_unlock(&fimc->lock); 1178 1179 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n", 1180 __func__, f->rect.left, f->rect.top, f->rect.width, 1181 f->rect.height, f->f_width, f->f_height); 1182 1183 return ret; 1184} 1185 1186static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on) 1187{ 1188 struct fimc_lite *fimc = v4l2_get_subdevdata(sd); 1189 unsigned long flags; 1190 int ret; 1191 1192 /* 1193 * Find sensor subdev linked to FIMC-LITE directly or through 1194 * MIPI-CSIS. This is required for configuration where FIMC-LITE 1195 * is used as a subdev only and feeds data internally to FIMC-IS. 1196 * The pipeline links are protected through entity.pipe so there is no 1197 * need to take the media graph mutex here. 1198 */ 1199 fimc->sensor = fimc_find_remote_sensor(&sd->entity); 1200 1201 if (atomic_read(&fimc->out_path) != FIMC_IO_ISP) 1202 return -ENOIOCTLCMD; 1203 1204 mutex_lock(&fimc->lock); 1205 if (on) { 1206 flite_hw_reset(fimc); 1207 ret = fimc_lite_hw_init(fimc, true); 1208 if (!ret) { 1209 spin_lock_irqsave(&fimc->slock, flags); 1210 flite_hw_capture_start(fimc); 1211 spin_unlock_irqrestore(&fimc->slock, flags); 1212 } 1213 } else { 1214 set_bit(ST_FLITE_OFF, &fimc->state); 1215 1216 spin_lock_irqsave(&fimc->slock, flags); 1217 flite_hw_capture_stop(fimc); 1218 spin_unlock_irqrestore(&fimc->slock, flags); 1219 1220 ret = wait_event_timeout(fimc->irq_queue, 1221 !test_bit(ST_FLITE_OFF, &fimc->state), 1222 msecs_to_jiffies(200)); 1223 if (ret == 0) 1224 v4l2_err(sd, "s_stream(0) timeout\n"); 1225 clear_bit(ST_FLITE_RUN, &fimc->state); 1226 } 1227 1228 mutex_unlock(&fimc->lock); 1229 return ret; 1230} 1231 1232static int fimc_lite_log_status(struct v4l2_subdev *sd) 1233{ 1234 struct fimc_lite *fimc = v4l2_get_subdevdata(sd); 1235 1236 flite_hw_dump_regs(fimc, __func__); 1237 return 0; 1238} 1239 1240static int fimc_lite_subdev_registered(struct v4l2_subdev *sd) 1241{ 1242 struct fimc_lite *fimc = v4l2_get_subdevdata(sd); 1243 struct vb2_queue *q = &fimc->vb_queue; 1244 struct video_device *vfd = &fimc->ve.vdev; 1245 int ret; 1246 1247 memset(vfd, 0, sizeof(*vfd)); 1248 atomic_set(&fimc->out_path, FIMC_IO_DMA); 1249 1250 snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture", 1251 fimc->index); 1252 1253 vfd->fops = &fimc_lite_fops; 1254 vfd->ioctl_ops = &fimc_lite_ioctl_ops; 1255 vfd->v4l2_dev = sd->v4l2_dev; 1256 vfd->minor = -1; 1257 vfd->release = video_device_release_empty; 1258 vfd->queue = q; 1259 vfd->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | V4L2_CAP_STREAMING; 1260 fimc->reqbufs_count = 0; 1261 1262 INIT_LIST_HEAD(&fimc->pending_buf_q); 1263 INIT_LIST_HEAD(&fimc->active_buf_q); 1264 1265 memset(q, 0, sizeof(*q)); 1266 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; 1267 q->io_modes = VB2_MMAP | VB2_USERPTR; 1268 q->ops = &fimc_lite_qops; 1269 q->mem_ops = &vb2_dma_contig_memops; 1270 q->buf_struct_size = sizeof(struct flite_buffer); 1271 q->drv_priv = fimc; 1272 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 1273 q->lock = &fimc->lock; 1274 q->dev = &fimc->pdev->dev; 1275 1276 ret = vb2_queue_init(q); 1277 if (ret < 0) 1278 return ret; 1279 1280 fimc->vd_pad.flags = MEDIA_PAD_FL_SINK; 1281 ret = media_entity_pads_init(&vfd->entity, 1, &fimc->vd_pad); 1282 if (ret < 0) 1283 return ret; 1284 1285 video_set_drvdata(vfd, fimc); 1286 fimc->ve.pipe = v4l2_get_subdev_hostdata(sd); 1287 1288 ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1); 1289 if (ret < 0) { 1290 media_entity_cleanup(&vfd->entity); 1291 fimc->ve.pipe = NULL; 1292 return ret; 1293 } 1294 1295 v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n", 1296 vfd->name, video_device_node_name(vfd)); 1297 return 0; 1298} 1299 1300static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd) 1301{ 1302 struct fimc_lite *fimc = v4l2_get_subdevdata(sd); 1303 1304 if (fimc == NULL) 1305 return; 1306 1307 mutex_lock(&fimc->lock); 1308 1309 if (video_is_registered(&fimc->ve.vdev)) { 1310 video_unregister_device(&fimc->ve.vdev); 1311 media_entity_cleanup(&fimc->ve.vdev.entity); 1312 fimc->ve.pipe = NULL; 1313 } 1314 1315 mutex_unlock(&fimc->lock); 1316} 1317 1318static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = { 1319 .registered = fimc_lite_subdev_registered, 1320 .unregistered = fimc_lite_subdev_unregistered, 1321}; 1322 1323static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = { 1324 .enum_mbus_code = fimc_lite_subdev_enum_mbus_code, 1325 .get_selection = fimc_lite_subdev_get_selection, 1326 .set_selection = fimc_lite_subdev_set_selection, 1327 .get_fmt = fimc_lite_subdev_get_fmt, 1328 .set_fmt = fimc_lite_subdev_set_fmt, 1329}; 1330 1331static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = { 1332 .s_stream = fimc_lite_subdev_s_stream, 1333}; 1334 1335static const struct v4l2_subdev_core_ops fimc_lite_core_ops = { 1336 .log_status = fimc_lite_log_status, 1337}; 1338 1339static const struct v4l2_subdev_ops fimc_lite_subdev_ops = { 1340 .core = &fimc_lite_core_ops, 1341 .video = &fimc_lite_subdev_video_ops, 1342 .pad = &fimc_lite_subdev_pad_ops, 1343}; 1344 1345static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl) 1346{ 1347 struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite, 1348 ctrl_handler); 1349 set_bit(ST_FLITE_CONFIG, &fimc->state); 1350 return 0; 1351} 1352 1353static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = { 1354 .s_ctrl = fimc_lite_s_ctrl, 1355}; 1356 1357static const struct v4l2_ctrl_config fimc_lite_ctrl = { 1358 .ops = &fimc_lite_ctrl_ops, 1359 .id = V4L2_CTRL_CLASS_USER | 0x1001, 1360 .type = V4L2_CTRL_TYPE_BOOLEAN, 1361 .name = "Test Pattern 640x480", 1362 .step = 1, 1363}; 1364 1365static void fimc_lite_set_default_config(struct fimc_lite *fimc) 1366{ 1367 struct flite_frame *sink = &fimc->inp_frame; 1368 struct flite_frame *source = &fimc->out_frame; 1369 1370 sink->fmt = &fimc_lite_formats[0]; 1371 sink->f_width = FLITE_DEFAULT_WIDTH; 1372 sink->f_height = FLITE_DEFAULT_HEIGHT; 1373 1374 sink->rect.width = FLITE_DEFAULT_WIDTH; 1375 sink->rect.height = FLITE_DEFAULT_HEIGHT; 1376 sink->rect.left = 0; 1377 sink->rect.top = 0; 1378 1379 *source = *sink; 1380} 1381 1382static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc) 1383{ 1384 struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler; 1385 struct v4l2_subdev *sd = &fimc->subdev; 1386 int ret; 1387 1388 v4l2_subdev_init(sd, &fimc_lite_subdev_ops); 1389 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1390 snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index); 1391 1392 fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK; 1393 fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE; 1394 fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE; 1395 ret = media_entity_pads_init(&sd->entity, FLITE_SD_PADS_NUM, 1396 fimc->subdev_pads); 1397 if (ret) 1398 return ret; 1399 1400 v4l2_ctrl_handler_init(handler, 1); 1401 fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl, 1402 NULL); 1403 if (handler->error) { 1404 media_entity_cleanup(&sd->entity); 1405 return handler->error; 1406 } 1407 1408 sd->ctrl_handler = handler; 1409 sd->internal_ops = &fimc_lite_subdev_internal_ops; 1410 sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER; 1411 sd->entity.ops = &fimc_lite_subdev_media_ops; 1412 sd->owner = THIS_MODULE; 1413 v4l2_set_subdevdata(sd, fimc); 1414 1415 return 0; 1416} 1417 1418static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc) 1419{ 1420 struct v4l2_subdev *sd = &fimc->subdev; 1421 1422 v4l2_device_unregister_subdev(sd); 1423 media_entity_cleanup(&sd->entity); 1424 v4l2_ctrl_handler_free(&fimc->ctrl_handler); 1425 v4l2_set_subdevdata(sd, NULL); 1426} 1427 1428static void fimc_lite_clk_put(struct fimc_lite *fimc) 1429{ 1430 if (IS_ERR(fimc->clock)) 1431 return; 1432 1433 clk_put(fimc->clock); 1434 fimc->clock = ERR_PTR(-EINVAL); 1435} 1436 1437static int fimc_lite_clk_get(struct fimc_lite *fimc) 1438{ 1439 fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME); 1440 return PTR_ERR_OR_ZERO(fimc->clock); 1441} 1442 1443static const struct of_device_id flite_of_match[]; 1444 1445static int fimc_lite_probe(struct platform_device *pdev) 1446{ 1447 struct flite_drvdata *drv_data = NULL; 1448 struct device *dev = &pdev->dev; 1449 const struct of_device_id *of_id; 1450 struct fimc_lite *fimc; 1451 int ret; 1452 int irq; 1453 1454 if (!dev->of_node) 1455 return -ENODEV; 1456 1457 fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL); 1458 if (!fimc) 1459 return -ENOMEM; 1460 1461 of_id = of_match_node(flite_of_match, dev->of_node); 1462 if (of_id) 1463 drv_data = (struct flite_drvdata *)of_id->data; 1464 fimc->index = of_alias_get_id(dev->of_node, "fimc-lite"); 1465 1466 if (!drv_data || fimc->index >= drv_data->num_instances || 1467 fimc->index < 0) { 1468 dev_err(dev, "Wrong %pOF node alias\n", dev->of_node); 1469 return -EINVAL; 1470 } 1471 1472 fimc->dd = drv_data; 1473 fimc->pdev = pdev; 1474 1475 init_waitqueue_head(&fimc->irq_queue); 1476 spin_lock_init(&fimc->slock); 1477 mutex_init(&fimc->lock); 1478 1479 fimc->regs = devm_platform_ioremap_resource(pdev, 0); 1480 if (IS_ERR(fimc->regs)) 1481 return PTR_ERR(fimc->regs); 1482 1483 irq = platform_get_irq(pdev, 0); 1484 if (irq < 0) 1485 return irq; 1486 1487 ret = fimc_lite_clk_get(fimc); 1488 if (ret) 1489 return ret; 1490 1491 ret = devm_request_irq(dev, irq, flite_irq_handler, 1492 0, dev_name(dev), fimc); 1493 if (ret) { 1494 dev_err(dev, "Failed to install irq (%d)\n", ret); 1495 goto err_clk_put; 1496 } 1497 1498 /* The video node will be created within the subdev's registered() op */ 1499 ret = fimc_lite_create_capture_subdev(fimc); 1500 if (ret) 1501 goto err_clk_put; 1502 1503 platform_set_drvdata(pdev, fimc); 1504 pm_runtime_enable(dev); 1505 1506 if (!pm_runtime_enabled(dev)) { 1507 ret = clk_prepare_enable(fimc->clock); 1508 if (ret < 0) 1509 goto err_sd; 1510 } 1511 1512 vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32)); 1513 1514 fimc_lite_set_default_config(fimc); 1515 1516 dev_dbg(dev, "FIMC-LITE.%d registered successfully\n", 1517 fimc->index); 1518 return 0; 1519 1520err_sd: 1521 fimc_lite_unregister_capture_subdev(fimc); 1522err_clk_put: 1523 fimc_lite_clk_put(fimc); 1524 return ret; 1525} 1526 1527#ifdef CONFIG_PM 1528static int fimc_lite_runtime_resume(struct device *dev) 1529{ 1530 struct fimc_lite *fimc = dev_get_drvdata(dev); 1531 1532 clk_prepare_enable(fimc->clock); 1533 return 0; 1534} 1535 1536static int fimc_lite_runtime_suspend(struct device *dev) 1537{ 1538 struct fimc_lite *fimc = dev_get_drvdata(dev); 1539 1540 clk_disable_unprepare(fimc->clock); 1541 return 0; 1542} 1543#endif 1544 1545#ifdef CONFIG_PM_SLEEP 1546static int fimc_lite_resume(struct device *dev) 1547{ 1548 struct fimc_lite *fimc = dev_get_drvdata(dev); 1549 struct flite_buffer *buf; 1550 unsigned long flags; 1551 int i; 1552 1553 spin_lock_irqsave(&fimc->slock, flags); 1554 if (!test_and_clear_bit(ST_LPM, &fimc->state) || 1555 !test_bit(ST_FLITE_IN_USE, &fimc->state)) { 1556 spin_unlock_irqrestore(&fimc->slock, flags); 1557 return 0; 1558 } 1559 flite_hw_reset(fimc); 1560 spin_unlock_irqrestore(&fimc->slock, flags); 1561 1562 if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state)) 1563 return 0; 1564 1565 INIT_LIST_HEAD(&fimc->active_buf_q); 1566 fimc_pipeline_call(&fimc->ve, open, 1567 &fimc->ve.vdev.entity, false); 1568 fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP); 1569 clear_bit(ST_FLITE_SUSPENDED, &fimc->state); 1570 1571 for (i = 0; i < fimc->reqbufs_count; i++) { 1572 if (list_empty(&fimc->pending_buf_q)) 1573 break; 1574 buf = fimc_lite_pending_queue_pop(fimc); 1575 buffer_queue(&buf->vb.vb2_buf); 1576 } 1577 return 0; 1578} 1579 1580static int fimc_lite_suspend(struct device *dev) 1581{ 1582 struct fimc_lite *fimc = dev_get_drvdata(dev); 1583 bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state); 1584 int ret; 1585 1586 if (test_and_set_bit(ST_LPM, &fimc->state)) 1587 return 0; 1588 1589 ret = fimc_lite_stop_capture(fimc, suspend); 1590 if (ret < 0 || !fimc_lite_active(fimc)) 1591 return ret; 1592 1593 return fimc_pipeline_call(&fimc->ve, close); 1594} 1595#endif /* CONFIG_PM_SLEEP */ 1596 1597static void fimc_lite_remove(struct platform_device *pdev) 1598{ 1599 struct fimc_lite *fimc = platform_get_drvdata(pdev); 1600 struct device *dev = &pdev->dev; 1601 1602 if (!pm_runtime_enabled(dev)) 1603 clk_disable_unprepare(fimc->clock); 1604 1605 pm_runtime_disable(dev); 1606 pm_runtime_set_suspended(dev); 1607 fimc_lite_unregister_capture_subdev(fimc); 1608 vb2_dma_contig_clear_max_seg_size(dev); 1609 fimc_lite_clk_put(fimc); 1610 1611 dev_info(dev, "Driver unloaded\n"); 1612} 1613 1614static const struct dev_pm_ops fimc_lite_pm_ops = { 1615 SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume) 1616 SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume, 1617 NULL) 1618}; 1619 1620/* EXYNOS4212, EXYNOS4412 */ 1621static struct flite_drvdata fimc_lite_drvdata_exynos4 = { 1622 .max_width = 8192, 1623 .max_height = 8192, 1624 .out_width_align = 8, 1625 .win_hor_offs_align = 2, 1626 .out_hor_offs_align = 8, 1627 .max_dma_bufs = 1, 1628 .num_instances = 2, 1629}; 1630 1631/* EXYNOS5250 */ 1632static struct flite_drvdata fimc_lite_drvdata_exynos5 = { 1633 .max_width = 8192, 1634 .max_height = 8192, 1635 .out_width_align = 8, 1636 .win_hor_offs_align = 2, 1637 .out_hor_offs_align = 8, 1638 .max_dma_bufs = 32, 1639 .num_instances = 3, 1640}; 1641 1642static const struct of_device_id flite_of_match[] = { 1643 { 1644 .compatible = "samsung,exynos4212-fimc-lite", 1645 .data = &fimc_lite_drvdata_exynos4, 1646 }, 1647 { 1648 .compatible = "samsung,exynos5250-fimc-lite", 1649 .data = &fimc_lite_drvdata_exynos5, 1650 }, 1651 { /* sentinel */ }, 1652}; 1653MODULE_DEVICE_TABLE(of, flite_of_match); 1654 1655static struct platform_driver fimc_lite_driver = { 1656 .probe = fimc_lite_probe, 1657 .remove_new = fimc_lite_remove, 1658 .driver = { 1659 .of_match_table = flite_of_match, 1660 .name = FIMC_LITE_DRV_NAME, 1661 .pm = &fimc_lite_pm_ops, 1662 } 1663}; 1664module_platform_driver(fimc_lite_driver); 1665MODULE_LICENSE("GPL"); 1666MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME); 1667