1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (c) 2023 MediaTek Inc. 4 * Author: Yunfei Dong <yunfei.dong@mediatek.com> 5 */ 6 7#ifndef _MTK_VCODEC_ENC_DRV_H_ 8#define _MTK_VCODEC_ENC_DRV_H_ 9 10#include "../common/mtk_vcodec_cmn_drv.h" 11#include "../common/mtk_vcodec_dbgfs.h" 12#include "../common/mtk_vcodec_fw_priv.h" 13#include "../common/mtk_vcodec_util.h" 14 15#define MTK_VCODEC_ENC_NAME "mtk-vcodec-enc" 16 17#define MTK_ENC_CTX_IS_EXT(ctx) ((ctx)->dev->venc_pdata->uses_ext) 18#define MTK_ENC_IOVA_IS_34BIT(ctx) ((ctx)->dev->venc_pdata->uses_34bit) 19 20/** 21 * struct mtk_vcodec_enc_pdata - compatible data for each IC 22 * 23 * @uses_ext: whether the encoder uses the extended firmware messaging format 24 * @min_bitrate: minimum supported encoding bitrate 25 * @max_bitrate: maximum supported encoding bitrate 26 * @capture_formats: array of supported capture formats 27 * @num_capture_formats: number of entries in capture_formats 28 * @output_formats: array of supported output formats 29 * @num_output_formats: number of entries in output_formats 30 * @core_id: stand for h264 or vp8 encode index 31 * @uses_34bit: whether the encoder uses 34-bit iova 32 */ 33struct mtk_vcodec_enc_pdata { 34 bool uses_ext; 35 u64 min_bitrate; 36 u64 max_bitrate; 37 const struct mtk_video_fmt *capture_formats; 38 size_t num_capture_formats; 39 const struct mtk_video_fmt *output_formats; 40 size_t num_output_formats; 41 u8 core_id; 42 bool uses_34bit; 43}; 44 45/* 46 * enum mtk_encode_param - General encoding parameters type 47 */ 48enum mtk_encode_param { 49 MTK_ENCODE_PARAM_NONE = 0, 50 MTK_ENCODE_PARAM_BITRATE = (1 << 0), 51 MTK_ENCODE_PARAM_FRAMERATE = (1 << 1), 52 MTK_ENCODE_PARAM_INTRA_PERIOD = (1 << 2), 53 MTK_ENCODE_PARAM_FORCE_INTRA = (1 << 3), 54 MTK_ENCODE_PARAM_GOP_SIZE = (1 << 4), 55}; 56 57/** 58 * struct mtk_enc_params - General encoding parameters 59 * @bitrate: target bitrate in bits per second 60 * @num_b_frame: number of b frames between p-frame 61 * @rc_frame: frame based rate control 62 * @rc_mb: macroblock based rate control 63 * @seq_hdr_mode: H.264 sequence header is encoded separately or joined 64 * with the first frame 65 * @intra_period: I frame period 66 * @gop_size: group of picture size, it's used as the intra frame period 67 * @framerate_num: frame rate numerator. ex: framerate_num=30 and 68 * framerate_denom=1 means FPS is 30 69 * @framerate_denom: frame rate denominator. ex: framerate_num=30 and 70 * framerate_denom=1 means FPS is 30 71 * @h264_max_qp: Max value for H.264 quantization parameter 72 * @h264_profile: V4L2 defined H.264 profile 73 * @h264_level: V4L2 defined H.264 level 74 * @force_intra: force/insert intra frame 75 */ 76struct mtk_enc_params { 77 unsigned int bitrate; 78 unsigned int num_b_frame; 79 unsigned int rc_frame; 80 unsigned int rc_mb; 81 unsigned int seq_hdr_mode; 82 unsigned int intra_period; 83 unsigned int gop_size; 84 unsigned int framerate_num; 85 unsigned int framerate_denom; 86 unsigned int h264_max_qp; 87 unsigned int h264_profile; 88 unsigned int h264_level; 89 unsigned int force_intra; 90}; 91 92/** 93 * struct mtk_vcodec_enc_ctx - Context (instance) private data. 94 * 95 * @type: type of encoder instance 96 * @dev: pointer to the mtk_vcodec_enc_dev of the device 97 * @list: link to ctx_list of mtk_vcodec_enc_dev 98 * 99 * @fh: struct v4l2_fh 100 * @m2m_ctx: pointer to the v4l2_m2m_ctx of the context 101 * @q_data: store information of input and output queue of the context 102 * @id: index of the context that this structure describes 103 * @state: state of the context 104 * @param_change: indicate encode parameter type 105 * @enc_params: encoding parameters 106 * 107 * @enc_if: hooked encoder driver interface 108 * @drv_handle: driver handle for specific decode/encode instance 109 * 110 * @int_cond: variable used by the waitqueue 111 * @int_type: type of the last interrupt 112 * @queue: waitqueue that can be used to wait for this context to finish 113 * @irq_status: irq status 114 * 115 * @ctrl_hdl: handler for v4l2 framework 116 * @encode_work: worker for the encoding 117 * @empty_flush_buf: a fake size-0 capture buffer that indicates flush. Used for encoder. 118 * @is_flushing: set to true if flushing is in progress. 119 * 120 * @colorspace: enum v4l2_colorspace; supplemental to pixelformat 121 * @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding 122 * @quantization: enum v4l2_quantization, colorspace quantization 123 * @xfer_func: enum v4l2_xfer_func, colorspace transfer function 124 * 125 * @q_mutex: vb2_queue mutex. 126 * @vpu_inst: vpu instance pointer. 127 */ 128struct mtk_vcodec_enc_ctx { 129 enum mtk_instance_type type; 130 struct mtk_vcodec_enc_dev *dev; 131 struct list_head list; 132 133 struct v4l2_fh fh; 134 struct v4l2_m2m_ctx *m2m_ctx; 135 struct mtk_q_data q_data[2]; 136 int id; 137 enum mtk_instance_state state; 138 enum mtk_encode_param param_change; 139 struct mtk_enc_params enc_params; 140 141 const struct venc_common_if *enc_if; 142 void *drv_handle; 143 144 int int_cond[MTK_VDEC_HW_MAX]; 145 int int_type[MTK_VDEC_HW_MAX]; 146 wait_queue_head_t queue[MTK_VDEC_HW_MAX]; 147 unsigned int irq_status; 148 149 struct v4l2_ctrl_handler ctrl_hdl; 150 struct work_struct encode_work; 151 struct v4l2_m2m_buffer empty_flush_buf; 152 bool is_flushing; 153 154 enum v4l2_colorspace colorspace; 155 enum v4l2_ycbcr_encoding ycbcr_enc; 156 enum v4l2_quantization quantization; 157 enum v4l2_xfer_func xfer_func; 158 159 struct mutex q_mutex; 160 void *vpu_inst; 161}; 162 163/** 164 * struct mtk_vcodec_enc_dev - driver data 165 * @v4l2_dev: V4L2 device to register video devices for. 166 * @vfd_enc: Video device for encoder. 167 * 168 * @m2m_dev_enc: m2m device for encoder. 169 * @plat_dev: platform device 170 * @ctx_list: list of struct mtk_vcodec_ctx 171 * @curr_ctx: The context that is waiting for codec hardware 172 * 173 * @reg_base: Mapped address of MTK Vcodec registers. 174 * @venc_pdata: encoder IC-specific data 175 * 176 * @fw_handler: used to communicate with the firmware. 177 * @id_counter: used to identify current opened instance 178 * 179 * @enc_mutex: encoder hardware lock. 180 * @dev_mutex: video_device lock 181 * @dev_ctx_lock: the lock of context list 182 * @encode_workqueue: encode work queue 183 * 184 * @enc_irq: h264 encoder irq resource 185 * @irqlock: protect data access by irq handler and work thread 186 * 187 * @pm: power management control 188 * @enc_capability: used to identify encode capability 189 * @dbgfs: debug log related information 190 */ 191struct mtk_vcodec_enc_dev { 192 struct v4l2_device v4l2_dev; 193 struct video_device *vfd_enc; 194 195 struct v4l2_m2m_dev *m2m_dev_enc; 196 struct platform_device *plat_dev; 197 struct list_head ctx_list; 198 struct mtk_vcodec_enc_ctx *curr_ctx; 199 200 void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE]; 201 const struct mtk_vcodec_enc_pdata *venc_pdata; 202 203 struct mtk_vcodec_fw *fw_handler; 204 u64 id_counter; 205 206 /* encoder hardware mutex lock */ 207 struct mutex enc_mutex; 208 struct mutex dev_mutex; 209 struct mutex dev_ctx_lock; 210 struct workqueue_struct *encode_workqueue; 211 212 int enc_irq; 213 spinlock_t irqlock; 214 215 struct mtk_vcodec_pm pm; 216 unsigned int enc_capability; 217 struct mtk_vcodec_dbgfs dbgfs; 218}; 219 220static inline struct mtk_vcodec_enc_ctx *fh_to_enc_ctx(struct v4l2_fh *fh) 221{ 222 return container_of(fh, struct mtk_vcodec_enc_ctx, fh); 223} 224 225static inline struct mtk_vcodec_enc_ctx *ctrl_to_enc_ctx(struct v4l2_ctrl *ctrl) 226{ 227 return container_of(ctrl->handler, struct mtk_vcodec_enc_ctx, ctrl_hdl); 228} 229 230/* Wake up context wait_queue */ 231static inline void 232wake_up_enc_ctx(struct mtk_vcodec_enc_ctx *ctx, unsigned int reason, unsigned int hw_id) 233{ 234 ctx->int_cond[hw_id] = 1; 235 ctx->int_type[hw_id] = reason; 236 wake_up_interruptible(&ctx->queue[hw_id]); 237} 238 239#define mtk_venc_err(ctx, fmt, args...) \ 240 mtk_vcodec_err((ctx)->id, (ctx)->dev->plat_dev, fmt, ##args) 241 242#define mtk_venc_debug(ctx, fmt, args...) \ 243 mtk_vcodec_debug((ctx)->id, (ctx)->dev->plat_dev, fmt, ##args) 244 245#define mtk_v4l2_venc_err(ctx, fmt, args...) mtk_v4l2_err((ctx)->dev->plat_dev, fmt, ##args) 246 247#define mtk_v4l2_venc_dbg(level, ctx, fmt, args...) \ 248 mtk_v4l2_debug((ctx)->dev->plat_dev, level, fmt, ##args) 249 250#endif /* _MTK_VCODEC_ENC_DRV_H_ */ 251