1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (c) 2015-2016 MediaTek Inc. 4 * Author: Houlong Wei <houlong.wei@mediatek.com> 5 * Ming Hsiu Tsai <minghsiu.tsai@mediatek.com> 6 */ 7 8#ifndef __MTK_MDP_CORE_H__ 9#define __MTK_MDP_CORE_H__ 10 11#include <linux/videodev2.h> 12#include <media/v4l2-ctrls.h> 13#include <media/v4l2-device.h> 14#include <media/v4l2-mem2mem.h> 15#include <media/videobuf2-core.h> 16#include <media/videobuf2-dma-contig.h> 17 18#include "mtk_mdp_vpu.h" 19#include "mtk_mdp_comp.h" 20 21 22#define MTK_MDP_MODULE_NAME "mtk-mdp" 23 24#define MTK_MDP_SHUTDOWN_TIMEOUT ((100*HZ)/1000) /* 100ms */ 25#define MTK_MDP_MAX_CTRL_NUM 10 26 27#define MTK_MDP_FMT_FLAG_OUTPUT BIT(0) 28#define MTK_MDP_FMT_FLAG_CAPTURE BIT(1) 29 30#define MTK_MDP_VPU_INIT BIT(0) 31#define MTK_MDP_CTX_ERROR BIT(5) 32 33/** 34 * struct mtk_mdp_pix_align - alignment of image 35 * @org_w: source alignment of width 36 * @org_h: source alignment of height 37 * @target_w: dst alignment of width 38 * @target_h: dst alignment of height 39 */ 40struct mtk_mdp_pix_align { 41 u16 org_w; 42 u16 org_h; 43 u16 target_w; 44 u16 target_h; 45}; 46 47/** 48 * struct mtk_mdp_fmt - the driver's internal color format data 49 * @pixelformat: the fourcc code for this format, 0 if not applicable 50 * @num_planes: number of physically non-contiguous data planes 51 * @num_comp: number of logical data planes 52 * @depth: per plane driver's private 'number of bits per pixel' 53 * @row_depth: per plane driver's private 'number of bits per pixel per row' 54 * @flags: flags indicating which operation mode format applies to 55 * MTK_MDP_FMT_FLAG_OUTPUT is used in OUTPUT stream 56 * MTK_MDP_FMT_FLAG_CAPTURE is used in CAPTURE stream 57 * @align: pointer to a pixel alignment struct, NULL if using default value 58 */ 59struct mtk_mdp_fmt { 60 u32 pixelformat; 61 u16 num_planes; 62 u16 num_comp; 63 u8 depth[VIDEO_MAX_PLANES]; 64 u8 row_depth[VIDEO_MAX_PLANES]; 65 u32 flags; 66 struct mtk_mdp_pix_align *align; 67}; 68 69/** 70 * struct mtk_mdp_addr - the image processor physical address set 71 * @addr: address of planes 72 */ 73struct mtk_mdp_addr { 74 dma_addr_t addr[MTK_MDP_MAX_NUM_PLANE]; 75}; 76 77/* struct mtk_mdp_ctrls - the image processor control set 78 * @rotate: rotation degree 79 * @hflip: horizontal flip 80 * @vflip: vertical flip 81 * @global_alpha: the alpha value of current frame 82 */ 83struct mtk_mdp_ctrls { 84 struct v4l2_ctrl *rotate; 85 struct v4l2_ctrl *hflip; 86 struct v4l2_ctrl *vflip; 87 struct v4l2_ctrl *global_alpha; 88}; 89 90/** 91 * struct mtk_mdp_frame - source/target frame properties 92 * @width: SRC : SRCIMG_WIDTH, DST : OUTPUTDMA_WHOLE_IMG_WIDTH 93 * @height: SRC : SRCIMG_HEIGHT, DST : OUTPUTDMA_WHOLE_IMG_HEIGHT 94 * @crop: cropped(source)/scaled(destination) size 95 * @payload: image size in bytes (w x h x bpp) 96 * @pitch: bytes per line of image in memory 97 * @addr: image frame buffer physical addresses 98 * @fmt: color format pointer 99 * @alpha: frame's alpha value 100 */ 101struct mtk_mdp_frame { 102 u32 width; 103 u32 height; 104 struct v4l2_rect crop; 105 unsigned long payload[VIDEO_MAX_PLANES]; 106 unsigned int pitch[VIDEO_MAX_PLANES]; 107 struct mtk_mdp_addr addr; 108 const struct mtk_mdp_fmt *fmt; 109 u8 alpha; 110}; 111 112/** 113 * struct mtk_mdp_variant - image processor variant information 114 * @pix_max: maximum limit of image size 115 * @pix_min: minimum limit of image size 116 * @pix_align: alignment of image 117 * @h_scale_up_max: maximum scale-up in horizontal 118 * @v_scale_up_max: maximum scale-up in vertical 119 * @h_scale_down_max: maximum scale-down in horizontal 120 * @v_scale_down_max: maximum scale-down in vertical 121 */ 122struct mtk_mdp_variant { 123 struct mtk_mdp_pix_limit *pix_max; 124 struct mtk_mdp_pix_limit *pix_min; 125 struct mtk_mdp_pix_align *pix_align; 126 u16 h_scale_up_max; 127 u16 v_scale_up_max; 128 u16 h_scale_down_max; 129 u16 v_scale_down_max; 130}; 131 132/** 133 * struct mtk_mdp_dev - abstraction for image processor entity 134 * @lock: the mutex protecting this data structure 135 * @vpulock: the mutex protecting the communication with VPU 136 * @pdev: pointer to the image processor platform device 137 * @variant: the IP variant information 138 * @id: image processor device index (0..MTK_MDP_MAX_DEVS) 139 * @comp_list: list of MDP function components 140 * @m2m_dev: v4l2 memory-to-memory device data 141 * @ctx_list: list of struct mtk_mdp_ctx 142 * @vdev: video device for image processor driver 143 * @v4l2_dev: V4L2 device to register video devices for. 144 * @job_wq: processor work queue 145 * @vpu_dev: VPU platform device 146 * @ctx_num: counter of active MTK MDP context 147 * @id_counter: An integer id given to the next opened context 148 * @wdt_wq: work queue for VPU watchdog 149 * @wdt_work: worker for VPU watchdog 150 */ 151struct mtk_mdp_dev { 152 struct mutex lock; 153 struct mutex vpulock; 154 struct platform_device *pdev; 155 struct mtk_mdp_variant *variant; 156 u16 id; 157 struct list_head comp_list; 158 struct v4l2_m2m_dev *m2m_dev; 159 struct list_head ctx_list; 160 struct video_device *vdev; 161 struct v4l2_device v4l2_dev; 162 struct workqueue_struct *job_wq; 163 struct platform_device *vpu_dev; 164 int ctx_num; 165 unsigned long id_counter; 166 struct workqueue_struct *wdt_wq; 167 struct work_struct wdt_work; 168}; 169 170/** 171 * struct mtk_mdp_ctx - the device context data 172 * @list: link to ctx_list of mtk_mdp_dev 173 * @s_frame: source frame properties 174 * @d_frame: destination frame properties 175 * @id: index of the context that this structure describes 176 * @flags: additional flags for image conversion 177 * @state: flags to keep track of user configuration 178 * Protected by slock 179 * @rotation: rotates the image by specified angle 180 * @hflip: mirror the picture horizontally 181 * @vflip: mirror the picture vertically 182 * @mdp_dev: the image processor device this context applies to 183 * @m2m_ctx: memory-to-memory device context 184 * @fh: v4l2 file handle 185 * @ctrl_handler: v4l2 controls handler 186 * @ctrls: image processor control set 187 * @ctrls_rdy: true if the control handler is initialized 188 * @colorspace: enum v4l2_colorspace; supplemental to pixelformat 189 * @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding 190 * @xfer_func: enum v4l2_xfer_func, colorspace transfer function 191 * @quant: enum v4l2_quantization, colorspace quantization 192 * @vpu: VPU instance 193 * @slock: the mutex protecting mtp_mdp_ctx.state 194 * @work: worker for image processing 195 */ 196struct mtk_mdp_ctx { 197 struct list_head list; 198 struct mtk_mdp_frame s_frame; 199 struct mtk_mdp_frame d_frame; 200 u32 flags; 201 u32 state; 202 int id; 203 int rotation; 204 u32 hflip:1; 205 u32 vflip:1; 206 struct mtk_mdp_dev *mdp_dev; 207 struct v4l2_m2m_ctx *m2m_ctx; 208 struct v4l2_fh fh; 209 struct v4l2_ctrl_handler ctrl_handler; 210 struct mtk_mdp_ctrls ctrls; 211 bool ctrls_rdy; 212 enum v4l2_colorspace colorspace; 213 enum v4l2_ycbcr_encoding ycbcr_enc; 214 enum v4l2_xfer_func xfer_func; 215 enum v4l2_quantization quant; 216 217 struct mtk_mdp_vpu vpu; 218 struct mutex slock; 219 struct work_struct work; 220}; 221 222extern int mtk_mdp_dbg_level; 223 224void mtk_mdp_register_component(struct mtk_mdp_dev *mdp, 225 struct mtk_mdp_comp *comp); 226 227void mtk_mdp_unregister_component(struct mtk_mdp_dev *mdp, 228 struct mtk_mdp_comp *comp); 229 230#if defined(DEBUG) 231 232#define mtk_mdp_dbg(level, fmt, args...) \ 233 do { \ 234 if (mtk_mdp_dbg_level >= level) \ 235 pr_info("[MTK_MDP] level=%d %s(),%d: " fmt "\n", \ 236 level, __func__, __LINE__, ##args); \ 237 } while (0) 238 239#define mtk_mdp_err(fmt, args...) \ 240 pr_err("[MTK_MDP][ERROR] %s:%d: " fmt "\n", __func__, __LINE__, \ 241 ##args) 242 243 244#define mtk_mdp_dbg_enter() mtk_mdp_dbg(3, "+") 245#define mtk_mdp_dbg_leave() mtk_mdp_dbg(3, "-") 246 247#else 248 249#define mtk_mdp_dbg(level, fmt, args...) {} 250#define mtk_mdp_err(fmt, args...) 251#define mtk_mdp_dbg_enter() 252#define mtk_mdp_dbg_leave() 253 254#endif 255 256#endif /* __MTK_MDP_CORE_H__ */ 257