1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * ddbridge.h: Digital Devices PCIe bridge driver
4 *
5 * Copyright (C) 2010-2017 Digital Devices GmbH
6 *                         Ralph Metzler <rmetzler@digitaldevices.de>
7 */
8
9#ifndef _DDBRIDGE_H_
10#define _DDBRIDGE_H_
11
12#include <linux/clk.h>
13#include <linux/completion.h>
14#include <linux/delay.h>
15#include <linux/device.h>
16#include <linux/dvb/ca.h>
17#include <linux/gpio.h>
18#include <linux/i2c.h>
19#include <linux/init.h>
20#include <linux/interrupt.h>
21#include <linux/io.h>
22#include <linux/kthread.h>
23#include <linux/module.h>
24#include <linux/mutex.h>
25#include <linux/pci.h>
26#include <linux/platform_device.h>
27#include <linux/poll.h>
28#include <linux/sched.h>
29#include <linux/slab.h>
30#include <linux/socket.h>
31#include <linux/spi/spi.h>
32#include <linux/swab.h>
33#include <linux/timer.h>
34#include <linux/types.h>
35#include <linux/uaccess.h>
36#include <linux/vmalloc.h>
37#include <linux/workqueue.h>
38
39#include <asm/dma.h>
40#include <asm/irq.h>
41
42#include <media/dmxdev.h>
43#include <media/dvb_ca_en50221.h>
44#include <media/dvb_demux.h>
45#include <media/dvbdev.h>
46#include <media/dvb_frontend.h>
47#include <media/dvb_net.h>
48#include <media/dvb_ringbuffer.h>
49
50#define DDBRIDGE_VERSION "0.9.33-integrated"
51
52#define DDB_MAX_I2C    32
53#define DDB_MAX_PORT   32
54#define DDB_MAX_INPUT  64
55#define DDB_MAX_OUTPUT 32
56#define DDB_MAX_LINK    4
57#define DDB_LINK_SHIFT 28
58
59#define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT)
60
61struct ddb_regset {
62	u32 base;
63	u32 num;
64	u32 size;
65};
66
67struct ddb_regmap {
68	u32 irq_base_i2c;
69	u32 irq_base_idma;
70	u32 irq_base_odma;
71
72	const struct ddb_regset *i2c;
73	const struct ddb_regset *i2c_buf;
74	const struct ddb_regset *idma;
75	const struct ddb_regset *idma_buf;
76	const struct ddb_regset *odma;
77	const struct ddb_regset *odma_buf;
78
79	const struct ddb_regset *input;
80	const struct ddb_regset *output;
81
82	const struct ddb_regset *channel;
83};
84
85struct ddb_ids {
86	u16 vendor;
87	u16 device;
88	u16 subvendor;
89	u16 subdevice;
90
91	u32 hwid;
92	u32 regmapid;
93	u32 devid;
94	u32 mac;
95};
96
97struct ddb_info {
98	int   type;
99#define DDB_NONE            0
100#define DDB_OCTOPUS         1
101#define DDB_OCTOPUS_CI      2
102#define DDB_OCTOPUS_MAX     5
103#define DDB_OCTOPUS_MAX_CT  6
104#define DDB_OCTOPUS_MCI     9
105	char *name;
106	u32   i2c_mask;
107	u32   board_control;
108	u32   board_control_2;
109
110	u8    port_num;
111	u8    led_num;
112	u8    fan_num;
113	u8    temp_num;
114	u8    temp_bus;
115	u8    con_clock; /* use a continuous clock */
116	u8    ts_quirks;
117#define TS_QUIRK_SERIAL   1
118#define TS_QUIRK_REVERSED 2
119#define TS_QUIRK_ALT_OSC  8
120	u8    mci_ports;
121	u8    mci_type;
122
123	u32   tempmon_irq;
124	const struct ddb_regmap *regmap;
125};
126
127#define DMA_MAX_BUFS 32      /* hardware table limit */
128
129struct ddb;
130struct ddb_port;
131
132struct ddb_dma {
133	void                  *io;
134	u32                    regs;
135	u32                    bufregs;
136
137	dma_addr_t             pbuf[DMA_MAX_BUFS];
138	u8                    *vbuf[DMA_MAX_BUFS];
139	u32                    num;
140	u32                    size;
141	u32                    div;
142	u32                    bufval;
143
144	struct work_struct     work;
145	spinlock_t             lock; /* DMA lock */
146	wait_queue_head_t      wq;
147	int                    running;
148	u32                    stat;
149	u32                    ctrl;
150	u32                    cbuf;
151	u32                    coff;
152};
153
154struct ddb_dvb {
155	struct dvb_adapter    *adap;
156	int                    adap_registered;
157	struct dvb_device     *dev;
158	struct i2c_client     *i2c_client[1];
159	struct dvb_frontend   *fe;
160	struct dvb_frontend   *fe2;
161	struct dmxdev          dmxdev;
162	struct dvb_demux       demux;
163	struct dvb_net         dvbnet;
164	struct dmx_frontend    hw_frontend;
165	struct dmx_frontend    mem_frontend;
166	int                    users;
167	u32                    attached;
168	u8                     input;
169
170	enum fe_sec_tone_mode  tone;
171	enum fe_sec_voltage    voltage;
172
173	int (*i2c_gate_ctrl)(struct dvb_frontend *, int);
174	int (*set_voltage)(struct dvb_frontend *fe,
175			   enum fe_sec_voltage voltage);
176	int (*set_input)(struct dvb_frontend *fe, int input);
177	int (*diseqc_send_master_cmd)(struct dvb_frontend *fe,
178				      struct dvb_diseqc_master_cmd *cmd);
179};
180
181struct ddb_ci {
182	struct dvb_ca_en50221  en;
183	struct ddb_port       *port;
184	u32                    nr;
185};
186
187struct ddb_io {
188	struct ddb_port       *port;
189	u32                    nr;
190	u32                    regs;
191	struct ddb_dma        *dma;
192	struct ddb_io         *redo;
193	struct ddb_io         *redi;
194};
195
196#define ddb_output ddb_io
197#define ddb_input ddb_io
198
199struct ddb_i2c {
200	struct ddb            *dev;
201	u32                    nr;
202	u32                    regs;
203	u32                    link;
204	struct i2c_adapter     adap;
205	u32                    rbuf;
206	u32                    wbuf;
207	u32                    bsize;
208	struct completion      completion;
209};
210
211struct ddb_port {
212	struct ddb            *dev;
213	u32                    nr;
214	u32                    pnr;
215	u32                    regs;
216	u32                    lnr;
217	struct ddb_i2c        *i2c;
218	struct mutex           i2c_gate_lock; /* I2C access lock */
219	u32                    class;
220#define DDB_PORT_NONE           0
221#define DDB_PORT_CI             1
222#define DDB_PORT_TUNER          2
223#define DDB_PORT_LOOP           3
224	char                   *name;
225	char                   *type_name;
226	u32                     type;
227#define DDB_TUNER_DUMMY          0xffffffff
228#define DDB_TUNER_NONE           0
229#define DDB_TUNER_DVBS_ST        1
230#define DDB_TUNER_DVBS_ST_AA     2
231#define DDB_TUNER_DVBCT_TR       3
232#define DDB_TUNER_DVBCT_ST       4
233#define DDB_CI_INTERNAL          5
234#define DDB_CI_EXTERNAL_SONY     6
235#define DDB_TUNER_DVBCT2_SONY_P  7
236#define DDB_TUNER_DVBC2T2_SONY_P 8
237#define DDB_TUNER_ISDBT_SONY_P   9
238#define DDB_TUNER_DVBS_STV0910_P 10
239#define DDB_TUNER_MXL5XX         11
240#define DDB_CI_EXTERNAL_XO2      12
241#define DDB_CI_EXTERNAL_XO2_B    13
242#define DDB_TUNER_DVBS_STV0910_PR 14
243#define DDB_TUNER_DVBC2T2I_SONY_P 15
244
245#define DDB_TUNER_XO2            32
246#define DDB_TUNER_DVBS_STV0910   (DDB_TUNER_XO2 + 0)
247#define DDB_TUNER_DVBCT2_SONY    (DDB_TUNER_XO2 + 1)
248#define DDB_TUNER_ISDBT_SONY     (DDB_TUNER_XO2 + 2)
249#define DDB_TUNER_DVBC2T2_SONY   (DDB_TUNER_XO2 + 3)
250#define DDB_TUNER_ATSC_ST        (DDB_TUNER_XO2 + 4)
251#define DDB_TUNER_DVBC2T2I_SONY  (DDB_TUNER_XO2 + 5)
252
253#define DDB_TUNER_MCI            48
254#define DDB_TUNER_MCI_SX8        (DDB_TUNER_MCI + 0)
255
256	struct ddb_input      *input[2];
257	struct ddb_output     *output;
258	struct dvb_ca_en50221 *en;
259	u8                     en_freedata;
260	struct ddb_dvb         dvb[2];
261	u32                    gap;
262	u32                    obr;
263	u8                     creg;
264};
265
266#define CM_STARTUP_DELAY 2
267#define CM_AVERAGE  20
268#define CM_GAIN     10
269
270#define HW_LSB_SHIFT    12
271#define HW_LSB_MASK     0x1000
272
273#define CM_IDLE    0
274#define CM_STARTUP 1
275#define CM_ADJUST  2
276
277#define TS_CAPTURE_LEN  (4096)
278
279struct ddb_lnb {
280	struct mutex           lock; /* lock lnb access */
281	u32                    tone;
282	enum fe_sec_voltage    oldvoltage[4];
283	u32                    voltage[4];
284	u32                    voltages;
285	u32                    fmode;
286};
287
288struct ddb_irq {
289	void                   (*handler)(void *);
290	void                  *data;
291};
292
293struct ddb_link {
294	struct ddb            *dev;
295	const struct ddb_info *info;
296	u32                    nr;
297	u32                    regs;
298	spinlock_t             lock; /* lock link access */
299	struct mutex           flash_mutex; /* lock flash access */
300	struct ddb_lnb         lnb;
301	struct tasklet_struct  tasklet;
302	struct ddb_ids         ids;
303
304	spinlock_t             temp_lock; /* lock temp chip access */
305	int                    overtemperature_error;
306	u8                     temp_tab[11];
307	struct ddb_irq         irq[256];
308};
309
310struct ddb {
311	struct pci_dev          *pdev;
312	struct platform_device  *pfdev;
313	struct device           *dev;
314
315	int                      msi;
316	struct workqueue_struct *wq;
317	u32                      has_dma;
318
319	struct ddb_link          link[DDB_MAX_LINK];
320	unsigned char __iomem   *regs;
321	u32                      regs_len;
322	u32                      port_num;
323	struct ddb_port          port[DDB_MAX_PORT];
324	u32                      i2c_num;
325	struct ddb_i2c           i2c[DDB_MAX_I2C];
326	struct ddb_input         input[DDB_MAX_INPUT];
327	struct ddb_output        output[DDB_MAX_OUTPUT];
328	struct dvb_adapter       adap[DDB_MAX_INPUT];
329	struct ddb_dma           idma[DDB_MAX_INPUT];
330	struct ddb_dma           odma[DDB_MAX_OUTPUT];
331
332	struct device           *ddb_dev;
333	u32                      ddb_dev_users;
334	u32                      nr;
335	u8                       iobuf[1028];
336
337	u8                       leds;
338	u32                      ts_irq;
339	u32                      i2c_irq;
340
341	struct mutex             mutex; /* lock access to global ddb array */
342
343	u8                       tsbuf[TS_CAPTURE_LEN];
344};
345
346/****************************************************************************/
347/****************************************************************************/
348/****************************************************************************/
349
350int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
351
352/****************************************************************************/
353
354/* ddbridge-core.c */
355struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr,
356			    void (*handler)(void *), void *data);
357void ddb_ports_detach(struct ddb *dev);
358void ddb_ports_release(struct ddb *dev);
359void ddb_buffers_free(struct ddb *dev);
360void ddb_device_destroy(struct ddb *dev);
361irqreturn_t ddb_irq_handler0(int irq, void *dev_id);
362irqreturn_t ddb_irq_handler1(int irq, void *dev_id);
363irqreturn_t ddb_irq_handler(int irq, void *dev_id);
364void ddb_ports_init(struct ddb *dev);
365int ddb_buffers_alloc(struct ddb *dev);
366int ddb_ports_attach(struct ddb *dev);
367int ddb_device_create(struct ddb *dev);
368int ddb_init(struct ddb *dev);
369void ddb_unmap(struct ddb *dev);
370int ddb_exit_ddbridge(int stage, int error);
371int ddb_init_ddbridge(void);
372
373#endif /* _DDBRIDGE_H_ */
374