1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2017-2020 Jacopo Mondi
4 * Copyright (C) 2017-2020 Kieran Bingham
5 * Copyright (C) 2017-2020 Laurent Pinchart
6 * Copyright (C) 2017-2020 Niklas S��derlund
7 * Copyright (C) 2016 Renesas Electronics Corporation
8 * Copyright (C) 2015 Cogent Embedded, Inc.
9 */
10
11#include <linux/i2c.h>
12
13#define MAX9271_DEFAULT_ADDR	0x40
14
15/* Register 0x02 */
16#define MAX9271_SPREAD_SPECT_0		(0 << 5)
17#define MAX9271_SPREAD_SPECT_05		(1 << 5)
18#define MAX9271_SPREAD_SPECT_15		(2 << 5)
19#define MAX9271_SPREAD_SPECT_1		(5 << 5)
20#define MAX9271_SPREAD_SPECT_2		(3 << 5)
21#define MAX9271_SPREAD_SPECT_3		(6 << 5)
22#define MAX9271_SPREAD_SPECT_4		(7 << 5)
23#define MAX9271_R02_RES			BIT(4)
24#define MAX9271_PCLK_AUTODETECT		(3 << 2)
25#define MAX9271_SERIAL_AUTODETECT	(0x03)
26/* Register 0x04 */
27#define MAX9271_SEREN			BIT(7)
28#define MAX9271_CLINKEN			BIT(6)
29#define MAX9271_PRBSEN			BIT(5)
30#define MAX9271_SLEEP			BIT(4)
31#define MAX9271_INTTYPE_I2C		(0 << 2)
32#define MAX9271_INTTYPE_UART		(1 << 2)
33#define MAX9271_INTTYPE_NONE		(2 << 2)
34#define MAX9271_REVCCEN			BIT(1)
35#define MAX9271_FWDCCEN			BIT(0)
36/* Register 0x07 */
37#define MAX9271_DBL			BIT(7)
38#define MAX9271_DRS			BIT(6)
39#define MAX9271_BWS			BIT(5)
40#define MAX9271_ES			BIT(4)
41#define MAX9271_HVEN			BIT(2)
42#define MAX9271_EDC_1BIT_PARITY		(0 << 0)
43#define MAX9271_EDC_6BIT_CRC		(1 << 0)
44#define MAX9271_EDC_6BIT_HAMMING	(2 << 0)
45/* Register 0x08 */
46#define MAX9271_INVVS			BIT(7)
47#define MAX9271_INVHS			BIT(6)
48#define MAX9271_REV_LOGAIN		BIT(3)
49#define MAX9271_REV_HIVTH		BIT(0)
50/* Register 0x09 */
51#define MAX9271_ID			0x09
52/* Register 0x0d */
53#define MAX9271_I2CLOCACK		BIT(7)
54#define MAX9271_I2CSLVSH_1046NS_469NS	(3 << 5)
55#define MAX9271_I2CSLVSH_938NS_352NS	(2 << 5)
56#define MAX9271_I2CSLVSH_469NS_234NS	(1 << 5)
57#define MAX9271_I2CSLVSH_352NS_117NS	(0 << 5)
58#define MAX9271_I2CMSTBT_837KBPS	(7 << 2)
59#define MAX9271_I2CMSTBT_533KBPS	(6 << 2)
60#define MAX9271_I2CMSTBT_339KBPS	(5 << 2)
61#define MAX9271_I2CMSTBT_173KBPS	(4 << 2)
62#define MAX9271_I2CMSTBT_105KBPS	(3 << 2)
63#define MAX9271_I2CMSTBT_84KBPS		(2 << 2)
64#define MAX9271_I2CMSTBT_28KBPS		(1 << 2)
65#define MAX9271_I2CMSTBT_8KBPS		(0 << 2)
66#define MAX9271_I2CSLVTO_NONE		(3 << 0)
67#define MAX9271_I2CSLVTO_1024US		(2 << 0)
68#define MAX9271_I2CSLVTO_256US		(1 << 0)
69#define MAX9271_I2CSLVTO_64US		(0 << 0)
70/* Register 0x0f */
71#define MAX9271_GPIO5OUT		BIT(5)
72#define MAX9271_GPIO4OUT		BIT(4)
73#define MAX9271_GPIO3OUT		BIT(3)
74#define MAX9271_GPIO2OUT		BIT(2)
75#define MAX9271_GPIO1OUT		BIT(1)
76#define MAX9271_GPO			BIT(0)
77/* Register 0x15 */
78#define MAX9271_PCLKDET			BIT(0)
79
80/**
81 * struct max9271_device - max9271 device
82 * @client: The i2c client for the max9271 instance
83 */
84struct max9271_device {
85	struct i2c_client *client;
86};
87
88/**
89 * max9271_wake_up() - Wake up the serializer by issuing an i2c transaction
90 * @dev: The max9271 device
91 *
92 * This function shall be called before any other interaction with the
93 * serializer.
94 */
95void max9271_wake_up(struct max9271_device *dev);
96
97/**
98 * max9271_set_serial_link() - Enable/disable serial link
99 * @dev: The max9271 device
100 * @enable: Serial link enable/disable flag
101 *
102 * Return 0 on success or a negative error code on failure
103 */
104int max9271_set_serial_link(struct max9271_device *dev, bool enable);
105
106/**
107 * max9271_configure_i2c() - Configure I2C bus parameters
108 * @dev: The max9271 device
109 * @i2c_config: The I2C bus configuration bit mask
110 *
111 * Configure MAX9271 I2C interface. The bus configuration provided in the
112 * @i2c_config parameter shall be assembled using bit values defined by the
113 * MAX9271_I2C* macros.
114 *
115 * Return 0 on success or a negative error code on failure
116 */
117int max9271_configure_i2c(struct max9271_device *dev, u8 i2c_config);
118
119/**
120 * max9271_set_high_threshold() - Enable or disable reverse channel high
121 *				  threshold
122 * @dev: The max9271 device
123 * @enable: High threshold enable/disable flag
124 *
125 * Return 0 on success or a negative error code on failure
126 */
127int max9271_set_high_threshold(struct max9271_device *dev, bool enable);
128
129/**
130 * max9271_configure_gmsl_link() - Configure the GMSL link
131 * @dev: The max9271 device
132 *
133 * FIXME: the GMSL link configuration is currently hardcoded and performed
134 * by programming registers 0x04, 0x07 and 0x02.
135 *
136 * Return 0 on success or a negative error code on failure
137 */
138int max9271_configure_gmsl_link(struct max9271_device *dev);
139
140/**
141 * max9271_set_gpios() - Set gpio lines to physical high value
142 * @dev: The max9271 device
143 * @gpio_mask: The mask of gpio lines to set to high value
144 *
145 * The @gpio_mask parameter shall be assembled using the MAX9271_GP[IO|O]*
146 * bit values.
147 *
148 * Return 0 on success or a negative error code on failure
149 */
150int max9271_set_gpios(struct max9271_device *dev, u8 gpio_mask);
151
152/**
153 * max9271_clear_gpios() - Set gpio lines to physical low value
154 * @dev: The max9271 device
155 * @gpio_mask: The mask of gpio lines to set to low value
156 *
157 * The @gpio_mask parameter shall be assembled using the MAX9271_GP[IO|O]*
158 * bit values.
159 *
160 * Return 0 on success or a negative error code on failure
161 */
162int max9271_clear_gpios(struct max9271_device *dev, u8 gpio_mask);
163
164/**
165 * max9271_enable_gpios() - Enable gpio lines
166 * @dev: The max9271 device
167 * @gpio_mask: The mask of gpio lines to enable
168 *
169 * The @gpio_mask parameter shall be assembled using the MAX9271_GPIO*
170 * bit values. GPO line is always enabled by default.
171 *
172 * Return 0 on success or a negative error code on failure
173 */
174int max9271_enable_gpios(struct max9271_device *dev, u8 gpio_mask);
175
176/**
177 * max9271_disable_gpios() - Disable gpio lines
178 * @dev: The max9271 device
179 * @gpio_mask: The mask of gpio lines to disable
180 *
181 * The @gpio_mask parameter shall be assembled using the MAX9271_GPIO*
182 * bit values. GPO line is always enabled by default and cannot be disabled.
183 *
184 * Return 0 on success or a negative error code on failure
185 */
186int max9271_disable_gpios(struct max9271_device *dev, u8 gpio_mask);
187
188/**
189 * max9271_verify_id() - Read and verify MAX9271 id
190 * @dev: The max9271 device
191 *
192 * Return 0 on success or a negative error code on failure
193 */
194int max9271_verify_id(struct max9271_device *dev);
195
196/**
197 * max9271_set_address() - Program a new I2C address
198 * @dev: The max9271 device
199 * @addr: The new I2C address in 7-bit format
200 *
201 * This function only takes care of programming the new I2C address @addr to
202 * in the MAX9271 chip registers, it is responsiblity of the caller to set
203 * the i2c address client to the @addr value to be able to communicate with
204 * the MAX9271 chip using the I2C framework APIs after this function returns.
205 *
206 * Return 0 on success or a negative error code on failure
207 */
208int max9271_set_address(struct max9271_device *dev, u8 addr);
209
210/**
211 * max9271_set_deserializer_address() - Program the remote deserializer address
212 * @dev: The max9271 device
213 * @addr: The deserializer I2C address in 7-bit format
214 *
215 * Return 0 on success or a negative error code on failure
216 */
217int max9271_set_deserializer_address(struct max9271_device *dev, u8 addr);
218
219/**
220 * max9271_set_translation() - Program I2C address translation
221 * @dev: The max9271 device
222 * @source: The I2C source address
223 * @dest: The I2C destination address
224 *
225 * Program address translation from @source to @dest. This is required to
226 * communicate with local devices that do not support address reprogramming.
227 *
228 * TODO: The device supports translation of two address, this function currently
229 * supports a single one.
230 *
231 * Return 0 on success or a negative error code on failure
232 */
233int max9271_set_translation(struct max9271_device *dev, u8 source, u8 dest);
234