1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III
4 * flexcop-reg.h - register abstraction for FlexCopII, FlexCopIIb and FlexCopIII
5 * see flexcop.c for copyright information
6 */
7#ifndef __FLEXCOP_REG_H__
8#define __FLEXCOP_REG_H__
9
10typedef enum {
11	FLEXCOP_UNK = 0,
12	FLEXCOP_II,
13	FLEXCOP_IIB,
14	FLEXCOP_III,
15} flexcop_revision_t;
16
17typedef enum {
18	FC_UNK = 0,
19	FC_CABLE,
20	FC_AIR_DVBT,
21	FC_AIR_ATSC1,
22	FC_AIR_ATSC2,
23	FC_AIR_ATSC3,
24	FC_SKY_REV23,
25	FC_SKY_REV26,
26	FC_SKY_REV27,
27	FC_SKY_REV28,
28	FC_SKYS2_REV33,
29} flexcop_device_type_t;
30
31typedef enum {
32	FC_USB = 0,
33	FC_PCI,
34} flexcop_bus_t;
35
36/* FlexCop IBI Registers */
37#if defined(__LITTLE_ENDIAN)
38#include "flexcop_ibi_value_le.h"
39#else
40#if defined(__BIG_ENDIAN)
41#include "flexcop_ibi_value_be.h"
42#else
43#error no endian defined
44#endif
45#endif
46
47#define fc_data_Tag_ID_DVB  0x3e
48#define fc_data_Tag_ID_ATSC 0x3f
49#define fc_data_Tag_ID_IDSB 0x8b
50
51#define fc_key_code_default 0x1
52#define fc_key_code_even    0x2
53#define fc_key_code_odd     0x3
54
55extern flexcop_ibi_value ibi_zero;
56
57typedef enum {
58	FC_I2C_PORT_DEMOD  = 1,
59	FC_I2C_PORT_EEPROM = 2,
60	FC_I2C_PORT_TUNER  = 3,
61} flexcop_i2c_port_t;
62
63typedef enum {
64	FC_WRITE = 0,
65	FC_READ  = 1,
66} flexcop_access_op_t;
67
68typedef enum {
69	FC_SRAM_DEST_NET   = 1,
70	FC_SRAM_DEST_CAI   = 2,
71	FC_SRAM_DEST_CAO   = 4,
72	FC_SRAM_DEST_MEDIA = 8
73} flexcop_sram_dest_t;
74
75typedef enum {
76	FC_SRAM_DEST_TARGET_WAN_USB = 0,
77	FC_SRAM_DEST_TARGET_DMA1    = 1,
78	FC_SRAM_DEST_TARGET_DMA2    = 2,
79	FC_SRAM_DEST_TARGET_FC3_CA  = 3
80} flexcop_sram_dest_target_t;
81
82typedef enum {
83	FC_SRAM_2_32KB  = 0, /*  64KB */
84	FC_SRAM_1_32KB  = 1, /*  32KB - default fow FCII */
85	FC_SRAM_1_128KB = 2, /* 128KB */
86	FC_SRAM_1_48KB  = 3, /*  48KB - default for FCIII */
87} flexcop_sram_type_t;
88
89typedef enum {
90	FC_WAN_SPEED_4MBITS  = 0,
91	FC_WAN_SPEED_8MBITS  = 1,
92	FC_WAN_SPEED_12MBITS = 2,
93	FC_WAN_SPEED_16MBITS = 3,
94} flexcop_wan_speed_t;
95
96typedef enum {
97	FC_DMA_1 = 1,
98	FC_DMA_2 = 2,
99} flexcop_dma_index_t;
100
101typedef enum {
102	FC_DMA_SUBADDR_0 = 1,
103	FC_DMA_SUBADDR_1 = 2,
104} flexcop_dma_addr_index_t;
105
106/* names of the particular registers */
107typedef enum {
108	dma1_000            = 0x000,
109	dma1_004            = 0x004,
110	dma1_008            = 0x008,
111	dma1_00c            = 0x00c,
112	dma2_010            = 0x010,
113	dma2_014            = 0x014,
114	dma2_018            = 0x018,
115	dma2_01c            = 0x01c,
116
117	tw_sm_c_100         = 0x100,
118	tw_sm_c_104         = 0x104,
119	tw_sm_c_108         = 0x108,
120	tw_sm_c_10c         = 0x10c,
121	tw_sm_c_110         = 0x110,
122
123	lnb_switch_freq_200 = 0x200,
124	misc_204            = 0x204,
125	ctrl_208            = 0x208,
126	irq_20c             = 0x20c,
127	sw_reset_210        = 0x210,
128	misc_214            = 0x214,
129	mbox_v8_to_host_218 = 0x218,
130	mbox_host_to_v8_21c = 0x21c,
131
132	pid_filter_300      = 0x300,
133	pid_filter_304      = 0x304,
134	pid_filter_308      = 0x308,
135	pid_filter_30c      = 0x30c,
136	index_reg_310       = 0x310,
137	pid_n_reg_314       = 0x314,
138	mac_low_reg_318     = 0x318,
139	mac_high_reg_31c    = 0x31c,
140
141	data_tag_400        = 0x400,
142	card_id_408         = 0x408,
143	card_id_40c         = 0x40c,
144	mac_address_418     = 0x418,
145	mac_address_41c     = 0x41c,
146
147	ci_600              = 0x600,
148	pi_604              = 0x604,
149	pi_608              = 0x608,
150	dvb_reg_60c         = 0x60c,
151
152	sram_ctrl_reg_700   = 0x700,
153	net_buf_reg_704     = 0x704,
154	cai_buf_reg_708     = 0x708,
155	cao_buf_reg_70c     = 0x70c,
156	media_buf_reg_710   = 0x710,
157	sram_dest_reg_714   = 0x714,
158	net_buf_reg_718     = 0x718,
159	wan_ctrl_reg_71c    = 0x71c,
160} flexcop_ibi_register;
161
162#define flexcop_set_ibi_value(reg,attr,val) { \
163	flexcop_ibi_value v = fc->read_ibi_reg(fc,reg); \
164	v.reg.attr = val; \
165	fc->write_ibi_reg(fc,reg,v); \
166}
167
168#endif
169