1238104Sdes# SPDX-License-Identifier: GPL-2.0-only 2238104Sdesmenu "IRQ chip support" 3238104Sdes 4238104Sdesconfig IRQCHIP 5238104Sdes def_bool y 6238104Sdes depends on (OF_IRQ || ACPI_GENERIC_GSI) 7238104Sdes 8238104Sdesconfig ARM_GIC 9238104Sdes bool 10238104Sdes depends on OF 11238104Sdes select IRQ_DOMAIN_HIERARCHY 12238104Sdes select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 13238104Sdes 14238104Sdesconfig ARM_GIC_PM 15238104Sdes bool 16238104Sdes depends on PM 17238104Sdes select ARM_GIC 18238104Sdes 19238104Sdesconfig ARM_GIC_MAX_NR 20238104Sdes int 21238104Sdes depends on ARM_GIC 22238104Sdes default 2 if ARCH_REALVIEW 23238104Sdes default 1 24238104Sdes 25238104Sdesconfig ARM_GIC_V2M 26238104Sdes bool 27238104Sdes depends on PCI 28238104Sdes select ARM_GIC 29238104Sdes select PCI_MSI 30238104Sdes 31238104Sdesconfig GIC_NON_BANKED 32238104Sdes bool 33238104Sdes 34238104Sdesconfig ARM_GIC_V3 35238104Sdes bool 36238104Sdes select IRQ_DOMAIN_HIERARCHY 37238104Sdes select PARTITION_PERCPU 38238104Sdes select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 39238104Sdes select HAVE_ARM_SMCCC_DISCOVERY 40238104Sdes 41238104Sdesconfig ARM_GIC_V3_ITS 42238104Sdes bool 43238104Sdes select GENERIC_MSI_IRQ 44238104Sdes default ARM_GIC_V3 45238104Sdes 46238104Sdesconfig ARM_GIC_V3_ITS_PCI 47238104Sdes bool 48238104Sdes depends on ARM_GIC_V3_ITS 49238104Sdes depends on PCI 50238104Sdes depends on PCI_MSI 51238104Sdes default ARM_GIC_V3_ITS 52238104Sdes 53238104Sdesconfig ARM_GIC_V3_ITS_FSL_MC 54238104Sdes bool 55238104Sdes depends on ARM_GIC_V3_ITS 56238104Sdes depends on FSL_MC_BUS 57238104Sdes default ARM_GIC_V3_ITS 58238104Sdes 59238104Sdesconfig ARM_NVIC 60238104Sdes bool 61238104Sdes select IRQ_DOMAIN_HIERARCHY 62238104Sdes select GENERIC_IRQ_CHIP 63238104Sdes 64238104Sdesconfig ARM_VIC 65238104Sdes bool 66238104Sdes select IRQ_DOMAIN 67238104Sdes 68238104Sdesconfig ARM_VIC_NR 69238104Sdes int 70238104Sdes default 4 if ARCH_S5PV210 71238104Sdes default 2 72238104Sdes depends on ARM_VIC 73238104Sdes help 74238104Sdes The maximum number of VICs available in the system, for 75238104Sdes power management. 76238104Sdes 77238104Sdesconfig ARMADA_370_XP_IRQ 78238104Sdes bool 79238104Sdes select GENERIC_IRQ_CHIP 80238104Sdes select PCI_MSI if PCI 81238104Sdes select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 82238104Sdes 83238104Sdesconfig ALPINE_MSI 84266114Sdes bool 85238104Sdes depends on PCI 86238104Sdes select PCI_MSI 87238104Sdes select GENERIC_IRQ_CHIP 88238104Sdes 89238104Sdesconfig AL_FIC 90238104Sdes bool "Amazon's Annapurna Labs Fabric Interrupt Controller" 91238104Sdes depends on OF 92238104Sdes depends on HAS_IOMEM 93238104Sdes select GENERIC_IRQ_CHIP 94238104Sdes select IRQ_DOMAIN 95238104Sdes help 96238104Sdes Support Amazon's Annapurna Labs Fabric Interrupt Controller. 97238104Sdes 98238104Sdesconfig ATMEL_AIC_IRQ 99238104Sdes bool 100238104Sdes select GENERIC_IRQ_CHIP 101238104Sdes select IRQ_DOMAIN 102238104Sdes select SPARSE_IRQ 103238104Sdes 104238104Sdesconfig ATMEL_AIC5_IRQ 105238104Sdes bool 106238104Sdes select GENERIC_IRQ_CHIP 107238104Sdes select IRQ_DOMAIN 108238104Sdes select SPARSE_IRQ 109238104Sdes 110238104Sdesconfig I8259 111238104Sdes bool 112238104Sdes select IRQ_DOMAIN 113238104Sdes 114238104Sdesconfig BCM6345_L1_IRQ 115238104Sdes bool 116238104Sdes select GENERIC_IRQ_CHIP 117238104Sdes select IRQ_DOMAIN 118238104Sdes select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 119238104Sdes 120238104Sdesconfig BCM7038_L1_IRQ 121238104Sdes tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" 122238104Sdes depends on ARCH_BRCMSTB || BMIPS_GENERIC 123238104Sdes default ARCH_BRCMSTB || BMIPS_GENERIC 124238104Sdes select GENERIC_IRQ_CHIP 125238104Sdes select IRQ_DOMAIN 126238104Sdes select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 127238104Sdes 128238104Sdesconfig BCM7120_L2_IRQ 129238104Sdes tristate "Broadcom STB 7120-style L2 interrupt controller driver" 130238104Sdes depends on ARCH_BRCMSTB || BMIPS_GENERIC 131238104Sdes default ARCH_BRCMSTB || BMIPS_GENERIC 132238104Sdes select GENERIC_IRQ_CHIP 133238104Sdes select IRQ_DOMAIN 134238104Sdes 135238104Sdesconfig BRCMSTB_L2_IRQ 136238104Sdes tristate "Broadcom STB generic L2 interrupt controller driver" 137238104Sdes depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 138238104Sdes default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 139238104Sdes select GENERIC_IRQ_CHIP 140238104Sdes select IRQ_DOMAIN 141238104Sdes 142238104Sdesconfig DAVINCI_CP_INTC 143266114Sdes bool 144238104Sdes select GENERIC_IRQ_CHIP 145238104Sdes select IRQ_DOMAIN 146266114Sdes 147238104Sdesconfig DW_APB_ICTL 148238104Sdes bool 149238104Sdes select GENERIC_IRQ_CHIP 150238104Sdes select IRQ_DOMAIN_HIERARCHY 151238104Sdes 152238104Sdesconfig FARADAY_FTINTC010 153238104Sdes bool 154238104Sdes select IRQ_DOMAIN 155238104Sdes select SPARSE_IRQ 156238104Sdes 157238104Sdesconfig HISILICON_IRQ_MBIGEN 158238104Sdes bool 159238104Sdes select ARM_GIC_V3 160238104Sdes select ARM_GIC_V3_ITS 161238104Sdes 162238104Sdesconfig IMGPDC_IRQ 163238104Sdes bool 164238104Sdes select GENERIC_IRQ_CHIP 165238104Sdes select IRQ_DOMAIN 166238104Sdes 167238104Sdesconfig IXP4XX_IRQ 168238104Sdes bool 169238104Sdes select IRQ_DOMAIN 170238104Sdes select SPARSE_IRQ 171238104Sdes 172238104Sdesconfig MADERA_IRQ 173238104Sdes tristate 174238104Sdes 175238104Sdesconfig IRQ_MIPS_CPU 176238104Sdes bool 177238104Sdes select GENERIC_IRQ_CHIP 178238104Sdes select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING 179266114Sdes select IRQ_DOMAIN 180238104Sdes select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 181238104Sdes 182238104Sdesconfig CLPS711X_IRQCHIP 183238104Sdes bool 184238104Sdes depends on ARCH_CLPS711X 185238104Sdes select IRQ_DOMAIN 186238104Sdes select SPARSE_IRQ 187238104Sdes default y 188238104Sdes 189238104Sdesconfig OMPIC 190238104Sdes bool 191238104Sdes 192238104Sdesconfig OR1K_PIC 193238104Sdes bool 194238104Sdes select IRQ_DOMAIN 195238104Sdes 196238104Sdesconfig OMAP_IRQCHIP 197238104Sdes bool 198238104Sdes select GENERIC_IRQ_CHIP 199238104Sdes select IRQ_DOMAIN 200238104Sdes 201238104Sdesconfig ORION_IRQCHIP 202238104Sdes bool 203238104Sdes select IRQ_DOMAIN 204238104Sdes 205238104Sdesconfig PIC32_EVIC 206266114Sdes bool 207266114Sdes select GENERIC_IRQ_CHIP 208238104Sdes select IRQ_DOMAIN 209238104Sdes 210238104Sdesconfig JCORE_AIC 211238104Sdes bool "J-Core integrated AIC" if COMPILE_TEST 212238104Sdes depends on OF 213238104Sdes select IRQ_DOMAIN 214238104Sdes help 215238104Sdes Support for the J-Core integrated AIC. 216238104Sdes 217238104Sdesconfig RDA_INTC 218238104Sdes bool 219266114Sdes select IRQ_DOMAIN 220238104Sdes 221238104Sdesconfig RENESAS_INTC_IRQPIN 222238104Sdes bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST 223238104Sdes select IRQ_DOMAIN 224238104Sdes help 225238104Sdes Enable support for the Renesas Interrupt Controller for external 226238104Sdes interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs. 227238104Sdes 228238104Sdesconfig RENESAS_IRQC 229238104Sdes bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST 230238104Sdes select GENERIC_IRQ_CHIP 231238104Sdes select IRQ_DOMAIN 232238104Sdes help 233238104Sdes Enable support for the Renesas Interrupt Controller for external 234238104Sdes devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs. 235238104Sdes 236238104Sdesconfig RENESAS_RZA1_IRQC 237238104Sdes bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST 238238104Sdes select IRQ_DOMAIN_HIERARCHY 239238104Sdes help 240238104Sdes Enable support for the Renesas RZ/A1 Interrupt Controller, to use up 241238104Sdes to 8 external interrupts with configurable sense select. 242238104Sdes 243238104Sdesconfig RENESAS_RZG2L_IRQC 244238104Sdes bool "Renesas RZ/G2L (and alike SoC) IRQC support" if COMPILE_TEST 245266114Sdes select GENERIC_IRQ_CHIP 246266114Sdes select IRQ_DOMAIN_HIERARCHY 247238104Sdes help 248238104Sdes Enable support for the Renesas RZ/G2L (and alike SoC) Interrupt Controller 249238104Sdes for external devices. 250238104Sdes 251238104Sdesconfig SL28CPLD_INTC 252238104Sdes bool "Kontron sl28cpld IRQ controller" 253238104Sdes depends on MFD_SL28CPLD=y || COMPILE_TEST 254238104Sdes select REGMAP_IRQ 255238104Sdes help 256238104Sdes Interrupt controller driver for the board management controller 257238104Sdes found on the Kontron sl28 CPLD. 258238104Sdes 259238104Sdesconfig ST_IRQCHIP 260238104Sdes bool 261238104Sdes select REGMAP 262238104Sdes select MFD_SYSCON 263238104Sdes help 264238104Sdes Enables SysCfg Controlled IRQs on STi based platforms. 265238104Sdes 266238104Sdesconfig SUN4I_INTC 267238104Sdes bool 268238104Sdes 269238104Sdesconfig SUN6I_R_INTC 270238104Sdes bool 271238104Sdes select IRQ_DOMAIN_HIERARCHY 272238104Sdes select IRQ_FASTEOI_HIERARCHY_HANDLERS 273238104Sdes 274238104Sdesconfig SUNXI_NMI_INTC 275238104Sdes bool 276238104Sdes select GENERIC_IRQ_CHIP 277238104Sdes 278238104Sdesconfig TB10X_IRQC 279238104Sdes bool 280238104Sdes select IRQ_DOMAIN 281238104Sdes select GENERIC_IRQ_CHIP 282238104Sdes 283238104Sdesconfig TS4800_IRQ 284238104Sdes tristate "TS-4800 IRQ controller" 285238104Sdes select IRQ_DOMAIN 286238104Sdes depends on HAS_IOMEM 287238104Sdes depends on SOC_IMX51 || COMPILE_TEST 288238104Sdes help 289238104Sdes Support for the TS-4800 FPGA IRQ controller 290238104Sdes 291238104Sdesconfig VERSATILE_FPGA_IRQ 292238104Sdes bool 293238104Sdes select IRQ_DOMAIN 294238104Sdes 295238104Sdesconfig VERSATILE_FPGA_IRQ_NR 296238104Sdes int 297238104Sdes default 4 298238104Sdes depends on VERSATILE_FPGA_IRQ 299238104Sdes 300238104Sdesconfig XTENSA_MX 301238104Sdes bool 302238104Sdes select IRQ_DOMAIN 303238104Sdes select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 304238104Sdes 305238104Sdesconfig XILINX_INTC 306238104Sdes bool "Xilinx Interrupt Controller IP" 307238104Sdes depends on OF_ADDRESS 308238104Sdes select IRQ_DOMAIN 309238104Sdes help 310238104Sdes Support for the Xilinx Interrupt Controller IP core. 311238104Sdes This is used as a primary controller with MicroBlaze and can also 312238104Sdes be used as a secondary chained controller on other platforms. 313238104Sdes 314238104Sdesconfig IRQ_CROSSBAR 315238104Sdes bool 316238104Sdes help 317238104Sdes Support for a CROSSBAR ip that precedes the main interrupt controller. 318238104Sdes The primary irqchip invokes the crossbar's callback which inturn allocates 319238104Sdes a free irq and configures the IP. Thus the peripheral interrupts are 320238104Sdes routed to one of the free irqchip interrupt lines. 321238104Sdes 322238104Sdesconfig KEYSTONE_IRQ 323238104Sdes tristate "Keystone 2 IRQ controller IP" 324238104Sdes depends on ARCH_KEYSTONE 325238104Sdes help 326238104Sdes Support for Texas Instruments Keystone 2 IRQ controller IP which 327238104Sdes is part of the Keystone 2 IPC mechanism 328238104Sdes 329238104Sdesconfig MIPS_GIC 330238104Sdes bool 331238104Sdes select GENERIC_IRQ_IPI if SMP 332238104Sdes select IRQ_DOMAIN_HIERARCHY 333238104Sdes select MIPS_CM 334238104Sdes 335238104Sdesconfig INGENIC_IRQ 336238104Sdes bool 337238104Sdes depends on MACH_INGENIC 338238104Sdes default y 339238104Sdes 340238104Sdesconfig INGENIC_TCU_IRQ 341238104Sdes bool "Ingenic JZ47xx TCU interrupt controller" 342238104Sdes default MACH_INGENIC 343238104Sdes depends on MIPS || COMPILE_TEST 344238104Sdes select MFD_SYSCON 345238104Sdes select GENERIC_IRQ_CHIP 346238104Sdes help 347238104Sdes Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic 348238104Sdes JZ47xx SoCs. 349238104Sdes 350246854Sdes If unsure, say N. 351238104Sdes 352238104Sdesconfig IMX_GPCV2 353238104Sdes bool 354238104Sdes select IRQ_DOMAIN 355238104Sdes help 356238104Sdes Enables the wakeup IRQs for IMX platforms with GPCv2 block 357238104Sdes 358238104Sdesconfig IRQ_MXS 359238104Sdes def_bool y if MACH_ASM9260 || ARCH_MXS 360238104Sdes select IRQ_DOMAIN 361238104Sdes select STMP_DEVICE 362238104Sdes 363238104Sdesconfig MSCC_OCELOT_IRQ 364238104Sdes bool 365238104Sdes select IRQ_DOMAIN 366238104Sdes select GENERIC_IRQ_CHIP 367238104Sdes 368246854Sdesconfig MVEBU_GICP 369238104Sdes bool 370238104Sdes 371238104Sdesconfig MVEBU_ICU 372238104Sdes bool 373238104Sdes 374238104Sdesconfig MVEBU_ODMI 375238104Sdes bool 376238104Sdes select GENERIC_MSI_IRQ 377238104Sdes 378238104Sdesconfig MVEBU_PIC 379238104Sdes bool 380238104Sdes 381238104Sdesconfig MVEBU_SEI 382238104Sdes bool 383238104Sdes 384238104Sdesconfig LS_EXTIRQ 385238104Sdes def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 386246854Sdes select MFD_SYSCON 387238104Sdes 388238104Sdesconfig LS_SCFG_MSI 389238104Sdes def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 390238104Sdes depends on PCI_MSI 391 392config PARTITION_PERCPU 393 bool 394 395config STM32_EXTI 396 bool 397 select IRQ_DOMAIN 398 select GENERIC_IRQ_CHIP 399 400config QCOM_IRQ_COMBINER 401 bool "QCOM IRQ combiner support" 402 depends on ARCH_QCOM && ACPI 403 select IRQ_DOMAIN_HIERARCHY 404 help 405 Say yes here to add support for the IRQ combiner devices embedded 406 in Qualcomm Technologies chips. 407 408config IRQ_UNIPHIER_AIDET 409 bool "UniPhier AIDET support" if COMPILE_TEST 410 depends on ARCH_UNIPHIER || COMPILE_TEST 411 default ARCH_UNIPHIER 412 select IRQ_DOMAIN_HIERARCHY 413 help 414 Support for the UniPhier AIDET (ARM Interrupt Detector). 415 416config MESON_IRQ_GPIO 417 tristate "Meson GPIO Interrupt Multiplexer" 418 depends on ARCH_MESON || COMPILE_TEST 419 default ARCH_MESON 420 select IRQ_DOMAIN_HIERARCHY 421 help 422 Support Meson SoC Family GPIO Interrupt Multiplexer 423 424config GOLDFISH_PIC 425 bool "Goldfish programmable interrupt controller" 426 depends on MIPS && (GOLDFISH || COMPILE_TEST) 427 select GENERIC_IRQ_CHIP 428 select IRQ_DOMAIN 429 help 430 Say yes here to enable Goldfish interrupt controller driver used 431 for Goldfish based virtual platforms. 432 433config QCOM_PDC 434 tristate "QCOM PDC" 435 depends on ARCH_QCOM 436 select IRQ_DOMAIN_HIERARCHY 437 help 438 Power Domain Controller driver to manage and configure wakeup 439 IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 440 441config QCOM_MPM 442 tristate "QCOM MPM" 443 depends on ARCH_QCOM 444 depends on MAILBOX 445 select IRQ_DOMAIN_HIERARCHY 446 help 447 MSM Power Manager driver to manage and configure wakeup 448 IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 449 450config CSKY_MPINTC 451 bool 452 depends on CSKY 453 help 454 Say yes here to enable C-SKY SMP interrupt controller driver used 455 for C-SKY SMP system. 456 In fact it's not mmio map in hardware and it uses ld/st to visit the 457 controller's register inside CPU. 458 459config CSKY_APB_INTC 460 bool "C-SKY APB Interrupt Controller" 461 depends on CSKY 462 help 463 Say yes here to enable C-SKY APB interrupt controller driver used 464 by C-SKY single core SOC system. It uses mmio map apb-bus to visit 465 the controller's register. 466 467config IMX_IRQSTEER 468 bool "i.MX IRQSTEER support" 469 depends on ARCH_MXC || COMPILE_TEST 470 default ARCH_MXC 471 select IRQ_DOMAIN 472 help 473 Support for the i.MX IRQSTEER interrupt multiplexer/remapper. 474 475config IMX_INTMUX 476 bool "i.MX INTMUX support" if COMPILE_TEST 477 default y if ARCH_MXC 478 select IRQ_DOMAIN 479 help 480 Support for the i.MX INTMUX interrupt multiplexer. 481 482config IMX_MU_MSI 483 tristate "i.MX MU used as MSI controller" 484 depends on OF && HAS_IOMEM 485 depends on ARCH_MXC || COMPILE_TEST 486 default m if ARCH_MXC 487 select IRQ_DOMAIN 488 select IRQ_DOMAIN_HIERARCHY 489 select GENERIC_MSI_IRQ 490 help 491 Provide a driver for the i.MX Messaging Unit block used as a 492 CPU-to-CPU MSI controller. This requires a specially crafted DT 493 to make use of this driver. 494 495 If unsure, say N 496 497config LS1X_IRQ 498 bool "Loongson-1 Interrupt Controller" 499 depends on MACH_LOONGSON32 500 default y 501 select IRQ_DOMAIN 502 select GENERIC_IRQ_CHIP 503 help 504 Support for the Loongson-1 platform Interrupt Controller. 505 506config TI_SCI_INTR_IRQCHIP 507 bool 508 depends on TI_SCI_PROTOCOL 509 select IRQ_DOMAIN_HIERARCHY 510 help 511 This enables the irqchip driver support for K3 Interrupt router 512 over TI System Control Interface available on some new TI's SoCs. 513 If you wish to use interrupt router irq resources managed by the 514 TI System Controller, say Y here. Otherwise, say N. 515 516config TI_SCI_INTA_IRQCHIP 517 bool 518 depends on TI_SCI_PROTOCOL 519 select IRQ_DOMAIN_HIERARCHY 520 select TI_SCI_INTA_MSI_DOMAIN 521 help 522 This enables the irqchip driver support for K3 Interrupt aggregator 523 over TI System Control Interface available on some new TI's SoCs. 524 If you wish to use interrupt aggregator irq resources managed by the 525 TI System Controller, say Y here. Otherwise, say N. 526 527config TI_PRUSS_INTC 528 tristate 529 depends on TI_PRUSS 530 default TI_PRUSS 531 select IRQ_DOMAIN 532 help 533 This enables support for the PRU-ICSS Local Interrupt Controller 534 present within a PRU-ICSS subsystem present on various TI SoCs. 535 The PRUSS INTC enables various interrupts to be routed to multiple 536 different processors within the SoC. 537 538config RISCV_INTC 539 bool 540 depends on RISCV 541 select IRQ_DOMAIN_HIERARCHY 542 543config SIFIVE_PLIC 544 bool 545 depends on RISCV 546 select IRQ_DOMAIN_HIERARCHY 547 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 548 549config STARFIVE_JH8100_INTC 550 bool "StarFive JH8100 External Interrupt Controller" 551 depends on ARCH_STARFIVE || COMPILE_TEST 552 default ARCH_STARFIVE 553 select IRQ_DOMAIN_HIERARCHY 554 help 555 This enables support for the INTC chip found in StarFive JH8100 556 SoC. 557 558 If you don't know what to do here, say Y. 559 560config EXYNOS_IRQ_COMBINER 561 bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST 562 depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST 563 help 564 Say yes here to add support for the IRQ combiner devices embedded 565 in Samsung Exynos chips. 566 567config IRQ_LOONGARCH_CPU 568 bool 569 select GENERIC_IRQ_CHIP 570 select IRQ_DOMAIN 571 select GENERIC_IRQ_EFFECTIVE_AFF_MASK 572 select LOONGSON_HTVEC 573 select LOONGSON_LIOINTC 574 select LOONGSON_EIOINTC 575 select LOONGSON_PCH_PIC 576 select LOONGSON_PCH_MSI 577 select LOONGSON_PCH_LPC 578 help 579 Support for the LoongArch CPU Interrupt Controller. For details of 580 irq chip hierarchy on LoongArch platforms please read the document 581 Documentation/arch/loongarch/irq-chip-model.rst. 582 583config LOONGSON_LIOINTC 584 bool "Loongson Local I/O Interrupt Controller" 585 depends on MACH_LOONGSON64 586 default y 587 select IRQ_DOMAIN 588 select GENERIC_IRQ_CHIP 589 help 590 Support for the Loongson Local I/O Interrupt Controller. 591 592config LOONGSON_EIOINTC 593 bool "Loongson Extend I/O Interrupt Controller" 594 depends on LOONGARCH 595 depends on MACH_LOONGSON64 596 default MACH_LOONGSON64 597 select IRQ_DOMAIN_HIERARCHY 598 select GENERIC_IRQ_CHIP 599 help 600 Support for the Loongson3 Extend I/O Interrupt Vector Controller. 601 602config LOONGSON_HTPIC 603 bool "Loongson3 HyperTransport PIC Controller" 604 depends on MACH_LOONGSON64 && MIPS 605 default y 606 select IRQ_DOMAIN 607 select GENERIC_IRQ_CHIP 608 help 609 Support for the Loongson-3 HyperTransport PIC Controller. 610 611config LOONGSON_HTVEC 612 bool "Loongson HyperTransport Interrupt Vector Controller" 613 depends on MACH_LOONGSON64 614 default MACH_LOONGSON64 615 select IRQ_DOMAIN_HIERARCHY 616 help 617 Support for the Loongson HyperTransport Interrupt Vector Controller. 618 619config LOONGSON_PCH_PIC 620 bool "Loongson PCH PIC Controller" 621 depends on MACH_LOONGSON64 622 default MACH_LOONGSON64 623 select IRQ_DOMAIN_HIERARCHY 624 select IRQ_FASTEOI_HIERARCHY_HANDLERS 625 help 626 Support for the Loongson PCH PIC Controller. 627 628config LOONGSON_PCH_MSI 629 bool "Loongson PCH MSI Controller" 630 depends on MACH_LOONGSON64 631 depends on PCI 632 default MACH_LOONGSON64 633 select IRQ_DOMAIN_HIERARCHY 634 select PCI_MSI 635 help 636 Support for the Loongson PCH MSI Controller. 637 638config LOONGSON_PCH_LPC 639 bool "Loongson PCH LPC Controller" 640 depends on LOONGARCH 641 depends on MACH_LOONGSON64 642 default MACH_LOONGSON64 643 select IRQ_DOMAIN_HIERARCHY 644 help 645 Support for the Loongson PCH LPC Controller. 646 647config MST_IRQ 648 bool "MStar Interrupt Controller" 649 depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST 650 default ARCH_MEDIATEK 651 select IRQ_DOMAIN 652 select IRQ_DOMAIN_HIERARCHY 653 help 654 Support MStar Interrupt Controller. 655 656config WPCM450_AIC 657 bool "Nuvoton WPCM450 Advanced Interrupt Controller" 658 depends on ARCH_WPCM450 659 help 660 Support for the interrupt controller in the Nuvoton WPCM450 BMC SoC. 661 662config IRQ_IDT3243X 663 bool 664 select GENERIC_IRQ_CHIP 665 select IRQ_DOMAIN 666 667config APPLE_AIC 668 bool "Apple Interrupt Controller (AIC)" 669 depends on ARM64 670 depends on ARCH_APPLE || COMPILE_TEST 671 select GENERIC_IRQ_IPI_MUX 672 help 673 Support for the Apple Interrupt Controller found on Apple Silicon SoCs, 674 such as the M1. 675 676config MCHP_EIC 677 bool "Microchip External Interrupt Controller" 678 depends on ARCH_AT91 || COMPILE_TEST 679 select IRQ_DOMAIN 680 select IRQ_DOMAIN_HIERARCHY 681 help 682 Support for Microchip External Interrupt Controller. 683 684config SUNPLUS_SP7021_INTC 685 bool "Sunplus SP7021 interrupt controller" if COMPILE_TEST 686 default SOC_SP7021 687 help 688 Support for the Sunplus SP7021 Interrupt Controller IP core. 689 SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a 690 chained controller, routing all interrupt source in P-Chip to 691 the primary controller on C-Chip. 692 693endmenu 694