1/* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Slow Path Operators (header) 37 * 38 */ 39 40#ifndef __BNXT_RE_H__ 41#define __BNXT_RE_H__ 42#include <rdma/uverbs_ioctl.h> 43#include "hw_counters.h" 44#include <linux/hashtable.h> 45#define ROCE_DRV_MODULE_NAME "bnxt_re" 46 47#define BNXT_RE_DESC "Broadcom NetXtreme-C/E RoCE Driver" 48 49#define BNXT_RE_PAGE_SHIFT_1G (30) 50#define BNXT_RE_PAGE_SIZE_SUPPORTED 0x7FFFF000 /* 4kb - 1G */ 51 52#define BNXT_RE_MAX_MR_SIZE_LOW BIT_ULL(BNXT_RE_PAGE_SHIFT_1G) 53#define BNXT_RE_MAX_MR_SIZE_HIGH BIT_ULL(39) 54#define BNXT_RE_MAX_MR_SIZE BNXT_RE_MAX_MR_SIZE_HIGH 55 56#define BNXT_RE_MAX_QPC_COUNT (64 * 1024) 57#define BNXT_RE_MAX_MRW_COUNT (64 * 1024) 58#define BNXT_RE_MAX_SRQC_COUNT (64 * 1024) 59#define BNXT_RE_MAX_CQ_COUNT (64 * 1024) 60#define BNXT_RE_MAX_MRW_COUNT_64K (64 * 1024) 61#define BNXT_RE_MAX_MRW_COUNT_256K (256 * 1024) 62 63/* Number of MRs to reserve for PF, leaving remainder for VFs */ 64#define BNXT_RE_RESVD_MR_FOR_PF (32 * 1024) 65#define BNXT_RE_MAX_GID_PER_VF 128 66 67/* 68 * Percentage of resources of each type reserved for PF. 69 * Remaining resources are divided equally among VFs. 70 * [0, 100] 71 */ 72#define BNXT_RE_PCT_RSVD_FOR_PF 50 73 74#define BNXT_RE_UD_QP_HW_STALL 0x400000 75 76#define BNXT_RE_RQ_WQE_THRESHOLD 32 77 78/* 79 * Setting the default ack delay value to 16, which means 80 * the default timeout is approx. 260ms(4 usec * 2 ^(timeout)) 81 */ 82 83#define BNXT_RE_DEFAULT_ACK_DELAY 16 84 85struct bnxt_re_ring_attr { 86 dma_addr_t *dma_arr; 87 int pages; 88 int type; 89 u32 depth; 90 u32 lrid; /* Logical ring id */ 91 u8 mode; 92}; 93 94struct bnxt_re_sqp_entries { 95 struct bnxt_qplib_sge sge; 96 u64 wrid; 97 /* For storing the actual qp1 cqe */ 98 struct bnxt_qplib_cqe cqe; 99 struct bnxt_re_qp *qp1_qp; 100}; 101 102#define BNXT_RE_MAX_GSI_SQP_ENTRIES 1024 103struct bnxt_re_gsi_context { 104 struct bnxt_re_qp *gsi_qp; 105 struct bnxt_re_qp *gsi_sqp; 106 struct bnxt_re_ah *gsi_sah; 107 struct bnxt_re_sqp_entries *sqp_tbl; 108}; 109 110#define BNXT_RE_MIN_MSIX 2 111#define BNXT_RE_MAX_MSIX 9 112#define BNXT_RE_AEQ_IDX 0 113#define BNXT_RE_NQ_IDX 1 114#define BNXT_RE_GEN_P5_MAX_VF 64 115 116struct bnxt_re_pacing { 117 u64 dbr_db_fifo_reg_off; 118 void *dbr_page; 119 u64 dbr_bar_addr; 120 u32 pacing_algo_th; 121 u32 do_pacing_save; 122 u32 dbq_pacing_time; /* ms */ 123 u32 dbr_def_do_pacing; 124 bool dbr_pacing; 125 struct mutex dbq_lock; /* synchronize db pacing algo */ 126}; 127 128#define BNXT_RE_MAX_DBR_DO_PACING 0xFFFF 129#define BNXT_RE_DBR_PACING_TIME 5 /* ms */ 130#define BNXT_RE_PACING_ALGO_THRESHOLD 250 /* Entries in DB FIFO */ 131#define BNXT_RE_PACING_ALARM_TH_MULTIPLE 2 /* Multiple of pacing algo threshold */ 132/* Default do_pacing value when there is no congestion */ 133#define BNXT_RE_DBR_DO_PACING_NO_CONGESTION 0x7F /* 1 in 512 probability */ 134#define BNXT_RE_DB_FIFO_ROOM_MASK 0x1FFF8000 135#define BNXT_RE_MAX_FIFO_DEPTH 0x2c00 136#define BNXT_RE_DB_FIFO_ROOM_SHIFT 15 137#define BNXT_RE_GRC_FIFO_REG_BASE 0x2000 138 139#define MAX_CQ_HASH_BITS (16) 140struct bnxt_re_dev { 141 struct ib_device ibdev; 142 struct list_head list; 143 unsigned long flags; 144#define BNXT_RE_FLAG_NETDEV_REGISTERED 0 145#define BNXT_RE_FLAG_HAVE_L2_REF 3 146#define BNXT_RE_FLAG_RCFW_CHANNEL_EN 4 147#define BNXT_RE_FLAG_QOS_WORK_REG 5 148#define BNXT_RE_FLAG_RESOURCES_ALLOCATED 7 149#define BNXT_RE_FLAG_RESOURCES_INITIALIZED 8 150#define BNXT_RE_FLAG_ERR_DEVICE_DETACHED 17 151#define BNXT_RE_FLAG_ISSUE_ROCE_STATS 29 152 struct net_device *netdev; 153 struct notifier_block nb; 154 unsigned int version, major, minor; 155 struct bnxt_qplib_chip_ctx *chip_ctx; 156 struct bnxt_en_dev *en_dev; 157 int num_msix; 158 159 int id; 160 161 struct delayed_work worker; 162 u8 cur_prio_map; 163 164 /* FP Notification Queue (CQ & SRQ) */ 165 struct tasklet_struct nq_task; 166 167 /* RCFW Channel */ 168 struct bnxt_qplib_rcfw rcfw; 169 170 /* NQ */ 171 struct bnxt_qplib_nq nq[BNXT_RE_MAX_MSIX]; 172 173 /* Device Resources */ 174 struct bnxt_qplib_dev_attr dev_attr; 175 struct bnxt_qplib_ctx qplib_ctx; 176 struct bnxt_qplib_res qplib_res; 177 struct bnxt_qplib_dpi dpi_privileged; 178 179 struct mutex qp_lock; /* protect qp list */ 180 struct list_head qp_list; 181 182 /* Max of 2 lossless traffic class supported per port */ 183 u16 cosq[2]; 184 185 /* QP for handling QP1 packets */ 186 struct bnxt_re_gsi_context gsi_ctx; 187 struct bnxt_re_stats stats; 188 atomic_t nq_alloc_cnt; 189 u32 is_virtfn; 190 u32 num_vfs; 191 struct bnxt_re_pacing pacing; 192 struct work_struct dbq_fifo_check_work; 193 struct delayed_work dbq_pacing_work; 194 DECLARE_HASHTABLE(cq_hash, MAX_CQ_HASH_BITS); 195}; 196 197#define to_bnxt_re_dev(ptr, member) \ 198 container_of((ptr), struct bnxt_re_dev, member) 199 200#define BNXT_RE_ROCE_V1_PACKET 0 201#define BNXT_RE_ROCEV2_IPV4_PACKET 2 202#define BNXT_RE_ROCEV2_IPV6_PACKET 3 203 204#define BNXT_RE_CHECK_RC(x) ((x) && ((x) != -ETIMEDOUT)) 205void bnxt_re_pacing_alert(struct bnxt_re_dev *rdev); 206 207static inline struct device *rdev_to_dev(struct bnxt_re_dev *rdev) 208{ 209 if (rdev) 210 return &rdev->ibdev.dev; 211 return NULL; 212} 213 214extern const struct uapi_definition bnxt_re_uapi_defs[]; 215#endif 216