1/* SPDX-License-Identifier: GPL-2.0 */ 2#include <linux/bitops.h> 3#include <linux/device.h> 4#include <linux/iio/iio.h> 5#include <linux/regmap.h> 6#include <linux/regulator/consumer.h> 7 8 9/* BMP580 specific registers */ 10#define BMP580_REG_CMD 0x7E 11#define BMP580_REG_EFF_OSR 0x38 12#define BMP580_REG_ODR_CONFIG 0x37 13#define BMP580_REG_OSR_CONFIG 0x36 14#define BMP580_REG_IF_CONFIG 0x13 15#define BMP580_REG_REV_ID 0x02 16#define BMP580_REG_CHIP_ID 0x01 17/* OOR allows to configure a pressure alarm */ 18#define BMP580_REG_OOR_CONFIG 0x35 19#define BMP580_REG_OOR_RANGE 0x34 20#define BMP580_REG_OOR_THR_MSB 0x33 21#define BMP580_REG_OOR_THR_LSB 0x32 22/* DSP registers (IIR filters) */ 23#define BMP580_REG_DSP_IIR 0x31 24#define BMP580_REG_DSP_CONFIG 0x30 25/* NVM access registers */ 26#define BMP580_REG_NVM_DATA_MSB 0x2D 27#define BMP580_REG_NVM_DATA_LSB 0x2C 28#define BMP580_REG_NVM_ADDR 0x2B 29/* Status registers */ 30#define BMP580_REG_STATUS 0x28 31#define BMP580_REG_INT_STATUS 0x27 32#define BMP580_REG_CHIP_STATUS 0x11 33/* Data registers */ 34#define BMP580_REG_FIFO_DATA 0x29 35#define BMP580_REG_PRESS_MSB 0x22 36#define BMP580_REG_PRESS_LSB 0x21 37#define BMP580_REG_PRESS_XLSB 0x20 38#define BMP580_REG_TEMP_MSB 0x1F 39#define BMP580_REG_TEMP_LSB 0x1E 40#define BMP580_REG_TEMP_XLSB 0x1D 41/* FIFO config registers */ 42#define BMP580_REG_FIFO_SEL 0x18 43#define BMP580_REG_FIFO_COUNT 0x17 44#define BMP580_REG_FIFO_CONFIG 0x16 45/* Interruptions config registers */ 46#define BMP580_REG_INT_SOURCE 0x15 47#define BMP580_REG_INT_CONFIG 0x14 48 49#define BMP580_CMD_NOOP 0x00 50#define BMP580_CMD_EXTMODE_SEQ_0 0x73 51#define BMP580_CMD_EXTMODE_SEQ_1 0xB4 52#define BMP580_CMD_EXTMODE_SEQ_2 0x69 53#define BMP580_CMD_NVM_OP_SEQ_0 0x5D 54#define BMP580_CMD_NVM_READ_SEQ_1 0xA5 55#define BMP580_CMD_NVM_WRITE_SEQ_1 0xA0 56#define BMP580_CMD_SOFT_RESET 0xB6 57 58#define BMP580_INT_STATUS_POR_MASK BIT(4) 59 60#define BMP580_STATUS_CORE_RDY_MASK BIT(0) 61#define BMP580_STATUS_NVM_RDY_MASK BIT(1) 62#define BMP580_STATUS_NVM_ERR_MASK BIT(2) 63#define BMP580_STATUS_NVM_CMD_ERR_MASK BIT(3) 64 65#define BMP580_OSR_PRESS_MASK GENMASK(5, 3) 66#define BMP580_OSR_TEMP_MASK GENMASK(2, 0) 67#define BMP580_OSR_PRESS_EN BIT(6) 68#define BMP580_EFF_OSR_PRESS_MASK GENMASK(5, 3) 69#define BMP580_EFF_OSR_TEMP_MASK GENMASK(2, 0) 70#define BMP580_EFF_OSR_VALID_ODR BIT(7) 71 72#define BMP580_ODR_MASK GENMASK(6, 2) 73#define BMP580_MODE_MASK GENMASK(1, 0) 74#define BMP580_MODE_SLEEP 0 75#define BMP580_MODE_NORMAL 1 76#define BMP580_MODE_FORCED 2 77#define BMP580_MODE_CONTINOUS 3 78#define BMP580_ODR_DEEPSLEEP_DIS BIT(7) 79 80#define BMP580_DSP_COMP_MASK GENMASK(1, 0) 81#define BMP580_DSP_COMP_DIS 0 82#define BMP580_DSP_TEMP_COMP_EN 1 83/* 84 * In section 7.27 of datasheet, modes 2 and 3 are technically the same. 85 * Pressure compensation means also enabling temperature compensation 86 */ 87#define BMP580_DSP_PRESS_COMP_EN 2 88#define BMP580_DSP_PRESS_TEMP_COMP_EN 3 89#define BMP580_DSP_IIR_FORCED_FLUSH BIT(2) 90#define BMP580_DSP_SHDW_IIR_TEMP_EN BIT(3) 91#define BMP580_DSP_FIFO_IIR_TEMP_EN BIT(4) 92#define BMP580_DSP_SHDW_IIR_PRESS_EN BIT(5) 93#define BMP580_DSP_FIFO_IIR_PRESS_EN BIT(6) 94#define BMP580_DSP_OOR_IIR_PRESS_EN BIT(7) 95 96#define BMP580_DSP_IIR_PRESS_MASK GENMASK(5, 3) 97#define BMP580_DSP_IIR_TEMP_MASK GENMASK(2, 0) 98#define BMP580_FILTER_OFF 0 99#define BMP580_FILTER_1X 1 100#define BMP580_FILTER_3X 2 101#define BMP580_FILTER_7X 3 102#define BMP580_FILTER_15X 4 103#define BMP580_FILTER_31X 5 104#define BMP580_FILTER_63X 6 105#define BMP580_FILTER_127X 7 106 107#define BMP580_NVM_ROW_ADDR_MASK GENMASK(5, 0) 108#define BMP580_NVM_PROG_EN BIT(6) 109 110#define BMP580_TEMP_SKIPPED 0x7f7f7f 111#define BMP580_PRESS_SKIPPED 0x7f7f7f 112 113/* BMP380 specific registers */ 114#define BMP380_REG_CMD 0x7E 115#define BMP380_REG_CONFIG 0x1F 116#define BMP380_REG_ODR 0x1D 117#define BMP380_REG_OSR 0x1C 118#define BMP380_REG_POWER_CONTROL 0x1B 119#define BMP380_REG_IF_CONFIG 0x1A 120#define BMP380_REG_INT_CONTROL 0x19 121#define BMP380_REG_INT_STATUS 0x11 122#define BMP380_REG_EVENT 0x10 123#define BMP380_REG_STATUS 0x03 124#define BMP380_REG_ERROR 0x02 125#define BMP380_REG_ID 0x00 126 127#define BMP380_REG_FIFO_CONFIG_1 0x18 128#define BMP380_REG_FIFO_CONFIG_2 0x17 129#define BMP380_REG_FIFO_WATERMARK_MSB 0x16 130#define BMP380_REG_FIFO_WATERMARK_LSB 0x15 131#define BMP380_REG_FIFO_DATA 0x14 132#define BMP380_REG_FIFO_LENGTH_MSB 0x13 133#define BMP380_REG_FIFO_LENGTH_LSB 0x12 134 135#define BMP380_REG_SENSOR_TIME_MSB 0x0E 136#define BMP380_REG_SENSOR_TIME_LSB 0x0D 137#define BMP380_REG_SENSOR_TIME_XLSB 0x0C 138 139#define BMP380_REG_TEMP_MSB 0x09 140#define BMP380_REG_TEMP_LSB 0x08 141#define BMP380_REG_TEMP_XLSB 0x07 142 143#define BMP380_REG_PRESS_MSB 0x06 144#define BMP380_REG_PRESS_LSB 0x05 145#define BMP380_REG_PRESS_XLSB 0x04 146 147#define BMP380_REG_CALIB_TEMP_START 0x31 148#define BMP380_CALIB_REG_COUNT 21 149 150#define BMP380_FILTER_MASK GENMASK(3, 1) 151#define BMP380_FILTER_OFF 0 152#define BMP380_FILTER_1X 1 153#define BMP380_FILTER_3X 2 154#define BMP380_FILTER_7X 3 155#define BMP380_FILTER_15X 4 156#define BMP380_FILTER_31X 5 157#define BMP380_FILTER_63X 6 158#define BMP380_FILTER_127X 7 159 160#define BMP380_OSRS_TEMP_MASK GENMASK(5, 3) 161#define BMP380_OSRS_PRESS_MASK GENMASK(2, 0) 162 163#define BMP380_ODRS_MASK GENMASK(4, 0) 164 165#define BMP380_CTRL_SENSORS_MASK GENMASK(1, 0) 166#define BMP380_CTRL_SENSORS_PRESS_EN BIT(0) 167#define BMP380_CTRL_SENSORS_TEMP_EN BIT(1) 168#define BMP380_MODE_MASK GENMASK(5, 4) 169#define BMP380_MODE_SLEEP 0 170#define BMP380_MODE_FORCED 1 171#define BMP380_MODE_NORMAL 3 172 173#define BMP380_MIN_TEMP -4000 174#define BMP380_MAX_TEMP 8500 175#define BMP380_MIN_PRES 3000000 176#define BMP380_MAX_PRES 12500000 177 178#define BMP380_CMD_NOOP 0x00 179#define BMP380_CMD_EXTMODE_EN_MID 0x34 180#define BMP380_CMD_FIFO_FLUSH 0xB0 181#define BMP380_CMD_SOFT_RESET 0xB6 182 183#define BMP380_STATUS_CMD_RDY_MASK BIT(4) 184#define BMP380_STATUS_DRDY_PRESS_MASK BIT(5) 185#define BMP380_STATUS_DRDY_TEMP_MASK BIT(6) 186 187#define BMP380_ERR_FATAL_MASK BIT(0) 188#define BMP380_ERR_CMD_MASK BIT(1) 189#define BMP380_ERR_CONF_MASK BIT(2) 190 191#define BMP380_TEMP_SKIPPED 0x800000 192#define BMP380_PRESS_SKIPPED 0x800000 193 194/* BMP280 specific registers */ 195#define BMP280_REG_HUMIDITY_LSB 0xFE 196#define BMP280_REG_HUMIDITY_MSB 0xFD 197#define BMP280_REG_TEMP_XLSB 0xFC 198#define BMP280_REG_TEMP_LSB 0xFB 199#define BMP280_REG_TEMP_MSB 0xFA 200#define BMP280_REG_PRESS_XLSB 0xF9 201#define BMP280_REG_PRESS_LSB 0xF8 202#define BMP280_REG_PRESS_MSB 0xF7 203 204/* Helper mask to truncate excess 4 bits on pressure and temp readings */ 205#define BMP280_MEAS_TRIM_MASK GENMASK(24, 4) 206 207#define BMP280_REG_CONFIG 0xF5 208#define BMP280_REG_CTRL_MEAS 0xF4 209#define BMP280_REG_STATUS 0xF3 210#define BMP280_REG_CTRL_HUMIDITY 0xF2 211 212/* Due to non linear mapping, and data sizes we can't do a bulk read */ 213#define BMP280_REG_COMP_H1 0xA1 214#define BMP280_REG_COMP_H2 0xE1 215#define BMP280_REG_COMP_H3 0xE3 216#define BMP280_REG_COMP_H4 0xE4 217#define BMP280_REG_COMP_H5 0xE5 218#define BMP280_REG_COMP_H6 0xE7 219 220#define BMP280_REG_COMP_TEMP_START 0x88 221#define BMP280_COMP_TEMP_REG_COUNT 6 222 223#define BMP280_REG_COMP_PRESS_START 0x8E 224#define BMP280_COMP_PRESS_REG_COUNT 18 225 226#define BMP280_COMP_H5_MASK GENMASK(15, 4) 227 228#define BMP280_CONTIGUOUS_CALIB_REGS (BMP280_COMP_TEMP_REG_COUNT + \ 229 BMP280_COMP_PRESS_REG_COUNT) 230 231#define BMP280_FILTER_MASK GENMASK(4, 2) 232#define BMP280_FILTER_OFF 0 233#define BMP280_FILTER_2X 1 234#define BMP280_FILTER_4X 2 235#define BMP280_FILTER_8X 3 236#define BMP280_FILTER_16X 4 237 238#define BMP280_OSRS_HUMIDITY_MASK GENMASK(2, 0) 239#define BMP280_OSRS_HUMIDITY_SKIP 0 240#define BMP280_OSRS_HUMIDITY_1X 1 241#define BMP280_OSRS_HUMIDITY_2X 2 242#define BMP280_OSRS_HUMIDITY_4X 3 243#define BMP280_OSRS_HUMIDITY_8X 4 244#define BMP280_OSRS_HUMIDITY_16X 5 245 246#define BMP280_OSRS_TEMP_MASK GENMASK(7, 5) 247#define BMP280_OSRS_TEMP_SKIP 0 248#define BMP280_OSRS_TEMP_1X 1 249#define BMP280_OSRS_TEMP_2X 2 250#define BMP280_OSRS_TEMP_4X 3 251#define BMP280_OSRS_TEMP_8X 4 252#define BMP280_OSRS_TEMP_16X 5 253 254#define BMP280_OSRS_PRESS_MASK GENMASK(4, 2) 255#define BMP280_OSRS_PRESS_SKIP 0 256#define BMP280_OSRS_PRESS_1X 1 257#define BMP280_OSRS_PRESS_2X 2 258#define BMP280_OSRS_PRESS_4X 3 259#define BMP280_OSRS_PRESS_8X 4 260#define BMP280_OSRS_PRESS_16X 5 261 262#define BMP280_MODE_MASK GENMASK(1, 0) 263#define BMP280_MODE_SLEEP 0 264#define BMP280_MODE_FORCED 1 265#define BMP280_MODE_NORMAL 3 266 267/* BMP180 specific registers */ 268#define BMP180_REG_OUT_XLSB 0xF8 269#define BMP180_REG_OUT_LSB 0xF7 270#define BMP180_REG_OUT_MSB 0xF6 271 272#define BMP180_REG_CALIB_START 0xAA 273#define BMP180_REG_CALIB_COUNT 22 274 275#define BMP180_MEAS_CTRL_MASK GENMASK(4, 0) 276#define BMP180_MEAS_TEMP 0x0E 277#define BMP180_MEAS_PRESS 0x14 278#define BMP180_MEAS_SCO BIT(5) 279#define BMP180_OSRS_PRESS_MASK GENMASK(7, 6) 280#define BMP180_MEAS_PRESS_1X 0 281#define BMP180_MEAS_PRESS_2X 1 282#define BMP180_MEAS_PRESS_4X 2 283#define BMP180_MEAS_PRESS_8X 3 284 285/* BMP180 and BMP280 common registers */ 286#define BMP280_REG_CTRL_MEAS 0xF4 287#define BMP280_REG_RESET 0xE0 288#define BMP280_REG_ID 0xD0 289 290#define BMP380_CHIP_ID 0x50 291#define BMP580_CHIP_ID 0x50 292#define BMP580_CHIP_ID_ALT 0x51 293#define BMP180_CHIP_ID 0x55 294#define BMP280_CHIP_ID 0x58 295#define BMP390_CHIP_ID 0x60 296#define BME280_CHIP_ID 0x60 297#define BMP280_SOFT_RESET_VAL 0xB6 298 299/* BMP280 register skipped special values */ 300#define BMP280_TEMP_SKIPPED 0x80000 301#define BMP280_PRESS_SKIPPED 0x80000 302#define BMP280_HUMIDITY_SKIPPED 0x8000 303 304/* Core exported structs */ 305 306static const char *const bmp280_supply_names[] = { 307 "vddd", "vdda" 308}; 309 310#define BMP280_NUM_SUPPLIES ARRAY_SIZE(bmp280_supply_names) 311 312struct bmp180_calib { 313 s16 AC1; 314 s16 AC2; 315 s16 AC3; 316 u16 AC4; 317 u16 AC5; 318 u16 AC6; 319 s16 B1; 320 s16 B2; 321 s16 MB; 322 s16 MC; 323 s16 MD; 324}; 325 326/* See datasheet Section 4.2.2. */ 327struct bmp280_calib { 328 u16 T1; 329 s16 T2; 330 s16 T3; 331 u16 P1; 332 s16 P2; 333 s16 P3; 334 s16 P4; 335 s16 P5; 336 s16 P6; 337 s16 P7; 338 s16 P8; 339 s16 P9; 340 u8 H1; 341 s16 H2; 342 u8 H3; 343 s16 H4; 344 s16 H5; 345 s8 H6; 346}; 347 348/* See datasheet Section 3.11.1. */ 349struct bmp380_calib { 350 u16 T1; 351 u16 T2; 352 s8 T3; 353 s16 P1; 354 s16 P2; 355 s8 P3; 356 s8 P4; 357 u16 P5; 358 u16 P6; 359 s8 P7; 360 s8 P8; 361 s16 P9; 362 s8 P10; 363 s8 P11; 364}; 365 366struct bmp280_data { 367 struct device *dev; 368 struct mutex lock; 369 struct regmap *regmap; 370 struct completion done; 371 bool use_eoc; 372 const struct bmp280_chip_info *chip_info; 373 union { 374 struct bmp180_calib bmp180; 375 struct bmp280_calib bmp280; 376 struct bmp380_calib bmp380; 377 } calib; 378 struct regulator_bulk_data supplies[BMP280_NUM_SUPPLIES]; 379 unsigned int start_up_time; /* in microseconds */ 380 381 /* log of base 2 of oversampling rate */ 382 u8 oversampling_press; 383 u8 oversampling_temp; 384 u8 oversampling_humid; 385 u8 iir_filter_coeff; 386 387 /* 388 * BMP380 devices introduce sampling frequency configuration. See 389 * datasheet sections 3.3.3. and 4.3.19 for more details. 390 * 391 * BMx280 devices allowed indirect configuration of sampling frequency 392 * changing the t_standby duration between measurements, as detailed on 393 * section 3.6.3 of the datasheet. 394 */ 395 int sampling_freq; 396 397 /* 398 * Carryover value from temperature conversion, used in pressure 399 * calculation. 400 */ 401 s32 t_fine; 402 403 /* 404 * DMA (thus cache coherency maintenance) may require the 405 * transfer buffers to live in their own cache lines. 406 */ 407 union { 408 /* Sensor data buffer */ 409 u8 buf[3]; 410 /* Calibration data buffers */ 411 __le16 bmp280_cal_buf[BMP280_CONTIGUOUS_CALIB_REGS / 2]; 412 __be16 bmp180_cal_buf[BMP180_REG_CALIB_COUNT / 2]; 413 u8 bmp380_cal_buf[BMP380_CALIB_REG_COUNT]; 414 /* Miscellaneous, endianness-aware data buffers */ 415 __le16 le16; 416 __be16 be16; 417 } __aligned(IIO_DMA_MINALIGN); 418}; 419 420struct bmp280_chip_info { 421 unsigned int id_reg; 422 const u8 *chip_id; 423 int num_chip_id; 424 425 const struct regmap_config *regmap_config; 426 427 const struct iio_chan_spec *channels; 428 int num_channels; 429 unsigned int start_up_time; 430 431 const int *oversampling_temp_avail; 432 int num_oversampling_temp_avail; 433 int oversampling_temp_default; 434 435 const int *oversampling_press_avail; 436 int num_oversampling_press_avail; 437 int oversampling_press_default; 438 439 const int *oversampling_humid_avail; 440 int num_oversampling_humid_avail; 441 int oversampling_humid_default; 442 443 const int *iir_filter_coeffs_avail; 444 int num_iir_filter_coeffs_avail; 445 int iir_filter_coeff_default; 446 447 const int (*sampling_freq_avail)[2]; 448 int num_sampling_freq_avail; 449 int sampling_freq_default; 450 451 int (*chip_config)(struct bmp280_data *); 452 int (*read_temp)(struct bmp280_data *, int *, int *); 453 int (*read_press)(struct bmp280_data *, int *, int *); 454 int (*read_humid)(struct bmp280_data *, int *, int *); 455 int (*read_calib)(struct bmp280_data *); 456 int (*preinit)(struct bmp280_data *); 457}; 458 459/* Chip infos for each variant */ 460extern const struct bmp280_chip_info bmp180_chip_info; 461extern const struct bmp280_chip_info bmp280_chip_info; 462extern const struct bmp280_chip_info bme280_chip_info; 463extern const struct bmp280_chip_info bmp380_chip_info; 464extern const struct bmp280_chip_info bmp580_chip_info; 465 466/* Regmap configurations */ 467extern const struct regmap_config bmp180_regmap_config; 468extern const struct regmap_config bmp280_regmap_config; 469extern const struct regmap_config bmp380_regmap_config; 470extern const struct regmap_config bmp580_regmap_config; 471 472/* Probe called from different transports */ 473int bmp280_common_probe(struct device *dev, 474 struct regmap *regmap, 475 const struct bmp280_chip_info *, 476 const char *name, 477 int irq); 478 479/* PM ops */ 480extern const struct dev_pm_ops bmp280_dev_pm_ops; 481