1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. 4 * 5 * Description: CoreSight Embedded Trace Buffer driver 6 */ 7 8#include <linux/atomic.h> 9#include <linux/kernel.h> 10#include <linux/init.h> 11#include <linux/types.h> 12#include <linux/device.h> 13#include <linux/io.h> 14#include <linux/err.h> 15#include <linux/fs.h> 16#include <linux/miscdevice.h> 17#include <linux/uaccess.h> 18#include <linux/slab.h> 19#include <linux/spinlock.h> 20#include <linux/pm_runtime.h> 21#include <linux/seq_file.h> 22#include <linux/coresight.h> 23#include <linux/amba/bus.h> 24#include <linux/clk.h> 25#include <linux/circ_buf.h> 26#include <linux/mm.h> 27#include <linux/perf_event.h> 28 29 30#include "coresight-priv.h" 31#include "coresight-etm-perf.h" 32 33#define ETB_RAM_DEPTH_REG 0x004 34#define ETB_STATUS_REG 0x00c 35#define ETB_RAM_READ_DATA_REG 0x010 36#define ETB_RAM_READ_POINTER 0x014 37#define ETB_RAM_WRITE_POINTER 0x018 38#define ETB_TRG 0x01c 39#define ETB_CTL_REG 0x020 40#define ETB_RWD_REG 0x024 41#define ETB_FFSR 0x300 42#define ETB_FFCR 0x304 43#define ETB_ITMISCOP0 0xee0 44#define ETB_ITTRFLINACK 0xee4 45#define ETB_ITTRFLIN 0xee8 46#define ETB_ITATBDATA0 0xeeC 47#define ETB_ITATBCTR2 0xef0 48#define ETB_ITATBCTR1 0xef4 49#define ETB_ITATBCTR0 0xef8 50 51/* register description */ 52/* STS - 0x00C */ 53#define ETB_STATUS_RAM_FULL BIT(0) 54/* CTL - 0x020 */ 55#define ETB_CTL_CAPT_EN BIT(0) 56/* FFCR - 0x304 */ 57#define ETB_FFCR_EN_FTC BIT(0) 58#define ETB_FFCR_FON_MAN BIT(6) 59#define ETB_FFCR_STOP_FI BIT(12) 60#define ETB_FFCR_STOP_TRIGGER BIT(13) 61 62#define ETB_FFCR_BIT 6 63#define ETB_FFSR_BIT 1 64#define ETB_FRAME_SIZE_WORDS 4 65 66DEFINE_CORESIGHT_DEVLIST(etb_devs, "etb"); 67 68/** 69 * struct etb_drvdata - specifics associated to an ETB component 70 * @base: memory mapped base address for this component. 71 * @atclk: optional clock for the core parts of the ETB. 72 * @csdev: component vitals needed by the framework. 73 * @miscdev: specifics to handle "/dev/xyz.etb" entry. 74 * @spinlock: only one at a time pls. 75 * @reading: synchronise user space access to etb buffer. 76 * @pid: Process ID of the process being monitored by the session 77 * that is using this component. 78 * @buf: area of memory where ETB buffer content gets sent. 79 * @buffer_depth: size of @buf. 80 * @trigger_cntr: amount of words to store after a trigger. 81 */ 82struct etb_drvdata { 83 void __iomem *base; 84 struct clk *atclk; 85 struct coresight_device *csdev; 86 struct miscdevice miscdev; 87 spinlock_t spinlock; 88 local_t reading; 89 pid_t pid; 90 u8 *buf; 91 u32 buffer_depth; 92 u32 trigger_cntr; 93}; 94 95static int etb_set_buffer(struct coresight_device *csdev, 96 struct perf_output_handle *handle); 97 98static inline unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata) 99{ 100 return readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG); 101} 102 103static void __etb_enable_hw(struct etb_drvdata *drvdata) 104{ 105 int i; 106 u32 depth; 107 108 CS_UNLOCK(drvdata->base); 109 110 depth = drvdata->buffer_depth; 111 /* reset write RAM pointer address */ 112 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER); 113 /* clear entire RAM buffer */ 114 for (i = 0; i < depth; i++) 115 writel_relaxed(0x0, drvdata->base + ETB_RWD_REG); 116 117 /* reset write RAM pointer address */ 118 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER); 119 /* reset read RAM pointer address */ 120 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER); 121 122 writel_relaxed(drvdata->trigger_cntr, drvdata->base + ETB_TRG); 123 writel_relaxed(ETB_FFCR_EN_FTC | ETB_FFCR_STOP_TRIGGER, 124 drvdata->base + ETB_FFCR); 125 /* ETB trace capture enable */ 126 writel_relaxed(ETB_CTL_CAPT_EN, drvdata->base + ETB_CTL_REG); 127 128 CS_LOCK(drvdata->base); 129} 130 131static int etb_enable_hw(struct etb_drvdata *drvdata) 132{ 133 int rc = coresight_claim_device(drvdata->csdev); 134 135 if (rc) 136 return rc; 137 138 __etb_enable_hw(drvdata); 139 return 0; 140} 141 142static int etb_enable_sysfs(struct coresight_device *csdev) 143{ 144 int ret = 0; 145 unsigned long flags; 146 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 147 148 spin_lock_irqsave(&drvdata->spinlock, flags); 149 150 /* Don't messup with perf sessions. */ 151 if (coresight_get_mode(csdev) == CS_MODE_PERF) { 152 ret = -EBUSY; 153 goto out; 154 } 155 156 if (coresight_get_mode(csdev) == CS_MODE_DISABLED) { 157 ret = etb_enable_hw(drvdata); 158 if (ret) 159 goto out; 160 161 coresight_set_mode(csdev, CS_MODE_SYSFS); 162 } 163 164 csdev->refcnt++; 165out: 166 spin_unlock_irqrestore(&drvdata->spinlock, flags); 167 return ret; 168} 169 170static int etb_enable_perf(struct coresight_device *csdev, void *data) 171{ 172 int ret = 0; 173 pid_t pid; 174 unsigned long flags; 175 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 176 struct perf_output_handle *handle = data; 177 struct cs_buffers *buf = etm_perf_sink_config(handle); 178 179 spin_lock_irqsave(&drvdata->spinlock, flags); 180 181 /* No need to continue if the component is already in used by sysFS. */ 182 if (coresight_get_mode(drvdata->csdev) == CS_MODE_SYSFS) { 183 ret = -EBUSY; 184 goto out; 185 } 186 187 /* Get a handle on the pid of the process to monitor */ 188 pid = buf->pid; 189 190 if (drvdata->pid != -1 && drvdata->pid != pid) { 191 ret = -EBUSY; 192 goto out; 193 } 194 195 /* 196 * No HW configuration is needed if the sink is already in 197 * use for this session. 198 */ 199 if (drvdata->pid == pid) { 200 csdev->refcnt++; 201 goto out; 202 } 203 204 /* 205 * We don't have an internal state to clean up if we fail to setup 206 * the perf buffer. So we can perform the step before we turn the 207 * ETB on and leave without cleaning up. 208 */ 209 ret = etb_set_buffer(csdev, handle); 210 if (ret) 211 goto out; 212 213 ret = etb_enable_hw(drvdata); 214 if (!ret) { 215 /* Associate with monitored process. */ 216 drvdata->pid = pid; 217 coresight_set_mode(drvdata->csdev, CS_MODE_PERF); 218 csdev->refcnt++; 219 } 220 221out: 222 spin_unlock_irqrestore(&drvdata->spinlock, flags); 223 return ret; 224} 225 226static int etb_enable(struct coresight_device *csdev, enum cs_mode mode, 227 void *data) 228{ 229 int ret; 230 231 switch (mode) { 232 case CS_MODE_SYSFS: 233 ret = etb_enable_sysfs(csdev); 234 break; 235 case CS_MODE_PERF: 236 ret = etb_enable_perf(csdev, data); 237 break; 238 default: 239 ret = -EINVAL; 240 break; 241 } 242 243 if (ret) 244 return ret; 245 246 dev_dbg(&csdev->dev, "ETB enabled\n"); 247 return 0; 248} 249 250static void __etb_disable_hw(struct etb_drvdata *drvdata) 251{ 252 u32 ffcr; 253 struct device *dev = &drvdata->csdev->dev; 254 struct csdev_access *csa = &drvdata->csdev->access; 255 256 CS_UNLOCK(drvdata->base); 257 258 ffcr = readl_relaxed(drvdata->base + ETB_FFCR); 259 /* stop formatter when a stop has completed */ 260 ffcr |= ETB_FFCR_STOP_FI; 261 writel_relaxed(ffcr, drvdata->base + ETB_FFCR); 262 /* manually generate a flush of the system */ 263 ffcr |= ETB_FFCR_FON_MAN; 264 writel_relaxed(ffcr, drvdata->base + ETB_FFCR); 265 266 if (coresight_timeout(csa, ETB_FFCR, ETB_FFCR_BIT, 0)) { 267 dev_err(dev, 268 "timeout while waiting for completion of Manual Flush\n"); 269 } 270 271 /* disable trace capture */ 272 writel_relaxed(0x0, drvdata->base + ETB_CTL_REG); 273 274 if (coresight_timeout(csa, ETB_FFSR, ETB_FFSR_BIT, 1)) { 275 dev_err(dev, 276 "timeout while waiting for Formatter to Stop\n"); 277 } 278 279 CS_LOCK(drvdata->base); 280} 281 282static void etb_dump_hw(struct etb_drvdata *drvdata) 283{ 284 bool lost = false; 285 int i; 286 u8 *buf_ptr; 287 u32 read_data, depth; 288 u32 read_ptr, write_ptr; 289 u32 frame_off, frame_endoff; 290 struct device *dev = &drvdata->csdev->dev; 291 292 CS_UNLOCK(drvdata->base); 293 294 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER); 295 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER); 296 297 frame_off = write_ptr % ETB_FRAME_SIZE_WORDS; 298 frame_endoff = ETB_FRAME_SIZE_WORDS - frame_off; 299 if (frame_off) { 300 dev_err(dev, 301 "write_ptr: %lu not aligned to formatter frame size\n", 302 (unsigned long)write_ptr); 303 dev_err(dev, "frameoff: %lu, frame_endoff: %lu\n", 304 (unsigned long)frame_off, (unsigned long)frame_endoff); 305 write_ptr += frame_endoff; 306 } 307 308 if ((readl_relaxed(drvdata->base + ETB_STATUS_REG) 309 & ETB_STATUS_RAM_FULL) == 0) { 310 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER); 311 } else { 312 writel_relaxed(write_ptr, drvdata->base + ETB_RAM_READ_POINTER); 313 lost = true; 314 } 315 316 depth = drvdata->buffer_depth; 317 buf_ptr = drvdata->buf; 318 for (i = 0; i < depth; i++) { 319 read_data = readl_relaxed(drvdata->base + 320 ETB_RAM_READ_DATA_REG); 321 *(u32 *)buf_ptr = read_data; 322 buf_ptr += 4; 323 } 324 325 if (lost) 326 coresight_insert_barrier_packet(drvdata->buf); 327 328 if (frame_off) { 329 buf_ptr -= (frame_endoff * 4); 330 for (i = 0; i < frame_endoff; i++) { 331 *buf_ptr++ = 0x0; 332 *buf_ptr++ = 0x0; 333 *buf_ptr++ = 0x0; 334 *buf_ptr++ = 0x0; 335 } 336 } 337 338 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER); 339 340 CS_LOCK(drvdata->base); 341} 342 343static void etb_disable_hw(struct etb_drvdata *drvdata) 344{ 345 __etb_disable_hw(drvdata); 346 etb_dump_hw(drvdata); 347 coresight_disclaim_device(drvdata->csdev); 348} 349 350static int etb_disable(struct coresight_device *csdev) 351{ 352 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 353 unsigned long flags; 354 355 spin_lock_irqsave(&drvdata->spinlock, flags); 356 357 csdev->refcnt--; 358 if (csdev->refcnt) { 359 spin_unlock_irqrestore(&drvdata->spinlock, flags); 360 return -EBUSY; 361 } 362 363 /* Complain if we (somehow) got out of sync */ 364 WARN_ON_ONCE(coresight_get_mode(csdev) == CS_MODE_DISABLED); 365 etb_disable_hw(drvdata); 366 /* Dissociate from monitored process. */ 367 drvdata->pid = -1; 368 coresight_set_mode(csdev, CS_MODE_DISABLED); 369 spin_unlock_irqrestore(&drvdata->spinlock, flags); 370 371 dev_dbg(&csdev->dev, "ETB disabled\n"); 372 return 0; 373} 374 375static void *etb_alloc_buffer(struct coresight_device *csdev, 376 struct perf_event *event, void **pages, 377 int nr_pages, bool overwrite) 378{ 379 int node; 380 struct cs_buffers *buf; 381 382 node = (event->cpu == -1) ? NUMA_NO_NODE : cpu_to_node(event->cpu); 383 384 buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node); 385 if (!buf) 386 return NULL; 387 388 buf->pid = task_pid_nr(event->owner); 389 buf->snapshot = overwrite; 390 buf->nr_pages = nr_pages; 391 buf->data_pages = pages; 392 393 return buf; 394} 395 396static void etb_free_buffer(void *config) 397{ 398 struct cs_buffers *buf = config; 399 400 kfree(buf); 401} 402 403static int etb_set_buffer(struct coresight_device *csdev, 404 struct perf_output_handle *handle) 405{ 406 int ret = 0; 407 unsigned long head; 408 struct cs_buffers *buf = etm_perf_sink_config(handle); 409 410 if (!buf) 411 return -EINVAL; 412 413 /* wrap head around to the amount of space we have */ 414 head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1); 415 416 /* find the page to write to */ 417 buf->cur = head / PAGE_SIZE; 418 419 /* and offset within that page */ 420 buf->offset = head % PAGE_SIZE; 421 422 local_set(&buf->data_size, 0); 423 424 return ret; 425} 426 427static unsigned long etb_update_buffer(struct coresight_device *csdev, 428 struct perf_output_handle *handle, 429 void *sink_config) 430{ 431 bool lost = false; 432 int i, cur; 433 u8 *buf_ptr; 434 const u32 *barrier; 435 u32 read_ptr, write_ptr, capacity; 436 u32 status, read_data; 437 unsigned long offset, to_read = 0, flags; 438 struct cs_buffers *buf = sink_config; 439 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 440 441 if (!buf) 442 return 0; 443 444 capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS; 445 446 spin_lock_irqsave(&drvdata->spinlock, flags); 447 448 /* Don't do anything if another tracer is using this sink */ 449 if (csdev->refcnt != 1) 450 goto out; 451 452 __etb_disable_hw(drvdata); 453 CS_UNLOCK(drvdata->base); 454 455 /* unit is in words, not bytes */ 456 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER); 457 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER); 458 459 /* 460 * Entries should be aligned to the frame size. If they are not 461 * go back to the last alignment point to give decoding tools a 462 * chance to fix things. 463 */ 464 if (write_ptr % ETB_FRAME_SIZE_WORDS) { 465 dev_err(&csdev->dev, 466 "write_ptr: %lu not aligned to formatter frame size\n", 467 (unsigned long)write_ptr); 468 469 write_ptr &= ~(ETB_FRAME_SIZE_WORDS - 1); 470 lost = true; 471 } 472 473 /* 474 * Get a hold of the status register and see if a wrap around 475 * has occurred. If so adjust things accordingly. Otherwise 476 * start at the beginning and go until the write pointer has 477 * been reached. 478 */ 479 status = readl_relaxed(drvdata->base + ETB_STATUS_REG); 480 if (status & ETB_STATUS_RAM_FULL) { 481 lost = true; 482 to_read = capacity; 483 read_ptr = write_ptr; 484 } else { 485 to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->buffer_depth); 486 to_read *= ETB_FRAME_SIZE_WORDS; 487 } 488 489 /* 490 * Make sure we don't overwrite data that hasn't been consumed yet. 491 * It is entirely possible that the HW buffer has more data than the 492 * ring buffer can currently handle. If so adjust the start address 493 * to take only the last traces. 494 * 495 * In snapshot mode we are looking to get the latest traces only and as 496 * such, we don't care about not overwriting data that hasn't been 497 * processed by user space. 498 */ 499 if (!buf->snapshot && to_read > handle->size) { 500 u32 mask = ~(ETB_FRAME_SIZE_WORDS - 1); 501 502 /* The new read pointer must be frame size aligned */ 503 to_read = handle->size & mask; 504 /* 505 * Move the RAM read pointer up, keeping in mind that 506 * everything is in frame size units. 507 */ 508 read_ptr = (write_ptr + drvdata->buffer_depth) - 509 to_read / ETB_FRAME_SIZE_WORDS; 510 /* Wrap around if need be*/ 511 if (read_ptr > (drvdata->buffer_depth - 1)) 512 read_ptr -= drvdata->buffer_depth; 513 /* let the decoder know we've skipped ahead */ 514 lost = true; 515 } 516 517 /* 518 * Don't set the TRUNCATED flag in snapshot mode because 1) the 519 * captured buffer is expected to be truncated and 2) a full buffer 520 * prevents the event from being re-enabled by the perf core, 521 * resulting in stale data being send to user space. 522 */ 523 if (!buf->snapshot && lost) 524 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED); 525 526 /* finally tell HW where we want to start reading from */ 527 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER); 528 529 cur = buf->cur; 530 offset = buf->offset; 531 barrier = coresight_barrier_pkt; 532 533 for (i = 0; i < to_read; i += 4) { 534 buf_ptr = buf->data_pages[cur] + offset; 535 read_data = readl_relaxed(drvdata->base + 536 ETB_RAM_READ_DATA_REG); 537 if (lost && i < CORESIGHT_BARRIER_PKT_SIZE) { 538 read_data = *barrier; 539 barrier++; 540 } 541 542 *(u32 *)buf_ptr = read_data; 543 buf_ptr += 4; 544 545 offset += 4; 546 if (offset >= PAGE_SIZE) { 547 offset = 0; 548 cur++; 549 /* wrap around at the end of the buffer */ 550 cur &= buf->nr_pages - 1; 551 } 552 } 553 554 /* reset ETB buffer for next run */ 555 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER); 556 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER); 557 558 /* 559 * In snapshot mode we simply increment the head by the number of byte 560 * that were written. User space will figure out how many bytes to get 561 * from the AUX buffer based on the position of the head. 562 */ 563 if (buf->snapshot) 564 handle->head += to_read; 565 566 __etb_enable_hw(drvdata); 567 CS_LOCK(drvdata->base); 568out: 569 spin_unlock_irqrestore(&drvdata->spinlock, flags); 570 571 return to_read; 572} 573 574static const struct coresight_ops_sink etb_sink_ops = { 575 .enable = etb_enable, 576 .disable = etb_disable, 577 .alloc_buffer = etb_alloc_buffer, 578 .free_buffer = etb_free_buffer, 579 .update_buffer = etb_update_buffer, 580}; 581 582static const struct coresight_ops etb_cs_ops = { 583 .sink_ops = &etb_sink_ops, 584}; 585 586static void etb_dump(struct etb_drvdata *drvdata) 587{ 588 unsigned long flags; 589 590 spin_lock_irqsave(&drvdata->spinlock, flags); 591 if (coresight_get_mode(drvdata->csdev) == CS_MODE_SYSFS) { 592 __etb_disable_hw(drvdata); 593 etb_dump_hw(drvdata); 594 __etb_enable_hw(drvdata); 595 } 596 spin_unlock_irqrestore(&drvdata->spinlock, flags); 597 598 dev_dbg(&drvdata->csdev->dev, "ETB dumped\n"); 599} 600 601static int etb_open(struct inode *inode, struct file *file) 602{ 603 struct etb_drvdata *drvdata = container_of(file->private_data, 604 struct etb_drvdata, miscdev); 605 606 if (local_cmpxchg(&drvdata->reading, 0, 1)) 607 return -EBUSY; 608 609 dev_dbg(&drvdata->csdev->dev, "%s: successfully opened\n", __func__); 610 return 0; 611} 612 613static ssize_t etb_read(struct file *file, char __user *data, 614 size_t len, loff_t *ppos) 615{ 616 u32 depth; 617 struct etb_drvdata *drvdata = container_of(file->private_data, 618 struct etb_drvdata, miscdev); 619 struct device *dev = &drvdata->csdev->dev; 620 621 etb_dump(drvdata); 622 623 depth = drvdata->buffer_depth; 624 if (*ppos + len > depth * 4) 625 len = depth * 4 - *ppos; 626 627 if (copy_to_user(data, drvdata->buf + *ppos, len)) { 628 dev_dbg(dev, 629 "%s: copy_to_user failed\n", __func__); 630 return -EFAULT; 631 } 632 633 *ppos += len; 634 635 dev_dbg(dev, "%s: %zu bytes copied, %d bytes left\n", 636 __func__, len, (int)(depth * 4 - *ppos)); 637 return len; 638} 639 640static int etb_release(struct inode *inode, struct file *file) 641{ 642 struct etb_drvdata *drvdata = container_of(file->private_data, 643 struct etb_drvdata, miscdev); 644 local_set(&drvdata->reading, 0); 645 646 dev_dbg(&drvdata->csdev->dev, "%s: released\n", __func__); 647 return 0; 648} 649 650static const struct file_operations etb_fops = { 651 .owner = THIS_MODULE, 652 .open = etb_open, 653 .read = etb_read, 654 .release = etb_release, 655 .llseek = no_llseek, 656}; 657 658static struct attribute *coresight_etb_mgmt_attrs[] = { 659 coresight_simple_reg32(rdp, ETB_RAM_DEPTH_REG), 660 coresight_simple_reg32(sts, ETB_STATUS_REG), 661 coresight_simple_reg32(rrp, ETB_RAM_READ_POINTER), 662 coresight_simple_reg32(rwp, ETB_RAM_WRITE_POINTER), 663 coresight_simple_reg32(trg, ETB_TRG), 664 coresight_simple_reg32(ctl, ETB_CTL_REG), 665 coresight_simple_reg32(ffsr, ETB_FFSR), 666 coresight_simple_reg32(ffcr, ETB_FFCR), 667 NULL, 668}; 669 670static ssize_t trigger_cntr_show(struct device *dev, 671 struct device_attribute *attr, char *buf) 672{ 673 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent); 674 unsigned long val = drvdata->trigger_cntr; 675 676 return sprintf(buf, "%#lx\n", val); 677} 678 679static ssize_t trigger_cntr_store(struct device *dev, 680 struct device_attribute *attr, 681 const char *buf, size_t size) 682{ 683 int ret; 684 unsigned long val; 685 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent); 686 687 ret = kstrtoul(buf, 16, &val); 688 if (ret) 689 return ret; 690 691 drvdata->trigger_cntr = val; 692 return size; 693} 694static DEVICE_ATTR_RW(trigger_cntr); 695 696static struct attribute *coresight_etb_attrs[] = { 697 &dev_attr_trigger_cntr.attr, 698 NULL, 699}; 700 701static const struct attribute_group coresight_etb_group = { 702 .attrs = coresight_etb_attrs, 703}; 704 705static const struct attribute_group coresight_etb_mgmt_group = { 706 .attrs = coresight_etb_mgmt_attrs, 707 .name = "mgmt", 708}; 709 710static const struct attribute_group *coresight_etb_groups[] = { 711 &coresight_etb_group, 712 &coresight_etb_mgmt_group, 713 NULL, 714}; 715 716static int etb_probe(struct amba_device *adev, const struct amba_id *id) 717{ 718 int ret; 719 void __iomem *base; 720 struct device *dev = &adev->dev; 721 struct coresight_platform_data *pdata = NULL; 722 struct etb_drvdata *drvdata; 723 struct resource *res = &adev->res; 724 struct coresight_desc desc = { 0 }; 725 726 desc.name = coresight_alloc_device_name(&etb_devs, dev); 727 if (!desc.name) 728 return -ENOMEM; 729 730 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 731 if (!drvdata) 732 return -ENOMEM; 733 734 drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */ 735 if (!IS_ERR(drvdata->atclk)) { 736 ret = clk_prepare_enable(drvdata->atclk); 737 if (ret) 738 return ret; 739 } 740 dev_set_drvdata(dev, drvdata); 741 742 /* validity for the resource is already checked by the AMBA core */ 743 base = devm_ioremap_resource(dev, res); 744 if (IS_ERR(base)) 745 return PTR_ERR(base); 746 747 drvdata->base = base; 748 desc.access = CSDEV_ACCESS_IOMEM(base); 749 750 spin_lock_init(&drvdata->spinlock); 751 752 drvdata->buffer_depth = etb_get_buffer_depth(drvdata); 753 754 if (drvdata->buffer_depth & 0x80000000) 755 return -EINVAL; 756 757 drvdata->buf = devm_kcalloc(dev, 758 drvdata->buffer_depth, 4, GFP_KERNEL); 759 if (!drvdata->buf) 760 return -ENOMEM; 761 762 /* This device is not associated with a session */ 763 drvdata->pid = -1; 764 765 pdata = coresight_get_platform_data(dev); 766 if (IS_ERR(pdata)) 767 return PTR_ERR(pdata); 768 adev->dev.platform_data = pdata; 769 770 desc.type = CORESIGHT_DEV_TYPE_SINK; 771 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; 772 desc.ops = &etb_cs_ops; 773 desc.pdata = pdata; 774 desc.dev = dev; 775 desc.groups = coresight_etb_groups; 776 drvdata->csdev = coresight_register(&desc); 777 if (IS_ERR(drvdata->csdev)) 778 return PTR_ERR(drvdata->csdev); 779 780 drvdata->miscdev.name = desc.name; 781 drvdata->miscdev.minor = MISC_DYNAMIC_MINOR; 782 drvdata->miscdev.fops = &etb_fops; 783 ret = misc_register(&drvdata->miscdev); 784 if (ret) 785 goto err_misc_register; 786 787 pm_runtime_put(&adev->dev); 788 return 0; 789 790err_misc_register: 791 coresight_unregister(drvdata->csdev); 792 return ret; 793} 794 795static void etb_remove(struct amba_device *adev) 796{ 797 struct etb_drvdata *drvdata = dev_get_drvdata(&adev->dev); 798 799 /* 800 * Since misc_open() holds a refcount on the f_ops, which is 801 * etb fops in this case, device is there until last file 802 * handler to this device is closed. 803 */ 804 misc_deregister(&drvdata->miscdev); 805 coresight_unregister(drvdata->csdev); 806} 807 808#ifdef CONFIG_PM 809static int etb_runtime_suspend(struct device *dev) 810{ 811 struct etb_drvdata *drvdata = dev_get_drvdata(dev); 812 813 if (drvdata && !IS_ERR(drvdata->atclk)) 814 clk_disable_unprepare(drvdata->atclk); 815 816 return 0; 817} 818 819static int etb_runtime_resume(struct device *dev) 820{ 821 struct etb_drvdata *drvdata = dev_get_drvdata(dev); 822 823 if (drvdata && !IS_ERR(drvdata->atclk)) 824 clk_prepare_enable(drvdata->atclk); 825 826 return 0; 827} 828#endif 829 830static const struct dev_pm_ops etb_dev_pm_ops = { 831 SET_RUNTIME_PM_OPS(etb_runtime_suspend, etb_runtime_resume, NULL) 832}; 833 834static const struct amba_id etb_ids[] = { 835 { 836 .id = 0x000bb907, 837 .mask = 0x000fffff, 838 }, 839 { 0, 0, NULL }, 840}; 841 842MODULE_DEVICE_TABLE(amba, etb_ids); 843 844static struct amba_driver etb_driver = { 845 .drv = { 846 .name = "coresight-etb10", 847 .owner = THIS_MODULE, 848 .pm = &etb_dev_pm_ops, 849 .suppress_bind_attrs = true, 850 851 }, 852 .probe = etb_probe, 853 .remove = etb_remove, 854 .id_table = etb_ids, 855}; 856 857module_amba_driver(etb_driver); 858 859MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 860MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 861MODULE_DESCRIPTION("Arm CoreSight Embedded Trace Buffer driver"); 862MODULE_LICENSE("GPL v2"); 863