1/*
2 * Copyright 2018 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22#include "gf100.h"
23
24#include <core/memory.h>
25#include <subdev/gsp.h>
26#include <subdev/timer.h>
27
28static void
29tu102_bar_bar2_wait(struct nvkm_bar *bar)
30{
31	struct nvkm_device *device = bar->subdev.device;
32	nvkm_msec(device, 2000,
33		if (!(nvkm_rd32(device, 0xb80f50) & 0x0000000c))
34			break;
35	);
36}
37
38static void
39tu102_bar_bar2_fini(struct nvkm_bar *bar)
40{
41	nvkm_mask(bar->subdev.device, 0xb80f48, 0x80000000, 0x00000000);
42}
43
44static void
45tu102_bar_bar2_init(struct nvkm_bar *base)
46{
47	struct nvkm_device *device = base->subdev.device;
48	struct gf100_bar *bar = gf100_bar(base);
49	u32 addr = nvkm_memory_addr(bar->bar[0].inst) >> 12;
50	if (bar->bar2_halve)
51		addr |= 0x40000000;
52	nvkm_wr32(device, 0xb80f48, 0x80000000 | addr);
53}
54
55static void
56tu102_bar_bar1_wait(struct nvkm_bar *bar)
57{
58	struct nvkm_device *device = bar->subdev.device;
59	nvkm_msec(device, 2000,
60		if (!(nvkm_rd32(device, 0xb80f50) & 0x00000003))
61			break;
62	);
63}
64
65static void
66tu102_bar_bar1_fini(struct nvkm_bar *bar)
67{
68	nvkm_mask(bar->subdev.device, 0xb80f40, 0x80000000, 0x00000000);
69}
70
71static void
72tu102_bar_bar1_init(struct nvkm_bar *base)
73{
74	struct nvkm_device *device = base->subdev.device;
75	struct gf100_bar *bar = gf100_bar(base);
76	const u32 addr = nvkm_memory_addr(bar->bar[1].inst) >> 12;
77	nvkm_wr32(device, 0xb80f40, 0x80000000 | addr);
78}
79
80static const struct nvkm_bar_func
81tu102_bar = {
82	.dtor = gf100_bar_dtor,
83	.oneinit = gf100_bar_oneinit,
84	.bar1.init = tu102_bar_bar1_init,
85	.bar1.fini = tu102_bar_bar1_fini,
86	.bar1.wait = tu102_bar_bar1_wait,
87	.bar1.vmm = gf100_bar_bar1_vmm,
88	.bar2.init = tu102_bar_bar2_init,
89	.bar2.fini = tu102_bar_bar2_fini,
90	.bar2.wait = tu102_bar_bar2_wait,
91	.bar2.vmm = gf100_bar_bar2_vmm,
92	.flush = g84_bar_flush,
93};
94
95int
96tu102_bar_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
97	      struct nvkm_bar **pbar)
98{
99	if (nvkm_gsp_rm(device->gsp))
100		return r535_bar_new_(&tu102_bar, device, type, inst, pbar);
101
102	return gf100_bar_new_(&tu102_bar, device, type, inst, pbar);
103}
104