1/*
2 * Copyright 2013 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24#include "nv40.h"
25
26static const struct nvkm_specsrc
27gt215_zcull_sources[] = {
28	{ 0x402ca4, (const struct nvkm_specmux[]) {
29			{ 0x7fff, 0, "unk0" },
30			{ 0xff, 24, "unk24" },
31			{}
32		}, "pgraph_zcull_pm_unka4" },
33	{}
34};
35
36static const struct nvkm_specdom
37gt215_pm[] = {
38	{ 0x20, (const struct nvkm_specsig[]) {
39			{}
40		}, &nv40_perfctr_func },
41	{ 0xf0, (const struct nvkm_specsig[]) {
42			{ 0xcb, "pc01_gr_idle" },
43			{ 0x86, "pc01_strmout_00" },
44			{ 0x87, "pc01_strmout_01" },
45			{ 0xe0, "pc01_trast_00" },
46			{ 0xe1, "pc01_trast_01" },
47			{ 0xe2, "pc01_trast_02" },
48			{ 0xe3, "pc01_trast_03" },
49			{ 0xe6, "pc01_trast_04" },
50			{ 0xe7, "pc01_trast_05" },
51			{ 0x84, "pc01_vattr_00" },
52			{ 0x85, "pc01_vattr_01" },
53			{ 0x46, "pc01_vfetch_00", g84_vfetch_sources },
54			{ 0x47, "pc01_vfetch_01", g84_vfetch_sources },
55			{ 0x48, "pc01_vfetch_02", g84_vfetch_sources },
56			{ 0x49, "pc01_vfetch_03", g84_vfetch_sources },
57			{ 0x4a, "pc01_vfetch_04", g84_vfetch_sources },
58			{ 0x4b, "pc01_vfetch_05", g84_vfetch_sources },
59			{ 0x4c, "pc01_vfetch_06", g84_vfetch_sources },
60			{ 0x4d, "pc01_vfetch_07", g84_vfetch_sources },
61			{ 0x4e, "pc01_vfetch_08", g84_vfetch_sources },
62			{ 0x4f, "pc01_vfetch_09", g84_vfetch_sources },
63			{ 0x50, "pc01_vfetch_0a", g84_vfetch_sources },
64			{ 0x51, "pc01_vfetch_0b", g84_vfetch_sources },
65			{ 0x52, "pc01_vfetch_0c", g84_vfetch_sources },
66			{ 0x53, "pc01_vfetch_0d", g84_vfetch_sources },
67			{ 0x54, "pc01_vfetch_0e", g84_vfetch_sources },
68			{ 0x55, "pc01_vfetch_0f", g84_vfetch_sources },
69			{ 0x56, "pc01_vfetch_10", g84_vfetch_sources },
70			{ 0x57, "pc01_vfetch_11", g84_vfetch_sources },
71			{ 0x58, "pc01_vfetch_12", g84_vfetch_sources },
72			{ 0x59, "pc01_vfetch_13", g84_vfetch_sources },
73			{ 0x5a, "pc01_vfetch_14", g84_vfetch_sources },
74			{ 0x5b, "pc01_vfetch_15", g84_vfetch_sources },
75			{ 0x5c, "pc01_vfetch_16", g84_vfetch_sources },
76			{ 0x5d, "pc01_vfetch_17", g84_vfetch_sources },
77			{ 0x5e, "pc01_vfetch_18", g84_vfetch_sources },
78			{ 0x5f, "pc01_vfetch_19", g84_vfetch_sources },
79			{ 0x07, "pc01_zcull_00", gt215_zcull_sources },
80			{ 0x08, "pc01_zcull_01", gt215_zcull_sources },
81			{ 0x09, "pc01_zcull_02", gt215_zcull_sources },
82			{ 0x0a, "pc01_zcull_03", gt215_zcull_sources },
83			{ 0x0b, "pc01_zcull_04", gt215_zcull_sources },
84			{ 0x0c, "pc01_zcull_05", gt215_zcull_sources },
85			{ 0xb2, "pc01_unk00" },
86			{ 0xec, "pc01_trailer" },
87			{}
88		}, &nv40_perfctr_func },
89	{ 0xe0, (const struct nvkm_specsig[]) {
90			{ 0x64, "pc02_crop_00", gt200_crop_sources },
91			{ 0x65, "pc02_crop_01", gt200_crop_sources },
92			{ 0x66, "pc02_crop_02", gt200_crop_sources },
93			{ 0x67, "pc02_crop_03", gt200_crop_sources },
94			{ 0x00, "pc02_prop_00", gt200_prop_sources },
95			{ 0x01, "pc02_prop_01", gt200_prop_sources },
96			{ 0x02, "pc02_prop_02", gt200_prop_sources },
97			{ 0x03, "pc02_prop_03", gt200_prop_sources },
98			{ 0x04, "pc02_prop_04", gt200_prop_sources },
99			{ 0x05, "pc02_prop_05", gt200_prop_sources },
100			{ 0x06, "pc02_prop_06", gt200_prop_sources },
101			{ 0x07, "pc02_prop_07", gt200_prop_sources },
102			{ 0x80, "pc02_tex_00", gt200_tex_sources },
103			{ 0x81, "pc02_tex_01", gt200_tex_sources },
104			{ 0x82, "pc02_tex_02", gt200_tex_sources },
105			{ 0x83, "pc02_tex_03", gt200_tex_sources },
106			{ 0x3a, "pc02_tex_04", gt200_tex_sources },
107			{ 0x3b, "pc02_tex_05", gt200_tex_sources },
108			{ 0x3c, "pc02_tex_06", gt200_tex_sources },
109			{ 0x7c, "pc02_zrop_00", nv50_zrop_sources },
110			{ 0x7d, "pc02_zrop_01", nv50_zrop_sources },
111			{ 0x7e, "pc02_zrop_02", nv50_zrop_sources },
112			{ 0x7f, "pc02_zrop_03", nv50_zrop_sources },
113			{ 0xcc, "pc02_trailer" },
114			{}
115		}, &nv40_perfctr_func },
116	{ 0x20, (const struct nvkm_specsig[]) {
117			{}
118		}, &nv40_perfctr_func },
119	{ 0x20, (const struct nvkm_specsig[]) {
120			{}
121		}, &nv40_perfctr_func },
122	{ 0x20, (const struct nvkm_specsig[]) {
123			{}
124		}, &nv40_perfctr_func },
125	{ 0x20, (const struct nvkm_specsig[]) {
126			{}
127		}, &nv40_perfctr_func },
128	{ 0x20, (const struct nvkm_specsig[]) {
129			{}
130		}, &nv40_perfctr_func },
131	{}
132};
133
134int
135gt215_pm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_pm **ppm)
136{
137	return nv40_pm_new_(gt215_pm, device, type, inst, ppm);
138}
139