1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2023 Loongson Technology Corporation Limited 4 */ 5 6#include "lsdc_drv.h" 7#include "lsdc_probe.h" 8 9/* 10 * Processor ID (implementation) values for bits 15:8 of the PRID register. 11 */ 12#define LOONGSON_CPU_IMP_MASK 0xff00 13#define LOONGSON_CPU_IMP_SHIFT 8 14 15#define LOONGARCH_CPU_IMP_LS2K1000 0xa0 16#define LOONGARCH_CPU_IMP_LS2K2000 0xb0 17#define LOONGARCH_CPU_IMP_LS3A5000 0xc0 18 19#define LOONGSON_CPU_MIPS_IMP_LS2K 0x61 /* Loongson 2K Mips series SoC */ 20 21/* 22 * Particular Revision values for bits 7:0 of the PRID register. 23 */ 24#define LOONGSON_CPU_REV_MASK 0x00ff 25 26#define LOONGARCH_CPUCFG_PRID_REG 0x0 27 28/* 29 * We can achieve fine-grained control with the information about the host. 30 */ 31 32unsigned int loongson_cpu_get_prid(u8 *imp, u8 *rev) 33{ 34 unsigned int prid = 0; 35 36#if defined(__loongarch__) 37 __asm__ volatile("cpucfg %0, %1\n\t" 38 : "=&r"(prid) 39 : "r"(LOONGARCH_CPUCFG_PRID_REG) 40 ); 41#endif 42 43#if defined(__mips__) 44 __asm__ volatile("mfc0\t%0, $15\n\t" 45 : "=r" (prid) 46 ); 47#endif 48 49 if (imp) 50 *imp = (prid & LOONGSON_CPU_IMP_MASK) >> LOONGSON_CPU_IMP_SHIFT; 51 52 if (rev) 53 *rev = prid & LOONGSON_CPU_REV_MASK; 54 55 return prid; 56} 57