1// SPDX-License-Identifier: MIT 2/* 3 * Copyright �� 2023 Intel Corporation 4 */ 5 6#include "i915_drv.h" 7#include "i915_reg.h" 8#include "intel_de.h" 9#include "intel_display_wa.h" 10 11static void gen11_display_wa_apply(struct drm_i915_private *i915) 12{ 13 /* Wa_1409120013 */ 14 intel_de_write(i915, ILK_DPFC_CHICKEN(INTEL_FBC_A), 15 DPFC_CHICKEN_COMP_DUMMY_PIXEL); 16 17 /* Wa_14010594013 */ 18 intel_de_rmw(i915, GEN8_CHICKEN_DCPR_1, 0, ICL_DELAY_PMRSP); 19} 20 21static void xe_d_display_wa_apply(struct drm_i915_private *i915) 22{ 23 /* Wa_1409120013 */ 24 intel_de_write(i915, ILK_DPFC_CHICKEN(INTEL_FBC_A), 25 DPFC_CHICKEN_COMP_DUMMY_PIXEL); 26 27 /* Wa_14013723622 */ 28 intel_de_rmw(i915, CLKREQ_POLICY, CLKREQ_POLICY_MEM_UP_OVRD, 0); 29} 30 31static void adlp_display_wa_apply(struct drm_i915_private *i915) 32{ 33 /* Wa_22011091694:adlp */ 34 intel_de_rmw(i915, GEN9_CLKGATE_DIS_5, 0, DPCE_GATING_DIS); 35 36 /* Bspec/49189 Initialize Sequence */ 37 intel_de_rmw(i915, GEN8_CHICKEN_DCPR_1, DDI_CLOCK_REG_ACCESS, 0); 38} 39 40void intel_display_wa_apply(struct drm_i915_private *i915) 41{ 42 if (IS_ALDERLAKE_P(i915)) 43 adlp_display_wa_apply(i915); 44 else if (DISPLAY_VER(i915) == 12) 45 xe_d_display_wa_apply(i915); 46 else if (DISPLAY_VER(i915) == 11) 47 gen11_display_wa_apply(i915); 48} 49