1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright �� 2020 Intel Corporation
4 */
5
6#ifndef _INTEL_DDI_BUF_TRANS_H_
7#define _INTEL_DDI_BUF_TRANS_H_
8
9#include <linux/types.h>
10
11struct drm_i915_private;
12struct intel_encoder;
13struct intel_crtc_state;
14
15struct hsw_ddi_buf_trans {
16	u32 trans1;	/* balance leg enable, de-emph level */
17	u32 trans2;	/* vref sel, vswing */
18	u8 i_boost;	/* SKL: I_boost; valid: 0x0, 0x1, 0x3, 0x7 */
19};
20
21struct bxt_ddi_buf_trans {
22	u8 margin;	/* swing value */
23	u8 scale;	/* scale value */
24	u8 enable;	/* scale enable */
25	u8 deemphasis;
26};
27
28struct icl_ddi_buf_trans {
29	u8 dw2_swing_sel;
30	u8 dw7_n_scalar;
31	u8 dw4_cursor_coeff;
32	u8 dw4_post_cursor_2;
33	u8 dw4_post_cursor_1;
34};
35
36struct icl_mg_phy_ddi_buf_trans {
37	u8 cri_txdeemph_override_11_6;
38	u8 cri_txdeemph_override_5_0;
39	u8 cri_txdeemph_override_17_12;
40};
41
42struct tgl_dkl_phy_ddi_buf_trans {
43	u8 vswing;
44	u8 preshoot;
45	u8 de_emphasis;
46};
47
48struct dg2_snps_phy_buf_trans {
49	u8 vswing;
50	u8 pre_cursor;
51	u8 post_cursor;
52};
53
54union intel_ddi_buf_trans_entry {
55	struct hsw_ddi_buf_trans hsw;
56	struct bxt_ddi_buf_trans bxt;
57	struct icl_ddi_buf_trans icl;
58	struct icl_mg_phy_ddi_buf_trans mg;
59	struct tgl_dkl_phy_ddi_buf_trans dkl;
60	struct dg2_snps_phy_buf_trans snps;
61};
62
63struct intel_ddi_buf_trans {
64	const union intel_ddi_buf_trans_entry *entries;
65	u8 num_entries;
66	u8 hdmi_default_entry;
67};
68
69bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
70
71void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
72
73#endif
74