1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (c) 2009-2011, Intel Corporation. 4 */ 5 6#ifndef __INTEL_DRV_H__ 7#define __INTEL_DRV_H__ 8 9#include <linux/i2c.h> 10#include <linux/i2c-algo-bit.h> 11#include <drm/drm_crtc.h> 12#include <drm/drm_encoder.h> 13#include <drm/drm_probe_helper.h> 14#include <drm/drm_vblank.h> 15#include "gma_display.h" 16 17/* 18 * Display related stuff 19 */ 20 21/* maximum connectors per crtcs in the mode set */ 22#define INTELFB_CONN_LIMIT 4 23 24/* Intel Pipe Clone Bit */ 25#define INTEL_HDMIB_CLONE_BIT 1 26#define INTEL_HDMIC_CLONE_BIT 2 27#define INTEL_HDMID_CLONE_BIT 3 28#define INTEL_HDMIE_CLONE_BIT 4 29#define INTEL_HDMIF_CLONE_BIT 5 30#define INTEL_SDVO_NON_TV_CLONE_BIT 6 31#define INTEL_SDVO_TV_CLONE_BIT 7 32#define INTEL_SDVO_LVDS_CLONE_BIT 8 33#define INTEL_ANALOG_CLONE_BIT 9 34#define INTEL_TV_CLONE_BIT 10 35#define INTEL_DP_B_CLONE_BIT 11 36#define INTEL_DP_C_CLONE_BIT 12 37#define INTEL_DP_D_CLONE_BIT 13 38#define INTEL_LVDS_CLONE_BIT 14 39#define INTEL_DVO_TMDS_CLONE_BIT 15 40#define INTEL_DVO_LVDS_CLONE_BIT 16 41#define INTEL_EDP_CLONE_BIT 17 42 43/* these are outputs from the chip - integrated only 44 * external chips are via DVO or SDVO output */ 45#define INTEL_OUTPUT_UNUSED 0 46#define INTEL_OUTPUT_ANALOG 1 47#define INTEL_OUTPUT_DVO 2 48#define INTEL_OUTPUT_SDVO 3 49#define INTEL_OUTPUT_LVDS 4 50#define INTEL_OUTPUT_TVOUT 5 51#define INTEL_OUTPUT_HDMI 6 52#define INTEL_OUTPUT_MIPI 7 53#define INTEL_OUTPUT_MIPI2 8 54#define INTEL_OUTPUT_DISPLAYPORT 9 55#define INTEL_OUTPUT_EDP 10 56 57/* 58 * Hold information useally put on the device driver privates here, 59 * since it needs to be shared across multiple of devices drivers privates. 60 */ 61struct psb_intel_mode_device { 62 63 /* 64 * Abstracted memory manager operations 65 */ 66 size_t(*bo_offset) (struct drm_device *dev, void *bo); 67 68 /* 69 * LVDS info 70 */ 71 int backlight_duty_cycle; /* restore backlight to this value */ 72 bool panel_wants_dither; 73 struct drm_display_mode *panel_fixed_mode; 74 struct drm_display_mode *panel_fixed_mode2; 75 struct drm_display_mode *vbt_mode; /* if any */ 76 77 uint32_t saveBLC_PWM_CTL; 78}; 79 80struct gma_i2c_chan { 81 struct i2c_adapter base; 82 struct i2c_algo_bit_data algo; 83 u8 slave_addr; 84 85 /* for getting at dev. private (mmio etc.) */ 86 struct drm_device *drm_dev; 87 u32 reg; /* GPIO reg */ 88}; 89 90struct gma_encoder { 91 struct drm_encoder base; 92 int type; 93 bool needs_tv_clock; 94 void (*hot_plug)(struct gma_encoder *); 95 int crtc_mask; 96 int clone_mask; 97 u32 ddi_select; /* Channel info */ 98#define DDI0_SELECT 0x01 99#define DDI1_SELECT 0x02 100#define DP_MASK 0x8000 101#define DDI_MASK 0x03 102 void *dev_priv; /* For sdvo_priv, lvds_priv, etc... */ 103 104 /* FIXME: Either make SDVO and LVDS store it's i2c here or give CDV it's 105 own set of output privates */ 106 struct gma_i2c_chan *i2c_bus; 107}; 108 109struct gma_connector { 110 struct drm_connector base; 111 struct gma_encoder *encoder; 112 113 void (*save)(struct drm_connector *connector); 114 void (*restore)(struct drm_connector *connector); 115}; 116 117struct psb_intel_crtc_state { 118 uint32_t saveDSPCNTR; 119 uint32_t savePIPECONF; 120 uint32_t savePIPESRC; 121 uint32_t saveDPLL; 122 uint32_t saveFP0; 123 uint32_t saveFP1; 124 uint32_t saveHTOTAL; 125 uint32_t saveHBLANK; 126 uint32_t saveHSYNC; 127 uint32_t saveVTOTAL; 128 uint32_t saveVBLANK; 129 uint32_t saveVSYNC; 130 uint32_t saveDSPSTRIDE; 131 uint32_t saveDSPSIZE; 132 uint32_t saveDSPPOS; 133 uint32_t saveDSPBASE; 134 uint32_t savePalette[256]; 135}; 136 137struct gma_crtc { 138 struct drm_crtc base; 139 int pipe; 140 int plane; 141 uint32_t cursor_addr; 142 struct psb_gem_object *cursor_pobj; 143 u8 lut_adj[256]; 144 struct psb_intel_framebuffer *fbdev_fb; 145 /* a mode_set for fbdev users on this crtc */ 146 struct drm_mode_set mode_set; 147 148 /* GEM object that holds our cursor */ 149 struct drm_gem_object *cursor_obj; 150 151 struct drm_display_mode saved_mode; 152 struct drm_display_mode saved_adjusted_mode; 153 154 struct psb_intel_mode_device *mode_dev; 155 156 /*crtc mode setting flags*/ 157 u32 mode_flags; 158 159 bool active; 160 161 /* Saved Crtc HW states */ 162 struct psb_intel_crtc_state *crtc_state; 163 164 const struct gma_clock_funcs *clock_funcs; 165 166 struct drm_pending_vblank_event *page_flip_event; 167}; 168 169#define to_gma_crtc(x) \ 170 container_of(x, struct gma_crtc, base) 171#define to_gma_connector(x) \ 172 container_of(x, struct gma_connector, base) 173#define to_gma_encoder(x) \ 174 container_of(x, struct gma_encoder, base) 175#define to_psb_intel_framebuffer(x) \ 176 container_of(x, struct psb_intel_framebuffer, base) 177#define to_gma_i2c_chan(x) \ 178 container_of(x, struct gma_i2c_chan, base) 179 180struct gma_i2c_chan *gma_i2c_create(struct drm_device *dev, const u32 reg, 181 const char *name); 182void gma_i2c_destroy(struct gma_i2c_chan *chan); 183int psb_intel_ddc_get_modes(struct drm_connector *connector, 184 struct i2c_adapter *adapter); 185extern bool psb_intel_ddc_probe(struct i2c_adapter *adapter); 186 187extern void psb_intel_crtc_init(struct drm_device *dev, int pipe, 188 struct psb_intel_mode_device *mode_dev); 189extern bool psb_intel_sdvo_init(struct drm_device *dev, int output_device); 190extern void psb_intel_lvds_init(struct drm_device *dev, 191 struct psb_intel_mode_device *mode_dev); 192extern void psb_intel_lvds_set_brightness(struct drm_device *dev, int level); 193extern void oaktrail_lvds_init(struct drm_device *dev, 194 struct psb_intel_mode_device *mode_dev); 195struct gma_i2c_chan *oaktrail_lvds_i2c_init(struct drm_device *dev); 196 197extern struct drm_encoder *gma_best_encoder(struct drm_connector *connector); 198extern void gma_connector_attach_encoder(struct gma_connector *connector, 199 struct gma_encoder *encoder); 200 201static inline struct gma_encoder *gma_attached_encoder( 202 struct drm_connector *connector) 203{ 204 return to_gma_connector(connector)->encoder; 205} 206 207extern struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev, 208 struct drm_crtc *crtc); 209extern struct drm_crtc *psb_intel_get_crtc_from_pipe(struct drm_device *dev, 210 int pipe); 211extern bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder, 212 const struct drm_display_mode *mode, 213 struct drm_display_mode *adjusted_mode); 214extern enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector, 215 struct drm_display_mode *mode); 216extern int psb_intel_lvds_set_property(struct drm_connector *connector, 217 struct drm_property *property, 218 uint64_t value); 219extern void psb_intel_lvds_destroy(struct drm_connector *connector); 220 221/* intel_gmbus.c */ 222extern void gma_intel_i2c_reset(struct drm_device *dev); 223extern int gma_intel_setup_gmbus(struct drm_device *dev); 224extern void gma_intel_gmbus_set_speed(struct i2c_adapter *adapter, int speed); 225extern void gma_intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit); 226extern void gma_intel_teardown_gmbus(struct drm_device *dev); 227 228/* DP support */ 229extern void cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev, int output_reg); 230extern void cdv_intel_dp_set_m_n(struct drm_crtc *crtc, 231 struct drm_display_mode *mode, 232 struct drm_display_mode *adjusted_mode); 233 234extern int cdv_sb_read(struct drm_device *dev, u32 reg, u32 *val); 235extern int cdv_sb_write(struct drm_device *dev, u32 reg, u32 val); 236extern void cdv_sb_reset(struct drm_device *dev); 237 238extern void cdv_intel_attach_force_audio_property(struct drm_connector *connector); 239extern void cdv_intel_attach_broadcast_rgb_property(struct drm_connector *connector); 240 241#endif /* __INTEL_DRV_H__ */ 242