1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2011 Samsung Electronics Co.Ltd
4 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
5 */
6
7
8#include <drm/drm_atomic.h>
9#include <drm/drm_atomic_helper.h>
10#include <drm/drm_blend.h>
11#include <drm/drm_framebuffer.h>
12#include <drm/exynos_drm.h>
13
14#include "exynos_drm_crtc.h"
15#include "exynos_drm_drv.h"
16#include "exynos_drm_fb.h"
17#include "exynos_drm_gem.h"
18#include "exynos_drm_plane.h"
19
20/*
21 * This function is to get X or Y size shown via screen. This needs length and
22 * start position of CRTC.
23 *
24 *      <--- length --->
25 * CRTC ----------------
26 *      ^ start        ^ end
27 *
28 * There are six cases from a to f.
29 *
30 *             <----- SCREEN ----->
31 *             0                 last
32 *   ----------|------------------|----------
33 * CRTCs
34 * a -------
35 *        b -------
36 *        c --------------------------
37 *                 d --------
38 *                           e -------
39 *                                  f -------
40 */
41static int exynos_plane_get_size(int start, unsigned length, unsigned last)
42{
43	int end = start + length;
44	int size = 0;
45
46	if (start <= 0) {
47		if (end > 0)
48			size = min_t(unsigned, end, last);
49	} else if (start <= last) {
50		size = min_t(unsigned, last - start, length);
51	}
52
53	return size;
54}
55
56static void exynos_plane_mode_set(struct exynos_drm_plane_state *exynos_state)
57{
58	struct drm_plane_state *state = &exynos_state->base;
59	struct drm_crtc *crtc = state->crtc;
60	struct drm_crtc_state *crtc_state =
61			drm_atomic_get_existing_crtc_state(state->state, crtc);
62	struct drm_display_mode *mode = &crtc_state->adjusted_mode;
63	int crtc_x, crtc_y;
64	unsigned int crtc_w, crtc_h;
65	unsigned int src_x, src_y;
66	unsigned int src_w, src_h;
67	unsigned int actual_w;
68	unsigned int actual_h;
69
70	/*
71	 * The original src/dest coordinates are stored in exynos_state->base,
72	 * but we want to keep another copy internal to our driver that we can
73	 * clip/modify ourselves.
74	 */
75
76	crtc_x = state->crtc_x;
77	crtc_y = state->crtc_y;
78	crtc_w = state->crtc_w;
79	crtc_h = state->crtc_h;
80
81	src_x = state->src_x >> 16;
82	src_y = state->src_y >> 16;
83	src_w = state->src_w >> 16;
84	src_h = state->src_h >> 16;
85
86	/* set ratio */
87	exynos_state->h_ratio = (src_w << 16) / crtc_w;
88	exynos_state->v_ratio = (src_h << 16) / crtc_h;
89
90	/* clip to visible area */
91	actual_w = exynos_plane_get_size(crtc_x, crtc_w, mode->hdisplay);
92	actual_h = exynos_plane_get_size(crtc_y, crtc_h, mode->vdisplay);
93
94	if (crtc_x < 0) {
95		if (actual_w)
96			src_x += ((-crtc_x) * exynos_state->h_ratio) >> 16;
97		crtc_x = 0;
98	}
99
100	if (crtc_y < 0) {
101		if (actual_h)
102			src_y += ((-crtc_y) * exynos_state->v_ratio) >> 16;
103		crtc_y = 0;
104	}
105
106	/* set drm framebuffer data. */
107	exynos_state->src.x = src_x;
108	exynos_state->src.y = src_y;
109	exynos_state->src.w = (actual_w * exynos_state->h_ratio) >> 16;
110	exynos_state->src.h = (actual_h * exynos_state->v_ratio) >> 16;
111
112	/* set plane range to be displayed. */
113	exynos_state->crtc.x = crtc_x;
114	exynos_state->crtc.y = crtc_y;
115	exynos_state->crtc.w = actual_w;
116	exynos_state->crtc.h = actual_h;
117
118	DRM_DEV_DEBUG_KMS(crtc->dev->dev,
119			  "plane : offset_x/y(%d,%d), width/height(%d,%d)",
120			  exynos_state->crtc.x, exynos_state->crtc.y,
121			  exynos_state->crtc.w, exynos_state->crtc.h);
122}
123
124static void exynos_drm_plane_reset(struct drm_plane *plane)
125{
126	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
127	struct exynos_drm_plane_state *exynos_state;
128
129	if (plane->state) {
130		exynos_state = to_exynos_plane_state(plane->state);
131		__drm_atomic_helper_plane_destroy_state(plane->state);
132		kfree(exynos_state);
133		plane->state = NULL;
134	}
135
136	exynos_state = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
137	if (exynos_state) {
138		__drm_atomic_helper_plane_reset(plane, &exynos_state->base);
139		plane->state->zpos = exynos_plane->config->zpos;
140	}
141}
142
143static struct drm_plane_state *
144exynos_drm_plane_duplicate_state(struct drm_plane *plane)
145{
146	struct exynos_drm_plane_state *exynos_state;
147	struct exynos_drm_plane_state *copy;
148
149	exynos_state = to_exynos_plane_state(plane->state);
150	copy = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
151	if (!copy)
152		return NULL;
153
154	__drm_atomic_helper_plane_duplicate_state(plane, &copy->base);
155	return &copy->base;
156}
157
158static void exynos_drm_plane_destroy_state(struct drm_plane *plane,
159					   struct drm_plane_state *old_state)
160{
161	struct exynos_drm_plane_state *old_exynos_state =
162					to_exynos_plane_state(old_state);
163	__drm_atomic_helper_plane_destroy_state(old_state);
164	kfree(old_exynos_state);
165}
166
167static struct drm_plane_funcs exynos_plane_funcs = {
168	.update_plane	= drm_atomic_helper_update_plane,
169	.disable_plane	= drm_atomic_helper_disable_plane,
170	.destroy	= drm_plane_cleanup,
171	.reset		= exynos_drm_plane_reset,
172	.atomic_duplicate_state = exynos_drm_plane_duplicate_state,
173	.atomic_destroy_state = exynos_drm_plane_destroy_state,
174};
175
176static int
177exynos_drm_plane_check_format(const struct exynos_drm_plane_config *config,
178			      struct exynos_drm_plane_state *state)
179{
180	struct drm_framebuffer *fb = state->base.fb;
181	struct drm_device *dev = fb->dev;
182
183	switch (fb->modifier) {
184	case DRM_FORMAT_MOD_SAMSUNG_64_32_TILE:
185		if (!(config->capabilities & EXYNOS_DRM_PLANE_CAP_TILE))
186			return -ENOTSUPP;
187		break;
188
189	case DRM_FORMAT_MOD_LINEAR:
190		break;
191
192	default:
193		DRM_DEV_ERROR(dev->dev, "unsupported pixel format modifier");
194		return -ENOTSUPP;
195	}
196
197	return 0;
198}
199
200static int
201exynos_drm_plane_check_size(const struct exynos_drm_plane_config *config,
202			    struct exynos_drm_plane_state *state)
203{
204	struct drm_crtc *crtc = state->base.crtc;
205	bool width_ok = false, height_ok = false;
206
207	if (config->capabilities & EXYNOS_DRM_PLANE_CAP_SCALE)
208		return 0;
209
210	if (state->src.w == state->crtc.w)
211		width_ok = true;
212
213	if (state->src.h == state->crtc.h)
214		height_ok = true;
215
216	if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
217	    state->h_ratio == (1 << 15))
218		width_ok = true;
219
220	if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
221	    state->v_ratio == (1 << 15))
222		height_ok = true;
223
224	if (width_ok && height_ok)
225		return 0;
226
227	DRM_DEV_DEBUG_KMS(crtc->dev->dev, "scaling mode is not supported");
228	return -ENOTSUPP;
229}
230
231static int exynos_plane_atomic_check(struct drm_plane *plane,
232				     struct drm_atomic_state *state)
233{
234	struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
235										 plane);
236	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
237	struct exynos_drm_plane_state *exynos_state =
238						to_exynos_plane_state(new_plane_state);
239	int ret = 0;
240
241	if (!new_plane_state->crtc || !new_plane_state->fb)
242		return 0;
243
244	/* translate state into exynos_state */
245	exynos_plane_mode_set(exynos_state);
246
247	ret = exynos_drm_plane_check_format(exynos_plane->config, exynos_state);
248	if (ret)
249		return ret;
250
251	ret = exynos_drm_plane_check_size(exynos_plane->config, exynos_state);
252	return ret;
253}
254
255static void exynos_plane_atomic_update(struct drm_plane *plane,
256				       struct drm_atomic_state *state)
257{
258	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
259								           plane);
260	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(new_state->crtc);
261	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
262
263	if (!new_state->crtc)
264		return;
265
266	if (exynos_crtc->ops->update_plane)
267		exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane);
268}
269
270static void exynos_plane_atomic_disable(struct drm_plane *plane,
271					struct drm_atomic_state *state)
272{
273	struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);
274	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
275	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(old_state->crtc);
276
277	if (!old_state->crtc)
278		return;
279
280	if (exynos_crtc->ops->disable_plane)
281		exynos_crtc->ops->disable_plane(exynos_crtc, exynos_plane);
282}
283
284static const struct drm_plane_helper_funcs plane_helper_funcs = {
285	.atomic_check = exynos_plane_atomic_check,
286	.atomic_update = exynos_plane_atomic_update,
287	.atomic_disable = exynos_plane_atomic_disable,
288};
289
290static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
291					      int zpos, bool immutable)
292{
293	if (immutable)
294		drm_plane_create_zpos_immutable_property(plane, zpos);
295	else
296		drm_plane_create_zpos_property(plane, zpos, 0, MAX_PLANE - 1);
297}
298
299int exynos_plane_init(struct drm_device *dev,
300		      struct exynos_drm_plane *exynos_plane, unsigned int index,
301		      const struct exynos_drm_plane_config *config)
302{
303	int err;
304	unsigned int supported_modes = BIT(DRM_MODE_BLEND_PIXEL_NONE) |
305				       BIT(DRM_MODE_BLEND_PREMULTI) |
306				       BIT(DRM_MODE_BLEND_COVERAGE);
307	struct drm_plane *plane = &exynos_plane->base;
308
309	err = drm_universal_plane_init(dev, &exynos_plane->base,
310				       1 << dev->mode_config.num_crtc,
311				       &exynos_plane_funcs,
312				       config->pixel_formats,
313				       config->num_pixel_formats,
314				       NULL, config->type, NULL);
315	if (err) {
316		DRM_DEV_ERROR(dev->dev, "failed to initialize plane\n");
317		return err;
318	}
319
320	drm_plane_helper_add(&exynos_plane->base, &plane_helper_funcs);
321
322	exynos_plane->index = index;
323	exynos_plane->config = config;
324
325	exynos_plane_attach_zpos_property(&exynos_plane->base, config->zpos,
326			   !(config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS));
327
328	if (config->capabilities & EXYNOS_DRM_PLANE_CAP_PIX_BLEND)
329		drm_plane_create_blend_mode_property(plane, supported_modes);
330
331	if (config->capabilities & EXYNOS_DRM_PLANE_CAP_WIN_BLEND)
332		drm_plane_create_alpha_property(plane);
333
334	return 0;
335}
336