1// SPDX-License-Identifier: GPL-2.0+
2
3/*
4 * Copyright (C) 2022 Pengutronix, Lucas Stach <kernel@pengutronix.de>
5 */
6
7#include <linux/clk.h>
8#include <linux/mod_devicetable.h>
9#include <linux/module.h>
10#include <linux/platform_device.h>
11#include <drm/bridge/dw_hdmi.h>
12#include <drm/drm_modes.h>
13
14struct imx8mp_hdmi {
15	struct dw_hdmi_plat_data plat_data;
16	struct dw_hdmi *dw_hdmi;
17	struct clk *pixclk;
18};
19
20static enum drm_mode_status
21imx8mp_hdmi_mode_valid(struct dw_hdmi *dw_hdmi, void *data,
22		       const struct drm_display_info *info,
23		       const struct drm_display_mode *mode)
24{
25	struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data;
26
27	if (mode->clock < 13500)
28		return MODE_CLOCK_LOW;
29
30	if (mode->clock > 297000)
31		return MODE_CLOCK_HIGH;
32
33	if (clk_round_rate(hdmi->pixclk, mode->clock * 1000) !=
34	    mode->clock * 1000)
35		return MODE_CLOCK_RANGE;
36
37	/* We don't support double-clocked and Interlaced modes */
38	if ((mode->flags & DRM_MODE_FLAG_DBLCLK) ||
39	    (mode->flags & DRM_MODE_FLAG_INTERLACE))
40		return MODE_BAD;
41
42	return MODE_OK;
43}
44
45static int imx8mp_hdmi_phy_init(struct dw_hdmi *dw_hdmi, void *data,
46				const struct drm_display_info *display,
47				const struct drm_display_mode *mode)
48{
49	return 0;
50}
51
52static void imx8mp_hdmi_phy_disable(struct dw_hdmi *dw_hdmi, void *data)
53{
54}
55
56static void im8mp_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data)
57{
58	/*
59	 * Just release PHY core from reset, all other power management is done
60	 * by the PHY driver.
61	 */
62	dw_hdmi_phy_gen1_reset(hdmi);
63
64	dw_hdmi_phy_setup_hpd(hdmi, data);
65}
66
67static const struct dw_hdmi_phy_ops imx8mp_hdmi_phy_ops = {
68	.init		= imx8mp_hdmi_phy_init,
69	.disable	= imx8mp_hdmi_phy_disable,
70	.setup_hpd	= im8mp_hdmi_phy_setup_hpd,
71	.read_hpd	= dw_hdmi_phy_read_hpd,
72	.update_hpd	= dw_hdmi_phy_update_hpd,
73};
74
75static int imx8mp_dw_hdmi_probe(struct platform_device *pdev)
76{
77	struct device *dev = &pdev->dev;
78	struct dw_hdmi_plat_data *plat_data;
79	struct imx8mp_hdmi *hdmi;
80
81	hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
82	if (!hdmi)
83		return -ENOMEM;
84
85	plat_data = &hdmi->plat_data;
86
87	hdmi->pixclk = devm_clk_get(dev, "pix");
88	if (IS_ERR(hdmi->pixclk))
89		return dev_err_probe(dev, PTR_ERR(hdmi->pixclk),
90				     "Unable to get pixel clock\n");
91
92	plat_data->mode_valid = imx8mp_hdmi_mode_valid;
93	plat_data->phy_ops = &imx8mp_hdmi_phy_ops;
94	plat_data->phy_name = "SAMSUNG HDMI TX PHY";
95	plat_data->priv_data = hdmi;
96	plat_data->phy_force_vendor = true;
97
98	hdmi->dw_hdmi = dw_hdmi_probe(pdev, plat_data);
99	if (IS_ERR(hdmi->dw_hdmi))
100		return PTR_ERR(hdmi->dw_hdmi);
101
102	platform_set_drvdata(pdev, hdmi);
103
104	return 0;
105}
106
107static void imx8mp_dw_hdmi_remove(struct platform_device *pdev)
108{
109	struct imx8mp_hdmi *hdmi = platform_get_drvdata(pdev);
110
111	dw_hdmi_remove(hdmi->dw_hdmi);
112}
113
114static int __maybe_unused imx8mp_dw_hdmi_pm_suspend(struct device *dev)
115{
116	return 0;
117}
118
119static int __maybe_unused imx8mp_dw_hdmi_pm_resume(struct device *dev)
120{
121	struct imx8mp_hdmi *hdmi = dev_get_drvdata(dev);
122
123	dw_hdmi_resume(hdmi->dw_hdmi);
124
125	return 0;
126}
127
128static const struct dev_pm_ops imx8mp_dw_hdmi_pm_ops = {
129	SET_SYSTEM_SLEEP_PM_OPS(imx8mp_dw_hdmi_pm_suspend,
130				imx8mp_dw_hdmi_pm_resume)
131};
132
133static const struct of_device_id imx8mp_dw_hdmi_of_table[] = {
134	{ .compatible = "fsl,imx8mp-hdmi-tx" },
135	{ /* Sentinel */ }
136};
137MODULE_DEVICE_TABLE(of, imx8mp_dw_hdmi_of_table);
138
139static struct platform_driver imx8mp_dw_hdmi_platform_driver = {
140	.probe		= imx8mp_dw_hdmi_probe,
141	.remove_new	= imx8mp_dw_hdmi_remove,
142	.driver		= {
143		.name	= "imx8mp-dw-hdmi-tx",
144		.of_match_table = imx8mp_dw_hdmi_of_table,
145		.pm = &imx8mp_dw_hdmi_pm_ops,
146	},
147};
148
149module_platform_driver(imx8mp_dw_hdmi_platform_driver);
150
151MODULE_DESCRIPTION("i.MX8MP HDMI encoder driver");
152MODULE_LICENSE("GPL");
153