1/*
2 * Copyright 2020 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __SMU_V13_0_5_PMFW_H__
25#define __SMU_V13_0_5_PMFW_H__
26
27#include "smu13_driver_if_v13_0_5.h"
28
29#pragma pack(push, 1)
30
31#define ENABLE_DEBUG_FEATURES
32
33// Firmware features
34// Feature Control Defines
35#define FEATURE_DATA_CALCULATION_BIT        0
36#define FEATURE_PPT_BIT                     1
37#define FEATURE_TDC_BIT                     2
38#define FEATURE_THERMAL_BIT                 3
39#define FEATURE_FIT_BIT                     4
40#define FEATURE_EDC_BIT                     5
41#define FEATURE_CSTATE_BOOST_BIT            6
42#define FEATURE_PROCHOT_BIT                 7
43#define FEATURE_CCLK_DPM_BIT                8
44#define FEATURE_FCLK_DPM_BIT                9
45#define FEATURE_LCLK_DPM_BIT                10
46#define FEATURE_PSI7_BIT                    11
47#define FEATURE_DLDO_BIT                    12
48#define FEATURE_SOCCLK_DEEP_SLEEP_BIT       13
49#define FEATURE_LCLK_DEEP_SLEEP_BIT         14
50#define FEATURE_SHUBCLK_DEEP_SLEEP_BIT      15
51#define FEATURE_DVO_BIT                     16
52#define FEATURE_CC6_BIT                     17
53#define FEATURE_PC6_BIT                     18
54#define FEATURE_DF_CSTATES_BIT              19
55#define FEATURE_CLOCK_GATING_BIT            20
56#define FEATURE_FAN_CONTROLLER_BIT          21
57#define FEATURE_CPPC_BIT                    22
58#define FEATURE_DLDO_DROPOUT_LIMITER_BIT    23
59#define FEATURE_CPPC_PREFERRED_CORES_BIT    24
60#define FEATURE_GMI_FOLDING_BIT             25
61#define FEATURE_GMI_DLWM_BIT                26
62#define FEATURE_XGMI_DLWM_BIT               27
63#define FEATURE_DF_LIGHT_CSTATE_BIT         28
64#define FEATURE_SMNCLK_DEEP_SLEEP_BIT       29
65#define FEATURE_PCIE_SPEED_CONTROLLER_BIT   30
66#define FEATURE_GFX_DPM_BIT             31
67#define FEATURE_DS_GFXCLK_BIT           32
68#define FEATURE_PCC_BIT                    33
69#define FEATURE_spare0_BIT                  34
70#define FEATURE_S0I3_BIT                35
71#define FEATURE_VCN_DPM_BIT             36
72#define FEATURE_DS_VCN_BIT              37
73#define FEATURE_MPDMA_TF_CLK_DEEP_SLEEP_BIT 38
74#define FEATURE_MPDMA_PM_CLK_DEEP_SLEEP_BIT 39
75#define FEATURE_VDDOFF_BIT              40
76#define FEATURE_DCFCLK_DPM_BIT          41
77#define FEATURE_DCFCLK_DEEP_SLEEP_BIT       42
78#define FEATURE_ATHUB_PG_BIT            43
79#define FEATURE_SOCCLK_DPM_BIT          44
80#define FEATURE_SHUBCLK_DPM_BIT         45
81#define FEATURE_MP0CLK_DPM_BIT          46
82#define FEATURE_MP0CLK_DEEP_SLEEP_BIT       47
83#define FEATURE_PERCCXPC6_BIT               48
84#define FEATURE_GFXOFF_BIT                  49
85#define NUM_FEATURES                    50
86
87typedef struct {
88  // MP1_EXT_SCRATCH0
89  uint32_t CurrLevel_ACP     : 4;
90  uint32_t CurrLevel_ISP     : 4;
91  uint32_t CurrLevel_VCN     : 4;
92  uint32_t CurrLevel_LCLK    : 4;
93  uint32_t CurrLevel_MP0CLK  : 4;
94  uint32_t CurrLevel_FCLK    : 4;
95  uint32_t CurrLevel_SOCCLK  : 4;
96  uint32_t CurrLevel_DCFCLK : 4;
97  // MP1_EXT_SCRATCH1
98  uint32_t TargLevel_ACP     : 4;
99  uint32_t TargLevel_ISP     : 4;
100  uint32_t TargLevel_VCN     : 4;
101  uint32_t TargLevel_LCLK    : 4;
102  uint32_t TargLevel_MP0CLK  : 4;
103  uint32_t TargLevel_FCLK    : 4;
104  uint32_t TargLevel_SOCCLK  : 4;
105  uint32_t TargLevel_DCFCLK : 4;
106  // MP1_EXT_SCRATCH2
107  uint32_t CurrLevel_SHUBCLK  : 4;
108  uint32_t TargLevel_SHUBCLK  : 4;
109  uint32_t InUlv              : 1;
110  uint32_t InS0i2             : 1;
111  uint32_t InWhisperMode      : 1;
112  uint32_t GfxOn              : 1;
113  uint32_t RsmuCalBusyDpmIndex: 8;
114  uint32_t DpmHandlerId       : 8;
115  uint32_t DpmTimerId         : 4;
116  // MP1_EXT_SCRATCH3
117  uint32_t ReadWriteSmnRegAddr: 32;
118  // MP1_EXT_SCRATCH4
119  uint32_t Reserved1;
120  // MP1_EXT_SCRATCH5
121  uint32_t FeatureStatus[NUM_FEATURES / 32];
122} FwStatus_t;
123
124#pragma pack(pop)
125
126#endif
127