1/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23#ifndef _SMU7_POWERTUNE_H
24#define _SMU7_POWERTUNE_H
25
26#define DIDT_SQ_CTRL0__UNUSED_0_MASK    0xfffc0000
27#define DIDT_SQ_CTRL0__UNUSED_0__SHIFT  0x12
28#define DIDT_TD_CTRL0__UNUSED_0_MASK    0xfffc0000
29#define DIDT_TD_CTRL0__UNUSED_0__SHIFT  0x12
30#define DIDT_TCP_CTRL0__UNUSED_0_MASK   0xfffc0000
31#define DIDT_TCP_CTRL0__UNUSED_0__SHIFT 0x12
32#define DIDT_SQ_TUNING_CTRL__UNUSED_0_MASK                 0xc0000000
33#define DIDT_SQ_TUNING_CTRL__UNUSED_0__SHIFT               0x0000001e
34#define DIDT_TD_TUNING_CTRL__UNUSED_0_MASK                 0xc0000000
35#define DIDT_TD_TUNING_CTRL__UNUSED_0__SHIFT               0x0000001e
36#define DIDT_TCP_TUNING_CTRL__UNUSED_0_MASK                0xc0000000
37#define DIDT_TCP_TUNING_CTRL__UNUSED_0__SHIFT              0x0000001e
38
39/* PowerContainment Features */
40#define POWERCONTAINMENT_FEATURE_DTE             0x00000001
41#define POWERCONTAINMENT_FEATURE_TDCLimit        0x00000002
42#define POWERCONTAINMENT_FEATURE_PkgPwrLimit     0x00000004
43
44#define ixGC_CAC_CNTL 0x0000
45#define ixDIDT_SQ_STALL_CTRL 0x0004
46#define ixDIDT_SQ_TUNING_CTRL 0x0005
47#define ixDIDT_TD_STALL_CTRL 0x0044
48#define ixDIDT_TD_TUNING_CTRL 0x0045
49#define ixDIDT_TCP_STALL_CTRL 0x0064
50#define ixDIDT_TCP_TUNING_CTRL 0x0065
51
52
53int smu7_enable_smc_cac(struct pp_hwmgr *hwmgr);
54int smu7_disable_smc_cac(struct pp_hwmgr *hwmgr);
55int smu7_enable_power_containment(struct pp_hwmgr *hwmgr);
56int smu7_disable_power_containment(struct pp_hwmgr *hwmgr);
57int smu7_set_power_limit(struct pp_hwmgr *hwmgr, uint32_t n);
58int smu7_power_control_set_level(struct pp_hwmgr *hwmgr);
59int smu7_enable_didt_config(struct pp_hwmgr *hwmgr);
60int smu7_disable_didt_config(struct pp_hwmgr *hwmgr);
61#endif  /* DGPU_POWERTUNE_H */
62
63