1/* 2 * SMU_7_1_2 Register documentation 3 * 4 * Copyright (C) 2014 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included 14 * in all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 20 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24#ifndef SMU_7_1_2_D_H 25#define SMU_7_1_2_D_H 26 27#define mmGCK_SMC_IND_INDEX 0x80 28#define mmGCK0_GCK_SMC_IND_INDEX 0x80 29#define mmGCK1_GCK_SMC_IND_INDEX 0x82 30#define mmGCK2_GCK_SMC_IND_INDEX 0x84 31#define mmGCK3_GCK_SMC_IND_INDEX 0x86 32#define mmGCK_SMC_IND_DATA 0x81 33#define mmGCK0_GCK_SMC_IND_DATA 0x81 34#define mmGCK1_GCK_SMC_IND_DATA 0x83 35#define mmGCK2_GCK_SMC_IND_DATA 0x85 36#define mmGCK3_GCK_SMC_IND_DATA 0x87 37#define ixCG_DCLK_CNTL 0xc050009c 38#define ixCG_DCLK_STATUS 0xc05000a0 39#define ixCG_VCLK_CNTL 0xc05000a4 40#define ixCG_VCLK_STATUS 0xc05000a8 41#define ixCG_ECLK_CNTL 0xc05000ac 42#define ixCG_ECLK_STATUS 0xc05000b0 43#define ixCG_ACLK_CNTL 0xc05000dc 44#define ixGCK_DFS_BYPASS_CNTL 0xc0500118 45#define ixCG_SPLL_FUNC_CNTL 0xc0500140 46#define ixCG_SPLL_FUNC_CNTL_2 0xc0500144 47#define ixCG_SPLL_FUNC_CNTL_3 0xc0500148 48#define ixCG_SPLL_FUNC_CNTL_4 0xc050014c 49#define ixCG_SPLL_FUNC_CNTL_5 0xc0500150 50#define ixCG_SPLL_FUNC_CNTL_6 0xc0500154 51#define ixCG_SPLL_FUNC_CNTL_7 0xc0500158 52#define ixCG_SPLL_STATUS 0xC050015C 53#define ixSPLL_CNTL_MODE 0xc0500160 54#define ixCG_SPLL_SPREAD_SPECTRUM 0xc0500164 55#define ixCG_SPLL_SPREAD_SPECTRUM_2 0xc0500168 56#define ixMPLL_BYPASSCLK_SEL 0xc050019c 57#define ixCG_CLKPIN_CNTL 0xc05001a0 58#define ixCG_CLKPIN_CNTL_2 0xc05001a4 59#define ixCG_CLKPIN_CNTL_DC 0xc0500204 60#define ixTHM_CLK_CNTL 0xc05001a8 61#define ixMISC_CLK_CTRL 0xc05001ac 62#define ixGCK_PLL_TEST_CNTL 0xc05001c0 63#define ixGCK_PLL_TEST_CNTL_2 0xc05001c4 64#define ixGCK_ADFS_CLK_BYPASS_CNTL1 0xc05001c8 65#define mmSMC_IND_INDEX 0x80 66#define mmSMC0_SMC_IND_INDEX 0x80 67#define mmSMC1_SMC_IND_INDEX 0x82 68#define mmSMC2_SMC_IND_INDEX 0x84 69#define mmSMC3_SMC_IND_INDEX 0x86 70#define mmSMC_IND_DATA 0x81 71#define mmSMC0_SMC_IND_DATA 0x81 72#define mmSMC1_SMC_IND_DATA 0x83 73#define mmSMC2_SMC_IND_DATA 0x85 74#define mmSMC3_SMC_IND_DATA 0x87 75#define mmSMC_IND_INDEX_0 0x80 76#define mmSMC_IND_DATA_0 0x81 77#define mmSMC_IND_INDEX_1 0x82 78#define mmSMC_IND_DATA_1 0x83 79#define mmSMC_IND_INDEX_2 0x84 80#define mmSMC_IND_DATA_2 0x85 81#define mmSMC_IND_INDEX_3 0x86 82#define mmSMC_IND_DATA_3 0x87 83#define mmSMC_IND_INDEX_4 0x88 84#define mmSMC_IND_DATA_4 0x89 85#define mmSMC_IND_INDEX_5 0x8a 86#define mmSMC_IND_DATA_5 0x8b 87#define mmSMC_IND_INDEX_6 0x8c 88#define mmSMC_IND_DATA_6 0x8d 89#define mmSMC_IND_INDEX_7 0x8e 90#define mmSMC_IND_DATA_7 0x8f 91#define mmSMC_IND_INDEX_11 0x1AC 92#define mmSMC_IND_DATA_11 0x1AD 93#define mmSMC_IND_ACCESS_CNTL 0x92 94#define mmSMC_MESSAGE_0 0x94 95#define mmSMC_RESP_0 0x95 96#define mmSMC_MESSAGE_1 0x96 97#define mmSMC_RESP_1 0x97 98#define mmSMC_MESSAGE_2 0x98 99#define mmSMC_RESP_2 0x99 100#define mmSMC_MESSAGE_3 0x9a 101#define mmSMC_RESP_3 0x9b 102#define mmSMC_MESSAGE_4 0x9c 103#define mmSMC_RESP_4 0x9d 104#define mmSMC_MESSAGE_5 0x9e 105#define mmSMC_RESP_5 0x9f 106#define mmSMC_MESSAGE_6 0xa0 107#define mmSMC_RESP_6 0xa1 108#define mmSMC_MESSAGE_7 0xa2 109#define mmSMC_RESP_7 0xa3 110#define mmSMC_MSG_ARG_0 0xa4 111#define mmSMC_MSG_ARG_1 0xa5 112#define mmSMC_MSG_ARG_2 0xa6 113#define mmSMC_MSG_ARG_3 0xa7 114#define mmSMC_MSG_ARG_4 0xa8 115#define mmSMC_MSG_ARG_5 0xa9 116#define mmSMC_MSG_ARG_6 0xaa 117#define mmSMC_MSG_ARG_7 0xab 118#define mmSMC_MESSAGE_8 0xb5 119#define mmSMC_RESP_8 0xb6 120#define mmSMC_MESSAGE_9 0xb7 121#define mmSMC_RESP_9 0xb8 122#define mmSMC_MESSAGE_10 0xb9 123#define mmSMC_RESP_10 0xba 124#define mmSMC_MESSAGE_11 0xbb 125#define mmSMC_RESP_11 0xbc 126#define mmSMC_MSG_ARG_8 0xbd 127#define mmSMC_MSG_ARG_9 0xbe 128#define mmSMC_MSG_ARG_10 0xbf 129#define mmSMC_MSG_ARG_11 0x93 130#define ixSMC_SYSCON_RESET_CNTL 0x80000000 131#define ixSMC_SYSCON_CLOCK_CNTL_0 0x80000004 132#define ixSMC_SYSCON_CLOCK_CNTL_1 0x80000008 133#define ixSMC_SYSCON_CLOCK_CNTL_2 0x8000000c 134#define ixSMC_SYSCON_MISC_CNTL 0x80000010 135#define ixSMC_SYSCON_MSG_ARG_0 0x80000068 136#define ixSMC_PC_C 0x80000370 137#define ixSMC_SCRATCH9 0x80000424 138#define mmGPIOPAD_SW_INT_STAT 0x180 139#define mmGPIOPAD_STRENGTH 0x181 140#define mmGPIOPAD_MASK 0x182 141#define mmGPIOPAD_A 0x183 142#define mmGPIOPAD_EN 0x184 143#define mmGPIOPAD_Y 0x185 144#define mmGPIOPAD_PINSTRAPS 0x186 145#define mmGPIOPAD_INT_STAT_EN 0x187 146#define mmGPIOPAD_INT_STAT 0x188 147#define mmGPIOPAD_INT_STAT_AK 0x189 148#define mmGPIOPAD_INT_EN 0x18a 149#define mmGPIOPAD_INT_TYPE 0x18b 150#define mmGPIOPAD_INT_POLARITY 0x18c 151#define mmGPIOPAD_EXTERN_TRIG_CNTL 0x18d 152#define mmGPIOPAD_RCVR_SEL 0x191 153#define mmGPIOPAD_PU_EN 0x192 154#define mmGPIOPAD_PD_EN 0x193 155#define mmCG_FPS_CNT 0x1b6 156#define mmSMU_IND_INDEX_0 0x1a6 157#define mmSMU_IND_DATA_0 0x1a7 158#define mmSMU_IND_INDEX_1 0x1a8 159#define mmSMU_IND_DATA_1 0x1a9 160#define mmSMU_IND_INDEX_2 0x1aa 161#define mmSMU_IND_DATA_2 0x1ab 162#define mmSMU_IND_INDEX_3 0x1ac 163#define mmSMU_IND_DATA_3 0x1ad 164#define mmSMU_IND_INDEX_4 0x1ae 165#define mmSMU_IND_DATA_4 0x1af 166#define mmSMU_IND_INDEX_5 0x1b0 167#define mmSMU_IND_DATA_5 0x1b1 168#define mmSMU_IND_INDEX_6 0x1b2 169#define mmSMU_IND_DATA_6 0x1b3 170#define mmSMU_IND_INDEX_7 0x1b4 171#define mmSMU_IND_DATA_7 0x1b5 172#define mmSMU_SMC_IND_INDEX 0x80 173#define mmSMU0_SMU_SMC_IND_INDEX 0x80 174#define mmSMU1_SMU_SMC_IND_INDEX 0x82 175#define mmSMU2_SMU_SMC_IND_INDEX 0x84 176#define mmSMU3_SMU_SMC_IND_INDEX 0x86 177#define mmSMU_SMC_IND_DATA 0x81 178#define mmSMU0_SMU_SMC_IND_DATA 0x81 179#define mmSMU1_SMU_SMC_IND_DATA 0x83 180#define mmSMU2_SMU_SMC_IND_DATA 0x85 181#define mmSMU3_SMU_SMC_IND_DATA 0x87 182#define ixRCU_UC_EVENTS 0xc0000004 183#define ixRCU_MISC_CTRL 0xc0000010 184#define ixRCU_VIRT_RESET_REQ 0xc0000024 185#define ixCC_RCU_FUSES 0xc00c0000 186#define ixCC_SMU_MISC_FUSES 0xc00c0004 187#define ixCC_SCLK_VID_FUSES 0xc00c0008 188#define ixCC_GIO_IOCCFG_FUSES 0xc00c000c 189#define ixCC_GIO_IOC_FUSES 0xc00c0010 190#define ixCC_SMU_TST_EFUSE1_MISC 0xc00c001c 191#define ixCC_TST_ID_STRAPS 0xc00c0020 192#define ixCC_FCTRL_FUSES 0xc00c0024 193#define ixCC_HARVEST_FUSES 0xc00c0028 194#define ixSMU_MAIN_PLL_OP_FREQ 0xe0003020 195#define ixSMU_STATUS 0xe0003088 196#define ixSMU_FIRMWARE 0xe00030a4 197#define ixSMU_INPUT_DATA 0xe00030b8 198#define ixSMU_EFUSE_0 0xc0100000 199#define ixFIRMWARE_FLAGS 0x3f800 200#define ixTDC_STATUS 0x3f804 201#define ixTDC_MV_AVERAGE 0x3f808 202#define ixTDC_VRM_LIMIT 0x3f80c 203#define ixFEATURE_STATUS 0x3f810 204#define ixENTITY_TEMPERATURES_1 0x3f814 205#define ixDPM_TABLE_1 0x3f000 206#define ixDPM_TABLE_2 0x3f004 207#define ixDPM_TABLE_3 0x3f008 208#define ixDPM_TABLE_4 0x3f00c 209#define ixDPM_TABLE_5 0x3f010 210#define ixDPM_TABLE_6 0x3f014 211#define ixDPM_TABLE_7 0x3f018 212#define ixDPM_TABLE_8 0x3f01c 213#define ixDPM_TABLE_9 0x3f020 214#define ixDPM_TABLE_10 0x3f024 215#define ixDPM_TABLE_11 0x3f028 216#define ixDPM_TABLE_12 0x3f02c 217#define ixDPM_TABLE_13 0x3f030 218#define ixDPM_TABLE_14 0x3f034 219#define ixDPM_TABLE_15 0x3f038 220#define ixDPM_TABLE_16 0x3f03c 221#define ixDPM_TABLE_17 0x3f040 222#define ixDPM_TABLE_18 0x3f044 223#define ixDPM_TABLE_19 0x3f048 224#define ixDPM_TABLE_20 0x3f04c 225#define ixDPM_TABLE_21 0x3f050 226#define ixDPM_TABLE_22 0x3f054 227#define ixDPM_TABLE_23 0x3f058 228#define ixDPM_TABLE_24 0x3f05c 229#define ixDPM_TABLE_25 0x3f060 230#define ixDPM_TABLE_26 0x3f064 231#define ixDPM_TABLE_27 0x3f068 232#define ixDPM_TABLE_28 0x3f06c 233#define ixDPM_TABLE_29 0x3f070 234#define ixDPM_TABLE_30 0x3f074 235#define ixDPM_TABLE_31 0x3f078 236#define ixDPM_TABLE_32 0x3f07c 237#define ixDPM_TABLE_33 0x3f080 238#define ixDPM_TABLE_34 0x3f084 239#define ixDPM_TABLE_35 0x3f088 240#define ixDPM_TABLE_36 0x3f08c 241#define ixDPM_TABLE_37 0x3f090 242#define ixDPM_TABLE_38 0x3f094 243#define ixDPM_TABLE_39 0x3f098 244#define ixDPM_TABLE_40 0x3f09c 245#define ixDPM_TABLE_41 0x3f0a0 246#define ixDPM_TABLE_42 0x3f0a4 247#define ixDPM_TABLE_43 0x3f0a8 248#define ixDPM_TABLE_44 0x3f0ac 249#define ixDPM_TABLE_45 0x3f0b0 250#define ixDPM_TABLE_46 0x3f0b4 251#define ixDPM_TABLE_47 0x3f0b8 252#define ixDPM_TABLE_48 0x3f0bc 253#define ixDPM_TABLE_49 0x3f0c0 254#define ixDPM_TABLE_50 0x3f0c4 255#define ixDPM_TABLE_51 0x3f0c8 256#define ixDPM_TABLE_52 0x3f0cc 257#define ixDPM_TABLE_53 0x3f0d0 258#define ixDPM_TABLE_54 0x3f0d4 259#define ixDPM_TABLE_55 0x3f0d8 260#define ixDPM_TABLE_56 0x3f0dc 261#define ixDPM_TABLE_57 0x3f0e0 262#define ixDPM_TABLE_58 0x3f0e4 263#define ixDPM_TABLE_59 0x3f0e8 264#define ixDPM_TABLE_60 0x3f0ec 265#define ixDPM_TABLE_61 0x3f0f0 266#define ixDPM_TABLE_62 0x3f0f4 267#define ixDPM_TABLE_63 0x3f0f8 268#define ixDPM_TABLE_64 0x3f0fc 269#define ixDPM_TABLE_65 0x3f100 270#define ixDPM_TABLE_66 0x3f104 271#define ixDPM_TABLE_67 0x3f108 272#define ixDPM_TABLE_68 0x3f10c 273#define ixDPM_TABLE_69 0x3f110 274#define ixDPM_TABLE_70 0x3f114 275#define ixDPM_TABLE_71 0x3f118 276#define ixDPM_TABLE_72 0x3f11c 277#define ixDPM_TABLE_73 0x3f120 278#define ixDPM_TABLE_74 0x3f124 279#define ixDPM_TABLE_75 0x3f128 280#define ixDPM_TABLE_76 0x3f12c 281#define ixDPM_TABLE_77 0x3f130 282#define ixDPM_TABLE_78 0x3f134 283#define ixDPM_TABLE_79 0x3f138 284#define ixDPM_TABLE_80 0x3f13c 285#define ixDPM_TABLE_81 0x3f140 286#define ixDPM_TABLE_82 0x3f144 287#define ixDPM_TABLE_83 0x3f148 288#define ixDPM_TABLE_84 0x3f14c 289#define ixDPM_TABLE_85 0x3f150 290#define ixDPM_TABLE_86 0x3f154 291#define ixDPM_TABLE_87 0x3f158 292#define ixDPM_TABLE_88 0x3f15c 293#define ixDPM_TABLE_89 0x3f160 294#define ixDPM_TABLE_90 0x3f164 295#define ixDPM_TABLE_91 0x3f168 296#define ixDPM_TABLE_92 0x3f16c 297#define ixDPM_TABLE_93 0x3f170 298#define ixDPM_TABLE_94 0x3f174 299#define ixDPM_TABLE_95 0x3f178 300#define ixDPM_TABLE_96 0x3f17c 301#define ixDPM_TABLE_97 0x3f180 302#define ixDPM_TABLE_98 0x3f184 303#define ixDPM_TABLE_99 0x3f188 304#define ixDPM_TABLE_100 0x3f18c 305#define ixDPM_TABLE_101 0x3f190 306#define ixDPM_TABLE_102 0x3f194 307#define ixDPM_TABLE_103 0x3f198 308#define ixDPM_TABLE_104 0x3f19c 309#define ixDPM_TABLE_105 0x3f1a0 310#define ixDPM_TABLE_106 0x3f1a4 311#define ixDPM_TABLE_107 0x3f1a8 312#define ixDPM_TABLE_108 0x3f1ac 313#define ixDPM_TABLE_109 0x3f1b0 314#define ixDPM_TABLE_110 0x3f1b4 315#define ixDPM_TABLE_111 0x3f1b8 316#define ixDPM_TABLE_112 0x3f1bc 317#define ixDPM_TABLE_113 0x3f1c0 318#define ixDPM_TABLE_114 0x3f1c4 319#define ixDPM_TABLE_115 0x3f1c8 320#define ixDPM_TABLE_116 0x3f1cc 321#define ixDPM_TABLE_117 0x3f1d0 322#define ixDPM_TABLE_118 0x3f1d4 323#define ixDPM_TABLE_119 0x3f1d8 324#define ixDPM_TABLE_120 0x3f1dc 325#define ixDPM_TABLE_121 0x3f1e0 326#define ixDPM_TABLE_122 0x3f1e4 327#define ixDPM_TABLE_123 0x3f1e8 328#define ixDPM_TABLE_124 0x3f1ec 329#define ixDPM_TABLE_125 0x3f1f0 330#define ixDPM_TABLE_126 0x3f1f4 331#define ixDPM_TABLE_127 0x3f1f8 332#define ixDPM_TABLE_128 0x3f1fc 333#define ixDPM_TABLE_129 0x3f200 334#define ixDPM_TABLE_130 0x3f204 335#define ixDPM_TABLE_131 0x3f208 336#define ixDPM_TABLE_132 0x3f20c 337#define ixDPM_TABLE_133 0x3f210 338#define ixDPM_TABLE_134 0x3f214 339#define ixDPM_TABLE_135 0x3f218 340#define ixDPM_TABLE_136 0x3f21c 341#define ixDPM_TABLE_137 0x3f220 342#define ixDPM_TABLE_138 0x3f224 343#define ixDPM_TABLE_139 0x3f228 344#define ixDPM_TABLE_140 0x3f22c 345#define ixDPM_TABLE_141 0x3f230 346#define ixDPM_TABLE_142 0x3f234 347#define ixDPM_TABLE_143 0x3f238 348#define ixDPM_TABLE_144 0x3f23c 349#define ixDPM_TABLE_145 0x3f240 350#define ixDPM_TABLE_146 0x3f244 351#define ixDPM_TABLE_147 0x3f248 352#define ixDPM_TABLE_148 0x3f24c 353#define ixDPM_TABLE_149 0x3f250 354#define ixDPM_TABLE_150 0x3f254 355#define ixDPM_TABLE_151 0x3f258 356#define ixDPM_TABLE_152 0x3f25c 357#define ixDPM_TABLE_153 0x3f260 358#define ixDPM_TABLE_154 0x3f264 359#define ixDPM_TABLE_155 0x3f268 360#define ixDPM_TABLE_156 0x3f26c 361#define ixDPM_TABLE_157 0x3f270 362#define ixDPM_TABLE_158 0x3f274 363#define ixDPM_TABLE_159 0x3f278 364#define ixDPM_TABLE_160 0x3f27c 365#define ixDPM_TABLE_161 0x3f280 366#define ixDPM_TABLE_162 0x3f284 367#define ixDPM_TABLE_163 0x3f288 368#define ixDPM_TABLE_164 0x3f28c 369#define ixDPM_TABLE_165 0x3f290 370#define ixDPM_TABLE_166 0x3f294 371#define ixDPM_TABLE_167 0x3f298 372#define ixDPM_TABLE_168 0x3f29c 373#define ixDPM_TABLE_169 0x3f2a0 374#define ixDPM_TABLE_170 0x3f2a4 375#define ixDPM_TABLE_171 0x3f2a8 376#define ixDPM_TABLE_172 0x3f2ac 377#define ixDPM_TABLE_173 0x3f2b0 378#define ixDPM_TABLE_174 0x3f2b4 379#define ixDPM_TABLE_175 0x3f2b8 380#define ixDPM_TABLE_176 0x3f2bc 381#define ixDPM_TABLE_177 0x3f2c0 382#define ixDPM_TABLE_178 0x3f2c4 383#define ixDPM_TABLE_179 0x3f2c8 384#define ixDPM_TABLE_180 0x3f2cc 385#define ixDPM_TABLE_181 0x3f2d0 386#define ixDPM_TABLE_182 0x3f2d4 387#define ixDPM_TABLE_183 0x3f2d8 388#define ixDPM_TABLE_184 0x3f2dc 389#define ixDPM_TABLE_185 0x3f2e0 390#define ixDPM_TABLE_186 0x3f2e4 391#define ixDPM_TABLE_187 0x3f2e8 392#define ixDPM_TABLE_188 0x3f2ec 393#define ixDPM_TABLE_189 0x3f2f0 394#define ixDPM_TABLE_190 0x3f2f4 395#define ixDPM_TABLE_191 0x3f2f8 396#define ixDPM_TABLE_192 0x3f2fc 397#define ixDPM_TABLE_193 0x3f300 398#define ixDPM_TABLE_194 0x3f304 399#define ixDPM_TABLE_195 0x3f308 400#define ixDPM_TABLE_196 0x3f30c 401#define ixDPM_TABLE_197 0x3f310 402#define ixDPM_TABLE_198 0x3f314 403#define ixDPM_TABLE_199 0x3f318 404#define ixDPM_TABLE_200 0x3f31c 405#define ixDPM_TABLE_201 0x3f320 406#define ixDPM_TABLE_202 0x3f324 407#define ixDPM_TABLE_203 0x3f328 408#define ixDPM_TABLE_204 0x3f32c 409#define ixDPM_TABLE_205 0x3f330 410#define ixDPM_TABLE_206 0x3f334 411#define ixDPM_TABLE_207 0x3f338 412#define ixDPM_TABLE_208 0x3f33c 413#define ixDPM_TABLE_209 0x3f340 414#define ixDPM_TABLE_210 0x3f344 415#define ixDPM_TABLE_211 0x3f348 416#define ixDPM_TABLE_212 0x3f34c 417#define ixDPM_TABLE_213 0x3f350 418#define ixDPM_TABLE_214 0x3f354 419#define ixDPM_TABLE_215 0x3f358 420#define ixDPM_TABLE_216 0x3f35c 421#define ixDPM_TABLE_217 0x3f360 422#define ixDPM_TABLE_218 0x3f364 423#define ixDPM_TABLE_219 0x3f368 424#define ixDPM_TABLE_220 0x3f36c 425#define ixDPM_TABLE_221 0x3f370 426#define ixDPM_TABLE_222 0x3f374 427#define ixDPM_TABLE_223 0x3f378 428#define ixDPM_TABLE_224 0x3f37c 429#define ixDPM_TABLE_225 0x3f380 430#define ixDPM_TABLE_226 0x3f384 431#define ixDPM_TABLE_227 0x3f388 432#define ixDPM_TABLE_228 0x3f38c 433#define ixDPM_TABLE_229 0x3f390 434#define ixDPM_TABLE_230 0x3f394 435#define ixDPM_TABLE_231 0x3f398 436#define ixDPM_TABLE_232 0x3f39c 437#define ixDPM_TABLE_233 0x3f3a0 438#define ixDPM_TABLE_234 0x3f3a4 439#define ixDPM_TABLE_235 0x3f3a8 440#define ixDPM_TABLE_236 0x3f3ac 441#define ixDPM_TABLE_237 0x3f3b0 442#define ixDPM_TABLE_238 0x3f3b4 443#define ixDPM_TABLE_239 0x3f3b8 444#define ixDPM_TABLE_240 0x3f3bc 445#define ixDPM_TABLE_241 0x3f3c0 446#define ixDPM_TABLE_242 0x3f3c4 447#define ixDPM_TABLE_243 0x3f3c8 448#define ixDPM_TABLE_244 0x3f3cc 449#define ixDPM_TABLE_245 0x3f3d0 450#define ixDPM_TABLE_246 0x3f3d4 451#define ixDPM_TABLE_247 0x3f3d8 452#define ixDPM_TABLE_248 0x3f3dc 453#define ixDPM_TABLE_249 0x3f3e0 454#define ixDPM_TABLE_250 0x3f3e4 455#define ixDPM_TABLE_251 0x3f3e8 456#define ixDPM_TABLE_252 0x3f3ec 457#define ixDPM_TABLE_253 0x3f3f0 458#define ixDPM_TABLE_254 0x3f3f4 459#define ixDPM_TABLE_255 0x3f3f8 460#define ixDPM_TABLE_256 0x3f3fc 461#define ixDPM_TABLE_257 0x3f400 462#define ixDPM_TABLE_258 0x3f404 463#define ixDPM_TABLE_259 0x3f408 464#define ixDPM_TABLE_260 0x3f40c 465#define ixDPM_TABLE_261 0x3f410 466#define ixDPM_TABLE_262 0x3f414 467#define ixDPM_TABLE_263 0x3f418 468#define ixDPM_TABLE_264 0x3f41c 469#define ixDPM_TABLE_265 0x3f420 470#define ixDPM_TABLE_266 0x3f424 471#define ixDPM_TABLE_267 0x3f428 472#define ixDPM_TABLE_268 0x3f42c 473#define ixDPM_TABLE_269 0x3f430 474#define ixDPM_TABLE_270 0x3f434 475#define ixDPM_TABLE_271 0x3f438 476#define ixDPM_TABLE_272 0x3f43c 477#define ixDPM_TABLE_273 0x3f440 478#define ixDPM_TABLE_274 0x3f444 479#define ixDPM_TABLE_275 0x3f448 480#define ixDPM_TABLE_276 0x3f44c 481#define ixDPM_TABLE_277 0x3f450 482#define ixDPM_TABLE_278 0x3f454 483#define ixDPM_TABLE_279 0x3f458 484#define ixDPM_TABLE_280 0x3f45c 485#define ixDPM_TABLE_281 0x3f460 486#define ixDPM_TABLE_282 0x3f464 487#define ixDPM_TABLE_283 0x3f468 488#define ixDPM_TABLE_284 0x3f46c 489#define ixDPM_TABLE_285 0x3f470 490#define ixDPM_TABLE_286 0x3f474 491#define ixDPM_TABLE_287 0x3f478 492#define ixDPM_TABLE_288 0x3f47c 493#define ixDPM_TABLE_289 0x3f480 494#define ixDPM_TABLE_290 0x3f484 495#define ixDPM_TABLE_291 0x3f488 496#define ixDPM_TABLE_292 0x3f48c 497#define ixDPM_TABLE_293 0x3f490 498#define ixDPM_TABLE_294 0x3f494 499#define ixDPM_TABLE_295 0x3f498 500#define ixDPM_TABLE_296 0x3f49c 501#define ixDPM_TABLE_297 0x3f4a0 502#define ixDPM_TABLE_298 0x3f4a4 503#define ixDPM_TABLE_299 0x3f4a8 504#define ixDPM_TABLE_300 0x3f4ac 505#define ixDPM_TABLE_301 0x3f4b0 506#define ixDPM_TABLE_302 0x3f4b4 507#define ixDPM_TABLE_303 0x3f4b8 508#define ixDPM_TABLE_304 0x3f4bc 509#define ixDPM_TABLE_305 0x3f4c0 510#define ixDPM_TABLE_306 0x3f4c4 511#define ixDPM_TABLE_307 0x3f4c8 512#define ixDPM_TABLE_308 0x3f4cc 513#define ixDPM_TABLE_309 0x3f4d0 514#define ixDPM_TABLE_310 0x3f4d4 515#define ixDPM_TABLE_311 0x3f4d8 516#define ixDPM_TABLE_312 0x3f4dc 517#define ixDPM_TABLE_313 0x3f4e0 518#define ixDPM_TABLE_314 0x3f4e4 519#define ixDPM_TABLE_315 0x3f4e8 520#define ixDPM_TABLE_316 0x3f4ec 521#define ixDPM_TABLE_317 0x3f4f0 522#define ixDPM_TABLE_318 0x3f4f4 523#define ixDPM_TABLE_319 0x3f4f8 524#define ixDPM_TABLE_320 0x3f4fc 525#define ixDPM_TABLE_321 0x3f500 526#define ixDPM_TABLE_322 0x3f504 527#define ixDPM_TABLE_323 0x3f508 528#define ixDPM_TABLE_324 0x3f50c 529#define ixDPM_TABLE_325 0x3f510 530#define ixDPM_TABLE_326 0x3f514 531#define ixDPM_TABLE_327 0x3f518 532#define ixDPM_TABLE_328 0x3f51c 533#define ixDPM_TABLE_329 0x3f520 534#define ixDPM_TABLE_330 0x3f524 535#define ixDPM_TABLE_331 0x3f528 536#define ixDPM_TABLE_332 0x3f52c 537#define ixDPM_TABLE_333 0x3f530 538#define ixDPM_TABLE_334 0x3f534 539#define ixDPM_TABLE_335 0x3f538 540#define ixDPM_TABLE_336 0x3f53c 541#define ixDPM_TABLE_337 0x3f540 542#define ixDPM_TABLE_338 0x3f544 543#define ixDPM_TABLE_339 0x3f548 544#define ixDPM_TABLE_340 0x3f54c 545#define ixDPM_TABLE_341 0x3f550 546#define ixDPM_TABLE_342 0x3f554 547#define ixDPM_TABLE_343 0x3f558 548#define ixDPM_TABLE_344 0x3f55c 549#define ixDPM_TABLE_345 0x3f560 550#define ixDPM_TABLE_346 0x3f564 551#define ixDPM_TABLE_347 0x3f568 552#define ixDPM_TABLE_348 0x3f56c 553#define ixDPM_TABLE_349 0x3f570 554#define ixDPM_TABLE_350 0x3f574 555#define ixDPM_TABLE_351 0x3f578 556#define ixDPM_TABLE_352 0x3f57c 557#define ixDPM_TABLE_353 0x3f580 558#define ixDPM_TABLE_354 0x3f584 559#define ixDPM_TABLE_355 0x3f588 560#define ixDPM_TABLE_356 0x3f58c 561#define ixDPM_TABLE_357 0x3f590 562#define ixDPM_TABLE_358 0x3f594 563#define ixDPM_TABLE_359 0x3f598 564#define ixDPM_TABLE_360 0x3f59c 565#define ixDPM_TABLE_361 0x3f5a0 566#define ixDPM_TABLE_362 0x3f5a4 567#define ixDPM_TABLE_363 0x3f5a8 568#define ixDPM_TABLE_364 0x3f5ac 569#define ixDPM_TABLE_365 0x3f5b0 570#define ixDPM_TABLE_366 0x3f5b4 571#define ixDPM_TABLE_367 0x3f5b8 572#define ixDPM_TABLE_368 0x3f5bc 573#define ixDPM_TABLE_369 0x3f5c0 574#define ixDPM_TABLE_370 0x3f5c4 575#define ixDPM_TABLE_371 0x3f5c8 576#define ixDPM_TABLE_372 0x3f5cc 577#define ixDPM_TABLE_373 0x3f5d0 578#define ixDPM_TABLE_374 0x3f5d4 579#define ixDPM_TABLE_375 0x3f5d8 580#define ixDPM_TABLE_376 0x3f5dc 581#define ixDPM_TABLE_377 0x3f5e0 582#define ixDPM_TABLE_378 0x3f5e4 583#define ixDPM_TABLE_379 0x3f5e8 584#define ixDPM_TABLE_380 0x3f5ec 585#define ixDPM_TABLE_381 0x3f5f0 586#define ixDPM_TABLE_382 0x3f5f4 587#define ixDPM_TABLE_383 0x3f5f8 588#define ixDPM_TABLE_384 0x3f5fc 589#define ixDPM_TABLE_385 0x3f600 590#define ixDPM_TABLE_386 0x3f604 591#define ixDPM_TABLE_387 0x3f608 592#define ixDPM_TABLE_388 0x3f60c 593#define ixDPM_TABLE_389 0x3f610 594#define ixDPM_TABLE_390 0x3f614 595#define ixDPM_TABLE_391 0x3f618 596#define ixDPM_TABLE_392 0x3f61c 597#define ixDPM_TABLE_393 0x3f620 598#define ixDPM_TABLE_394 0x3f624 599#define ixDPM_TABLE_395 0x3f628 600#define ixDPM_TABLE_396 0x3f62c 601#define ixDPM_TABLE_397 0x3f630 602#define ixDPM_TABLE_398 0x3f634 603#define ixDPM_TABLE_399 0x3f638 604#define ixDPM_TABLE_400 0x3f63c 605#define ixDPM_TABLE_401 0x3f640 606#define ixDPM_TABLE_402 0x3f644 607#define ixDPM_TABLE_403 0x3f648 608#define ixDPM_TABLE_404 0x3f64c 609#define ixDPM_TABLE_405 0x3f650 610#define ixDPM_TABLE_406 0x3f654 611#define ixDPM_TABLE_407 0x3f658 612#define ixDPM_TABLE_408 0x3f65c 613#define ixDPM_TABLE_409 0x3f660 614#define ixDPM_TABLE_410 0x3f664 615#define ixDPM_TABLE_411 0x3f668 616#define ixDPM_TABLE_412 0x3f66c 617#define ixDPM_TABLE_413 0x3f670 618#define ixDPM_TABLE_414 0x3f674 619#define ixDPM_TABLE_415 0x3f678 620#define ixDPM_TABLE_416 0x3f67c 621#define ixDPM_TABLE_417 0x3f680 622#define ixDPM_TABLE_418 0x3f684 623#define ixDPM_TABLE_419 0x3f688 624#define ixDPM_TABLE_420 0x3f68c 625#define ixDPM_TABLE_421 0x3f690 626#define ixDPM_TABLE_422 0x3f694 627#define ixDPM_TABLE_423 0x3f698 628#define ixDPM_TABLE_424 0x3f69c 629#define ixDPM_TABLE_425 0x3f6a0 630#define ixDPM_TABLE_426 0x3f6a4 631#define ixDPM_TABLE_427 0x3f6a8 632#define ixDPM_TABLE_428 0x3f6ac 633#define ixDPM_TABLE_429 0x3f6b0 634#define ixDPM_TABLE_430 0x3f6b4 635#define ixDPM_TABLE_431 0x3f6b8 636#define ixDPM_TABLE_432 0x3f6bc 637#define ixDPM_TABLE_433 0x3f6c0 638#define ixDPM_TABLE_434 0x3f6c4 639#define ixDPM_TABLE_435 0x3f6c8 640#define ixDPM_TABLE_436 0x3f6cc 641#define ixDPM_TABLE_437 0x3f6d0 642#define ixDPM_TABLE_438 0x3f6d4 643#define ixDPM_TABLE_439 0x3f6d8 644#define ixDPM_TABLE_440 0x3f6dc 645#define ixDPM_TABLE_441 0x3f6e0 646#define ixDPM_TABLE_442 0x3f6e4 647#define ixDPM_TABLE_443 0x3f6e8 648#define ixDPM_TABLE_444 0x3f6ec 649#define ixDPM_TABLE_445 0x3f6f0 650#define ixDPM_TABLE_446 0x3f6f4 651#define ixDPM_TABLE_447 0x3f6f8 652#define ixDPM_TABLE_448 0x3f6fc 653#define ixDPM_TABLE_449 0x3f700 654#define ixDPM_TABLE_450 0x3f704 655#define ixDPM_TABLE_451 0x3f708 656#define ixDPM_TABLE_452 0x3f70c 657#define ixDPM_TABLE_453 0x3f710 658#define ixDPM_TABLE_454 0x3f714 659#define ixDPM_TABLE_455 0x3f718 660#define ixDPM_TABLE_456 0x3f71c 661#define ixDPM_TABLE_457 0x3f720 662#define ixDPM_TABLE_458 0x3f724 663#define ixDPM_TABLE_459 0x3f728 664#define ixDPM_TABLE_460 0x3f72c 665#define ixDPM_TABLE_461 0x3f730 666#define ixDPM_TABLE_462 0x3f734 667#define ixDPM_TABLE_463 0x3f738 668#define ixDPM_TABLE_464 0x3f73c 669#define ixDPM_TABLE_465 0x3f740 670#define ixDPM_TABLE_466 0x3f744 671#define ixDPM_TABLE_467 0x3f748 672#define ixDPM_TABLE_468 0x3f74c 673#define ixDPM_TABLE_469 0x3f750 674#define ixDPM_TABLE_470 0x3f754 675#define ixDPM_TABLE_471 0x3f758 676#define ixDPM_TABLE_472 0x3f75c 677#define ixDPM_TABLE_473 0x3f760 678#define ixDPM_TABLE_474 0x3f764 679#define ixDPM_TABLE_475 0x3f768 680#define ixDPM_TABLE_476 0x3f76c 681#define ixDPM_TABLE_477 0x3f770 682#define ixDPM_TABLE_478 0x3f774 683#define ixDPM_TABLE_479 0x3f778 684#define ixDPM_TABLE_480 0x3f77c 685#define ixDPM_TABLE_481 0x3f780 686#define ixDPM_TABLE_482 0x3f784 687#define ixDPM_TABLE_483 0x3f788 688#define ixDPM_TABLE_484 0x3f78c 689#define ixDPM_TABLE_485 0x3f790 690#define ixDPM_TABLE_486 0x3f794 691#define ixDPM_TABLE_487 0x3f798 692#define ixDPM_TABLE_488 0x3f79c 693#define ixDPM_TABLE_489 0x3f7a0 694#define ixDPM_TABLE_490 0x3f7a4 695#define ixMCARB_DRAM_TIMING_TABLE_1 0x3f900 696#define ixMCARB_DRAM_TIMING_TABLE_2 0x3f904 697#define ixMCARB_DRAM_TIMING_TABLE_3 0x3f908 698#define ixMCARB_DRAM_TIMING_TABLE_4 0x3f90c 699#define ixMCARB_DRAM_TIMING_TABLE_5 0x3f910 700#define ixMCARB_DRAM_TIMING_TABLE_6 0x3f914 701#define ixMCARB_DRAM_TIMING_TABLE_7 0x3f918 702#define ixMCARB_DRAM_TIMING_TABLE_8 0x3f91c 703#define ixMCARB_DRAM_TIMING_TABLE_9 0x3f920 704#define ixMCARB_DRAM_TIMING_TABLE_10 0x3f924 705#define ixMCARB_DRAM_TIMING_TABLE_11 0x3f928 706#define ixMCARB_DRAM_TIMING_TABLE_12 0x3f92c 707#define ixMCARB_DRAM_TIMING_TABLE_13 0x3f930 708#define ixMCARB_DRAM_TIMING_TABLE_14 0x3f934 709#define ixMCARB_DRAM_TIMING_TABLE_15 0x3f938 710#define ixMCARB_DRAM_TIMING_TABLE_16 0x3f93c 711#define ixMCARB_DRAM_TIMING_TABLE_17 0x3f940 712#define ixMCARB_DRAM_TIMING_TABLE_18 0x3f944 713#define ixMCARB_DRAM_TIMING_TABLE_19 0x3f948 714#define ixMCARB_DRAM_TIMING_TABLE_20 0x3f94c 715#define ixMCARB_DRAM_TIMING_TABLE_21 0x3f950 716#define ixMCARB_DRAM_TIMING_TABLE_22 0x3f954 717#define ixMCARB_DRAM_TIMING_TABLE_23 0x3f958 718#define ixMCARB_DRAM_TIMING_TABLE_24 0x3f95c 719#define ixMCARB_DRAM_TIMING_TABLE_25 0x3f960 720#define ixMCARB_DRAM_TIMING_TABLE_26 0x3f964 721#define ixMCARB_DRAM_TIMING_TABLE_27 0x3f968 722#define ixMCARB_DRAM_TIMING_TABLE_28 0x3f96c 723#define ixMCARB_DRAM_TIMING_TABLE_29 0x3f970 724#define ixMCARB_DRAM_TIMING_TABLE_30 0x3f974 725#define ixMCARB_DRAM_TIMING_TABLE_31 0x3f978 726#define ixMCARB_DRAM_TIMING_TABLE_32 0x3f97c 727#define ixMCARB_DRAM_TIMING_TABLE_33 0x3f980 728#define ixMCARB_DRAM_TIMING_TABLE_34 0x3f984 729#define ixMCARB_DRAM_TIMING_TABLE_35 0x3f988 730#define ixMCARB_DRAM_TIMING_TABLE_36 0x3f98c 731#define ixMCARB_DRAM_TIMING_TABLE_37 0x3f990 732#define ixMCARB_DRAM_TIMING_TABLE_38 0x3f994 733#define ixMCARB_DRAM_TIMING_TABLE_39 0x3f998 734#define ixMCARB_DRAM_TIMING_TABLE_40 0x3f99c 735#define ixMCARB_DRAM_TIMING_TABLE_41 0x3f9a0 736#define ixMCARB_DRAM_TIMING_TABLE_42 0x3f9a4 737#define ixMCARB_DRAM_TIMING_TABLE_43 0x3f9a8 738#define ixMCARB_DRAM_TIMING_TABLE_44 0x3f9ac 739#define ixMCARB_DRAM_TIMING_TABLE_45 0x3f9b0 740#define ixMCARB_DRAM_TIMING_TABLE_46 0x3f9b4 741#define ixMCARB_DRAM_TIMING_TABLE_47 0x3f9b8 742#define ixMCARB_DRAM_TIMING_TABLE_48 0x3f9bc 743#define ixMCARB_DRAM_TIMING_TABLE_49 0x3f9c0 744#define ixMCARB_DRAM_TIMING_TABLE_50 0x3f9c4 745#define ixMCARB_DRAM_TIMING_TABLE_51 0x3f9c8 746#define ixMCARB_DRAM_TIMING_TABLE_52 0x3f9cc 747#define ixMCARB_DRAM_TIMING_TABLE_53 0x3f9d0 748#define ixMCARB_DRAM_TIMING_TABLE_54 0x3f9d4 749#define ixMCARB_DRAM_TIMING_TABLE_55 0x3f9d8 750#define ixMCARB_DRAM_TIMING_TABLE_56 0x3f9dc 751#define ixMCARB_DRAM_TIMING_TABLE_57 0x3f9e0 752#define ixMCARB_DRAM_TIMING_TABLE_58 0x3f9e4 753#define ixMCARB_DRAM_TIMING_TABLE_59 0x3f9e8 754#define ixMCARB_DRAM_TIMING_TABLE_60 0x3f9ec 755#define ixMCARB_DRAM_TIMING_TABLE_61 0x3f9f0 756#define ixMCARB_DRAM_TIMING_TABLE_62 0x3f9f4 757#define ixMCARB_DRAM_TIMING_TABLE_63 0x3f9f8 758#define ixMCARB_DRAM_TIMING_TABLE_64 0x3f9fc 759#define ixMCARB_DRAM_TIMING_TABLE_65 0x3fa00 760#define ixMCARB_DRAM_TIMING_TABLE_66 0x3fa04 761#define ixMCARB_DRAM_TIMING_TABLE_67 0x3fa08 762#define ixMCARB_DRAM_TIMING_TABLE_68 0x3fa0c 763#define ixMCARB_DRAM_TIMING_TABLE_69 0x3fa10 764#define ixMCARB_DRAM_TIMING_TABLE_70 0x3fa14 765#define ixMCARB_DRAM_TIMING_TABLE_71 0x3fa18 766#define ixMCARB_DRAM_TIMING_TABLE_72 0x3fa1c 767#define ixMCARB_DRAM_TIMING_TABLE_73 0x3fa20 768#define ixMCARB_DRAM_TIMING_TABLE_74 0x3fa24 769#define ixMCARB_DRAM_TIMING_TABLE_75 0x3fa28 770#define ixMCARB_DRAM_TIMING_TABLE_76 0x3fa2c 771#define ixMCARB_DRAM_TIMING_TABLE_77 0x3fa30 772#define ixMCARB_DRAM_TIMING_TABLE_78 0x3fa34 773#define ixMCARB_DRAM_TIMING_TABLE_79 0x3fa38 774#define ixMCARB_DRAM_TIMING_TABLE_80 0x3fa3c 775#define ixMCARB_DRAM_TIMING_TABLE_81 0x3fa40 776#define ixMCARB_DRAM_TIMING_TABLE_82 0x3fa44 777#define ixMCARB_DRAM_TIMING_TABLE_83 0x3fa48 778#define ixMCARB_DRAM_TIMING_TABLE_84 0x3fa4c 779#define ixMCARB_DRAM_TIMING_TABLE_85 0x3fa50 780#define ixMCARB_DRAM_TIMING_TABLE_86 0x3fa54 781#define ixMCARB_DRAM_TIMING_TABLE_87 0x3fa58 782#define ixMCARB_DRAM_TIMING_TABLE_88 0x3fa5c 783#define ixMCARB_DRAM_TIMING_TABLE_89 0x3fa60 784#define ixMCARB_DRAM_TIMING_TABLE_90 0x3fa64 785#define ixMCARB_DRAM_TIMING_TABLE_91 0x3fa68 786#define ixMCARB_DRAM_TIMING_TABLE_92 0x3fa6c 787#define ixMCARB_DRAM_TIMING_TABLE_93 0x3fa70 788#define ixMCARB_DRAM_TIMING_TABLE_94 0x3fa74 789#define ixMCARB_DRAM_TIMING_TABLE_95 0x3fa78 790#define ixMCARB_DRAM_TIMING_TABLE_96 0x3fa7c 791#define ixMC_REGISTERS_TABLE_1 0x3fa80 792#define ixMC_REGISTERS_TABLE_2 0x3fa84 793#define ixMC_REGISTERS_TABLE_3 0x3fa88 794#define ixMC_REGISTERS_TABLE_4 0x3fa8c 795#define ixMC_REGISTERS_TABLE_5 0x3fa90 796#define ixMC_REGISTERS_TABLE_6 0x3fa94 797#define ixMC_REGISTERS_TABLE_7 0x3fa98 798#define ixMC_REGISTERS_TABLE_8 0x3fa9c 799#define ixMC_REGISTERS_TABLE_9 0x3faa0 800#define ixMC_REGISTERS_TABLE_10 0x3faa4 801#define ixMC_REGISTERS_TABLE_11 0x3faa8 802#define ixMC_REGISTERS_TABLE_12 0x3faac 803#define ixMC_REGISTERS_TABLE_13 0x3fab0 804#define ixMC_REGISTERS_TABLE_14 0x3fab4 805#define ixMC_REGISTERS_TABLE_15 0x3fab8 806#define ixMC_REGISTERS_TABLE_16 0x3fabc 807#define ixMC_REGISTERS_TABLE_17 0x3fac0 808#define ixMC_REGISTERS_TABLE_18 0x3fac4 809#define ixMC_REGISTERS_TABLE_19 0x3fac8 810#define ixMC_REGISTERS_TABLE_20 0x3facc 811#define ixMC_REGISTERS_TABLE_21 0x3fad0 812#define ixMC_REGISTERS_TABLE_22 0x3fad4 813#define ixMC_REGISTERS_TABLE_23 0x3fad8 814#define ixMC_REGISTERS_TABLE_24 0x3fadc 815#define ixMC_REGISTERS_TABLE_25 0x3fae0 816#define ixMC_REGISTERS_TABLE_26 0x3fae4 817#define ixMC_REGISTERS_TABLE_27 0x3fae8 818#define ixMC_REGISTERS_TABLE_28 0x3faec 819#define ixMC_REGISTERS_TABLE_29 0x3faf0 820#define ixMC_REGISTERS_TABLE_30 0x3faf4 821#define ixMC_REGISTERS_TABLE_31 0x3faf8 822#define ixMC_REGISTERS_TABLE_32 0x3fafc 823#define ixMC_REGISTERS_TABLE_33 0x3fb00 824#define ixMC_REGISTERS_TABLE_34 0x3fb04 825#define ixMC_REGISTERS_TABLE_35 0x3fb08 826#define ixMC_REGISTERS_TABLE_36 0x3fb0c 827#define ixMC_REGISTERS_TABLE_37 0x3fb10 828#define ixMC_REGISTERS_TABLE_38 0x3fb14 829#define ixMC_REGISTERS_TABLE_39 0x3fb18 830#define ixMC_REGISTERS_TABLE_40 0x3fb1c 831#define ixMC_REGISTERS_TABLE_41 0x3fb20 832#define ixMC_REGISTERS_TABLE_42 0x3fb24 833#define ixMC_REGISTERS_TABLE_43 0x3fb28 834#define ixMC_REGISTERS_TABLE_44 0x3fb2c 835#define ixMC_REGISTERS_TABLE_45 0x3fb30 836#define ixMC_REGISTERS_TABLE_46 0x3fb34 837#define ixMC_REGISTERS_TABLE_47 0x3fb38 838#define ixMC_REGISTERS_TABLE_48 0x3fb3c 839#define ixMC_REGISTERS_TABLE_49 0x3fb40 840#define ixMC_REGISTERS_TABLE_50 0x3fb44 841#define ixMC_REGISTERS_TABLE_51 0x3fb48 842#define ixMC_REGISTERS_TABLE_52 0x3fb4c 843#define ixMC_REGISTERS_TABLE_53 0x3fb50 844#define ixMC_REGISTERS_TABLE_54 0x3fb54 845#define ixMC_REGISTERS_TABLE_55 0x3fb58 846#define ixMC_REGISTERS_TABLE_56 0x3fb5c 847#define ixMC_REGISTERS_TABLE_57 0x3fb60 848#define ixMC_REGISTERS_TABLE_58 0x3fb64 849#define ixMC_REGISTERS_TABLE_59 0x3fb68 850#define ixMC_REGISTERS_TABLE_60 0x3fb6c 851#define ixMC_REGISTERS_TABLE_61 0x3fb70 852#define ixMC_REGISTERS_TABLE_62 0x3fb74 853#define ixMC_REGISTERS_TABLE_63 0x3fb78 854#define ixMC_REGISTERS_TABLE_64 0x3fb7c 855#define ixMC_REGISTERS_TABLE_65 0x3fb80 856#define ixMC_REGISTERS_TABLE_66 0x3fb84 857#define ixMC_REGISTERS_TABLE_67 0x3fb88 858#define ixMC_REGISTERS_TABLE_68 0x3fb8c 859#define ixMC_REGISTERS_TABLE_69 0x3fb90 860#define ixMC_REGISTERS_TABLE_70 0x3fb94 861#define ixMC_REGISTERS_TABLE_71 0x3fb98 862#define ixMC_REGISTERS_TABLE_72 0x3fb9c 863#define ixMC_REGISTERS_TABLE_73 0x3fba0 864#define ixMC_REGISTERS_TABLE_74 0x3fba4 865#define ixMC_REGISTERS_TABLE_75 0x3fba8 866#define ixMC_REGISTERS_TABLE_76 0x3fbac 867#define ixMC_REGISTERS_TABLE_77 0x3fbb0 868#define ixMC_REGISTERS_TABLE_78 0x3fbb4 869#define ixMC_REGISTERS_TABLE_79 0x3fbb8 870#define ixMC_REGISTERS_TABLE_80 0x3fbbc 871#define ixMC_REGISTERS_TABLE_81 0x3fbc0 872#define ixFAN_TABLE_1 0x3fbc4 873#define ixFAN_TABLE_2 0x3fbc8 874#define ixFAN_TABLE_3 0x3fbcc 875#define ixFAN_TABLE_4 0x3fbd0 876#define ixFAN_TABLE_5 0x3fbd4 877#define ixFAN_TABLE_6 0x3fbd8 878#define ixFAN_TABLE_7 0x3fbdc 879#define ixFAN_TABLE_8 0x3fbe0 880#define ixFAN_TABLE_9 0x3fbe4 881#define ixSOFT_REGISTERS_TABLE_1 0x3fbe8 882#define ixSOFT_REGISTERS_TABLE_2 0x3fbec 883#define ixSOFT_REGISTERS_TABLE_3 0x3fbf0 884#define ixSOFT_REGISTERS_TABLE_4 0x3fbf4 885#define ixSOFT_REGISTERS_TABLE_5 0x3fbf8 886#define ixSOFT_REGISTERS_TABLE_6 0x3fbfc 887#define ixSOFT_REGISTERS_TABLE_7 0x3fc00 888#define ixSOFT_REGISTERS_TABLE_8 0x3fc04 889#define ixSOFT_REGISTERS_TABLE_9 0x3fc08 890#define ixSOFT_REGISTERS_TABLE_10 0x3fc0c 891#define ixSOFT_REGISTERS_TABLE_11 0x3fc10 892#define ixSOFT_REGISTERS_TABLE_12 0x3fc14 893#define ixSOFT_REGISTERS_TABLE_13 0x3fc18 894#define ixSOFT_REGISTERS_TABLE_14 0x3fc1c 895#define ixSOFT_REGISTERS_TABLE_15 0x3fc20 896#define ixSOFT_REGISTERS_TABLE_16 0x3fc24 897#define ixSOFT_REGISTERS_TABLE_17 0x3fc28 898#define ixSOFT_REGISTERS_TABLE_18 0x3fc2c 899#define ixSOFT_REGISTERS_TABLE_19 0x3fc30 900#define ixSOFT_REGISTERS_TABLE_20 0x3fc34 901#define ixSOFT_REGISTERS_TABLE_21 0x3fc38 902#define ixSOFT_REGISTERS_TABLE_22 0x3fc3c 903#define ixSOFT_REGISTERS_TABLE_23 0x3fc40 904#define ixSOFT_REGISTERS_TABLE_24 0x3fc44 905#define ixSOFT_REGISTERS_TABLE_25 0x3fc48 906#define ixSOFT_REGISTERS_TABLE_26 0x3fc4c 907#define ixSOFT_REGISTERS_TABLE_27 0x3fc50 908#define ixSOFT_REGISTERS_TABLE_28 0x3fc54 909#define ixSOFT_REGISTERS_TABLE_29 0x3fc58 910#define ixSOFT_REGISTERS_TABLE_30 0x3fc5c 911#define ixPM_FUSES_1 0x3fc60 912#define ixPM_FUSES_2 0x3fc64 913#define ixPM_FUSES_3 0x3fc68 914#define ixPM_FUSES_4 0x3fc6c 915#define ixPM_FUSES_5 0x3fc70 916#define ixPM_FUSES_6 0x3fc74 917#define ixPM_FUSES_7 0x3fc78 918#define ixPM_FUSES_8 0x3fc7c 919#define ixPM_FUSES_9 0x3fc80 920#define ixPM_FUSES_10 0x3fc84 921#define ixPM_FUSES_11 0x3fc88 922#define ixPM_FUSES_12 0x3fc8c 923#define ixPM_FUSES_13 0x3fc90 924#define ixPM_FUSES_14 0x3fc94 925#define ixPM_FUSES_15 0x3fc98 926#define ixSMU_PM_STATUS_0 0x3fe00 927#define ixSMU_PM_STATUS_1 0x3fe04 928#define ixSMU_PM_STATUS_2 0x3fe08 929#define ixSMU_PM_STATUS_3 0x3fe0c 930#define ixSMU_PM_STATUS_4 0x3fe10 931#define ixSMU_PM_STATUS_5 0x3fe14 932#define ixSMU_PM_STATUS_6 0x3fe18 933#define ixSMU_PM_STATUS_7 0x3fe1c 934#define ixSMU_PM_STATUS_8 0x3fe20 935#define ixSMU_PM_STATUS_9 0x3fe24 936#define ixSMU_PM_STATUS_10 0x3fe28 937#define ixSMU_PM_STATUS_11 0x3fe2c 938#define ixSMU_PM_STATUS_12 0x3fe30 939#define ixSMU_PM_STATUS_13 0x3fe34 940#define ixSMU_PM_STATUS_14 0x3fe38 941#define ixSMU_PM_STATUS_15 0x3fe3c 942#define ixSMU_PM_STATUS_16 0x3fe40 943#define ixSMU_PM_STATUS_17 0x3fe44 944#define ixSMU_PM_STATUS_18 0x3fe48 945#define ixSMU_PM_STATUS_19 0x3fe4c 946#define ixSMU_PM_STATUS_20 0x3fe50 947#define ixSMU_PM_STATUS_21 0x3fe54 948#define ixSMU_PM_STATUS_22 0x3fe58 949#define ixSMU_PM_STATUS_23 0x3fe5c 950#define ixSMU_PM_STATUS_24 0x3fe60 951#define ixSMU_PM_STATUS_25 0x3fe64 952#define ixSMU_PM_STATUS_26 0x3fe68 953#define ixSMU_PM_STATUS_27 0x3fe6c 954#define ixSMU_PM_STATUS_28 0x3fe70 955#define ixSMU_PM_STATUS_29 0x3fe74 956#define ixSMU_PM_STATUS_30 0x3fe78 957#define ixSMU_PM_STATUS_31 0x3fe7c 958#define ixSMU_PM_STATUS_32 0x3fe80 959#define ixSMU_PM_STATUS_33 0x3fe84 960#define ixSMU_PM_STATUS_34 0x3fe88 961#define ixSMU_PM_STATUS_35 0x3fe8c 962#define ixSMU_PM_STATUS_36 0x3fe90 963#define ixSMU_PM_STATUS_37 0x3fe94 964#define ixSMU_PM_STATUS_38 0x3fe98 965#define ixSMU_PM_STATUS_39 0x3fe9c 966#define ixSMU_PM_STATUS_40 0x3fea0 967#define ixSMU_PM_STATUS_41 0x3fea4 968#define ixSMU_PM_STATUS_42 0x3fea8 969#define ixSMU_PM_STATUS_43 0x3feac 970#define ixSMU_PM_STATUS_44 0x3feb0 971#define ixSMU_PM_STATUS_45 0x3feb4 972#define ixSMU_PM_STATUS_46 0x3feb8 973#define ixSMU_PM_STATUS_47 0x3febc 974#define ixSMU_PM_STATUS_48 0x3fec0 975#define ixSMU_PM_STATUS_49 0x3fec4 976#define ixSMU_PM_STATUS_50 0x3fec8 977#define ixSMU_PM_STATUS_51 0x3fecc 978#define ixSMU_PM_STATUS_52 0x3fed0 979#define ixSMU_PM_STATUS_53 0x3fed4 980#define ixSMU_PM_STATUS_54 0x3fed8 981#define ixSMU_PM_STATUS_55 0x3fedc 982#define ixSMU_PM_STATUS_56 0x3fee0 983#define ixSMU_PM_STATUS_57 0x3fee4 984#define ixSMU_PM_STATUS_58 0x3fee8 985#define ixSMU_PM_STATUS_59 0x3feec 986#define ixSMU_PM_STATUS_60 0x3fef0 987#define ixSMU_PM_STATUS_61 0x3fef4 988#define ixSMU_PM_STATUS_62 0x3fef8 989#define ixSMU_PM_STATUS_63 0x3fefc 990#define ixSMU_PM_STATUS_64 0x3ff00 991#define ixSMU_PM_STATUS_65 0x3ff04 992#define ixSMU_PM_STATUS_66 0x3ff08 993#define ixSMU_PM_STATUS_67 0x3ff0c 994#define ixSMU_PM_STATUS_68 0x3ff10 995#define ixSMU_PM_STATUS_69 0x3ff14 996#define ixSMU_PM_STATUS_70 0x3ff18 997#define ixSMU_PM_STATUS_71 0x3ff1c 998#define ixSMU_PM_STATUS_72 0x3ff20 999#define ixSMU_PM_STATUS_73 0x3ff24 1000#define ixSMU_PM_STATUS_74 0x3ff28 1001#define ixSMU_PM_STATUS_75 0x3ff2c 1002#define ixSMU_PM_STATUS_76 0x3ff30 1003#define ixSMU_PM_STATUS_77 0x3ff34 1004#define ixSMU_PM_STATUS_78 0x3ff38 1005#define ixSMU_PM_STATUS_79 0x3ff3c 1006#define ixSMU_PM_STATUS_80 0x3ff40 1007#define ixSMU_PM_STATUS_81 0x3ff44 1008#define ixSMU_PM_STATUS_82 0x3ff48 1009#define ixSMU_PM_STATUS_83 0x3ff4c 1010#define ixSMU_PM_STATUS_84 0x3ff50 1011#define ixSMU_PM_STATUS_85 0x3ff54 1012#define ixSMU_PM_STATUS_86 0x3ff58 1013#define ixSMU_PM_STATUS_87 0x3ff5c 1014#define ixSMU_PM_STATUS_88 0x3ff60 1015#define ixSMU_PM_STATUS_89 0x3ff64 1016#define ixSMU_PM_STATUS_90 0x3ff68 1017#define ixSMU_PM_STATUS_91 0x3ff6c 1018#define ixSMU_PM_STATUS_92 0x3ff70 1019#define ixSMU_PM_STATUS_93 0x3ff74 1020#define ixSMU_PM_STATUS_94 0x3ff78 1021#define ixSMU_PM_STATUS_95 0x3ff7c 1022#define ixSMU_PM_STATUS_96 0x3ff80 1023#define ixSMU_PM_STATUS_97 0x3ff84 1024#define ixSMU_PM_STATUS_98 0x3ff88 1025#define ixSMU_PM_STATUS_99 0x3ff8c 1026#define ixSMU_PM_STATUS_100 0x3ff90 1027#define ixSMU_PM_STATUS_101 0x3ff94 1028#define ixSMU_PM_STATUS_102 0x3ff98 1029#define ixSMU_PM_STATUS_103 0x3ff9c 1030#define ixSMU_PM_STATUS_104 0x3ffa0 1031#define ixSMU_PM_STATUS_105 0x3ffa4 1032#define ixSMU_PM_STATUS_106 0x3ffa8 1033#define ixSMU_PM_STATUS_107 0x3ffac 1034#define ixSMU_PM_STATUS_108 0x3ffb0 1035#define ixSMU_PM_STATUS_109 0x3ffb4 1036#define ixSMU_PM_STATUS_110 0x3ffb8 1037#define ixSMU_PM_STATUS_111 0x3ffbc 1038#define ixSMU_PM_STATUS_112 0x3ffc0 1039#define ixSMU_PM_STATUS_113 0x3ffc4 1040#define ixSMU_PM_STATUS_114 0x3ffc8 1041#define ixSMU_PM_STATUS_115 0x3ffcc 1042#define ixSMU_PM_STATUS_116 0x3ffd0 1043#define ixSMU_PM_STATUS_117 0x3ffd4 1044#define ixSMU_PM_STATUS_118 0x3ffd8 1045#define ixSMU_PM_STATUS_119 0x3ffdc 1046#define ixSMU_PM_STATUS_120 0x3ffe0 1047#define ixSMU_PM_STATUS_121 0x3ffe4 1048#define ixSMU_PM_STATUS_122 0x3ffe8 1049#define ixSMU_PM_STATUS_123 0x3ffec 1050#define ixSMU_PM_STATUS_124 0x3fff0 1051#define ixSMU_PM_STATUS_125 0x3fff4 1052#define ixSMU_PM_STATUS_126 0x3fff8 1053#define ixSMU_PM_STATUS_127 0x3fffc 1054#define ixCG_THERMAL_INT_ENA 0xc2100024 1055#define ixCG_THERMAL_INT_CTRL 0xc2100028 1056#define ixCG_THERMAL_INT_STATUS 0xc210002c 1057#define ixCG_THERMAL_CTRL 0xc0300004 1058#define ixCG_THERMAL_STATUS 0xc0300008 1059#define ixCG_THERMAL_INT 0xc030000c 1060#define ixCG_MULT_THERMAL_CTRL 0xc0300010 1061#define ixCG_MULT_THERMAL_STATUS 0xc0300014 1062#define ixCG_FDO_CTRL0 0xc0300064 1063#define ixCG_FDO_CTRL1 0xc0300068 1064#define ixCG_FDO_CTRL2 0xc030006c 1065#define ixCG_TACH_CTRL 0xc0300070 1066#define ixCG_TACH_STATUS 0xc0300074 1067#define ixCC_THM_STRAPS0 0xc0300080 1068#define ixTHM_TMON0_RDIL0_DATA 0xc0300100 1069#define ixTHM_TMON0_RDIL1_DATA 0xc0300104 1070#define ixTHM_TMON0_RDIL2_DATA 0xc0300108 1071#define ixTHM_TMON0_RDIL3_DATA 0xc030010c 1072#define ixTHM_TMON0_RDIL4_DATA 0xc0300110 1073#define ixTHM_TMON0_RDIL5_DATA 0xc0300114 1074#define ixTHM_TMON0_RDIL6_DATA 0xc0300118 1075#define ixTHM_TMON0_RDIL7_DATA 0xc030011c 1076#define ixTHM_TMON0_RDIL8_DATA 0xc0300120 1077#define ixTHM_TMON0_RDIL9_DATA 0xc0300124 1078#define ixTHM_TMON0_RDIL10_DATA 0xc0300128 1079#define ixTHM_TMON0_RDIL11_DATA 0xc030012c 1080#define ixTHM_TMON0_RDIL12_DATA 0xc0300130 1081#define ixTHM_TMON0_RDIL13_DATA 0xc0300134 1082#define ixTHM_TMON0_RDIL14_DATA 0xc0300138 1083#define ixTHM_TMON0_RDIL15_DATA 0xc030013c 1084#define ixTHM_TMON0_RDIR0_DATA 0xc0300140 1085#define ixTHM_TMON0_RDIR1_DATA 0xc0300144 1086#define ixTHM_TMON0_RDIR2_DATA 0xc0300148 1087#define ixTHM_TMON0_RDIR3_DATA 0xc030014c 1088#define ixTHM_TMON0_RDIR4_DATA 0xc0300150 1089#define ixTHM_TMON0_RDIR5_DATA 0xc0300154 1090#define ixTHM_TMON0_RDIR6_DATA 0xc0300158 1091#define ixTHM_TMON0_RDIR7_DATA 0xc030015c 1092#define ixTHM_TMON0_RDIR8_DATA 0xc0300160 1093#define ixTHM_TMON0_RDIR9_DATA 0xc0300164 1094#define ixTHM_TMON0_RDIR10_DATA 0xc0300168 1095#define ixTHM_TMON0_RDIR11_DATA 0xc030016c 1096#define ixTHM_TMON0_RDIR12_DATA 0xc0300170 1097#define ixTHM_TMON0_RDIR13_DATA 0xc0300174 1098#define ixTHM_TMON0_RDIR14_DATA 0xc0300178 1099#define ixTHM_TMON0_RDIR15_DATA 0xc030017c 1100#define ixTHM_TMON1_RDIL0_DATA 0xc0300180 1101#define ixTHM_TMON1_RDIL1_DATA 0xc0300184 1102#define ixTHM_TMON1_RDIL2_DATA 0xc0300188 1103#define ixTHM_TMON1_RDIL3_DATA 0xc030018c 1104#define ixTHM_TMON1_RDIL4_DATA 0xc0300190 1105#define ixTHM_TMON1_RDIL5_DATA 0xc0300194 1106#define ixTHM_TMON1_RDIL6_DATA 0xc0300198 1107#define ixTHM_TMON1_RDIL7_DATA 0xc030019c 1108#define ixTHM_TMON1_RDIL8_DATA 0xc03001a0 1109#define ixTHM_TMON1_RDIL9_DATA 0xc03001a4 1110#define ixTHM_TMON1_RDIL10_DATA 0xc03001a8 1111#define ixTHM_TMON1_RDIL11_DATA 0xc03001ac 1112#define ixTHM_TMON1_RDIL12_DATA 0xc03001b0 1113#define ixTHM_TMON1_RDIL13_DATA 0xc03001b4 1114#define ixTHM_TMON1_RDIL14_DATA 0xc03001b8 1115#define ixTHM_TMON1_RDIL15_DATA 0xc03001bc 1116#define ixTHM_TMON1_RDIR0_DATA 0xc03001c0 1117#define ixTHM_TMON1_RDIR1_DATA 0xc03001c4 1118#define ixTHM_TMON1_RDIR2_DATA 0xc03001c8 1119#define ixTHM_TMON1_RDIR3_DATA 0xc03001cc 1120#define ixTHM_TMON1_RDIR4_DATA 0xc03001d0 1121#define ixTHM_TMON1_RDIR5_DATA 0xc03001d4 1122#define ixTHM_TMON1_RDIR6_DATA 0xc03001d8 1123#define ixTHM_TMON1_RDIR7_DATA 0xc03001dc 1124#define ixTHM_TMON1_RDIR8_DATA 0xc03001e0 1125#define ixTHM_TMON1_RDIR9_DATA 0xc03001e4 1126#define ixTHM_TMON1_RDIR10_DATA 0xc03001e8 1127#define ixTHM_TMON1_RDIR11_DATA 0xc03001ec 1128#define ixTHM_TMON1_RDIR12_DATA 0xc03001f0 1129#define ixTHM_TMON1_RDIR13_DATA 0xc03001f4 1130#define ixTHM_TMON1_RDIR14_DATA 0xc03001f8 1131#define ixTHM_TMON1_RDIR15_DATA 0xc03001fc 1132#define ixTHM_TMON0_INT_DATA 0xc0300300 1133#define ixTHM_TMON1_INT_DATA 0xc0300304 1134#define ixTHM_TMON0_DEBUG 0xc0300310 1135#define ixTHM_TMON1_DEBUG 0xc0300314 1136#define ixTHM_TMON0_STATUS 0xc0300320 1137#define ixTHM_TMON1_STATUS 0xc0300324 1138#define ixGENERAL_PWRMGT 0xc0200000 1139#define ixCNB_PWRMGT_CNTL 0xc0200004 1140#define ixSCLK_PWRMGT_CNTL 0xc0200008 1141#define ixTARGET_AND_CURRENT_PROFILE_INDEX 0xc0200014 1142#define ixPWR_PCC_CONTROL 0xc0200018 1143#define ixPWR_PCC_GPIO_SELECT 0xc020001c 1144#define ixCG_FREQ_TRAN_VOTING_0 0xc02001a8 1145#define ixCG_FREQ_TRAN_VOTING_1 0xc02001ac 1146#define ixCG_FREQ_TRAN_VOTING_2 0xc02001b0 1147#define ixCG_FREQ_TRAN_VOTING_3 0xc02001b4 1148#define ixCG_FREQ_TRAN_VOTING_4 0xc02001b8 1149#define ixCG_FREQ_TRAN_VOTING_5 0xc02001bc 1150#define ixCG_FREQ_TRAN_VOTING_6 0xc02001c0 1151#define ixCG_FREQ_TRAN_VOTING_7 0xc02001c4 1152#define ixPLL_TEST_CNTL 0xc020003c 1153#define ixCG_STATIC_SCREEN_PARAMETER 0xc0200044 1154#define ixCG_DISPLAY_GAP_CNTL 0xc0200060 1155#define ixCG_DISPLAY_GAP_CNTL2 0xc0200230 1156#define ixCG_ACPI_CNTL 0xc0200064 1157#define ixSCLK_DEEP_SLEEP_CNTL 0xc0200080 1158#define ixSCLK_DEEP_SLEEP_CNTL2 0xc0200084 1159#define ixSCLK_DEEP_SLEEP_CNTL3 0xc020009c 1160#define ixSCLK_DEEP_SLEEP_MISC_CNTL 0xc0200088 1161#define ixLCLK_DEEP_SLEEP_CNTL 0xc020008c 1162#define ixLCLK_DEEP_SLEEP_CNTL2 0xc0200310 1163#define ixTARGET_AND_CURRENT_PROFILE_INDEX_1 0xc02000f0 1164#define ixCG_ULV_PARAMETER 0xc020015c 1165#define ixSCLK_MIN_DIV 0xc02003ac 1166#define ixPWR_CKS_ENABLE 0xc020034c 1167#define ixPWR_CKS_CNTL 0xc0200350 1168#define ixPWR_DISP_TIMER_CONTROL 0xc02003c0 1169#define ixPWR_DISP_TIMER_DEBUG 0xc02003c4 1170#define ixPWR_DISP_TIMER2_CONTROL 0xc02003c8 1171#define ixPWR_DISP_TIMER2_DEBUG 0xc02003cc 1172#define ixPWR_DISP_TIMER_CONTROL2 0xc0200378 1173#define ixVDDGFX_IDLE_PARAMETER 0xc020036c 1174#define ixVDDGFX_IDLE_CONTROL 0xc0200370 1175#define ixVDDGFX_IDLE_EXIT 0xc0200374 1176#define ixLCAC_MC0_CNTL 0xc0400130 1177#define ixLCAC_MC0_OVR_SEL 0xc0400134 1178#define ixLCAC_MC0_OVR_VAL 0xc0400138 1179#define ixLCAC_MC1_CNTL 0xc040013c 1180#define ixLCAC_MC1_OVR_SEL 0xc0400140 1181#define ixLCAC_MC1_OVR_VAL 0xc0400144 1182#define ixLCAC_MC2_CNTL 0xc0400148 1183#define ixLCAC_MC2_OVR_SEL 0xc040014c 1184#define ixLCAC_MC2_OVR_VAL 0xc0400150 1185#define ixLCAC_MC3_CNTL 0xc0400154 1186#define ixLCAC_MC3_OVR_SEL 0xc0400158 1187#define ixLCAC_MC3_OVR_VAL 0xc040015c 1188#define ixLCAC_CPL_CNTL 0xc0400160 1189#define ixLCAC_CPL_OVR_SEL 0xc0400164 1190#define ixLCAC_CPL_OVR_VAL 0xc0400168 1191#define mmROM_SMC_IND_INDEX 0x80 1192#define mmROM0_ROM_SMC_IND_INDEX 0x80 1193#define mmROM1_ROM_SMC_IND_INDEX 0x82 1194#define mmROM2_ROM_SMC_IND_INDEX 0x84 1195#define mmROM3_ROM_SMC_IND_INDEX 0x86 1196#define mmROM_SMC_IND_DATA 0x81 1197#define mmROM0_ROM_SMC_IND_DATA 0x81 1198#define mmROM1_ROM_SMC_IND_DATA 0x83 1199#define mmROM2_ROM_SMC_IND_DATA 0x85 1200#define mmROM3_ROM_SMC_IND_DATA 0x87 1201#define ixROM_CNTL 0xc0600000 1202#define ixPAGE_MIRROR_CNTL 0xc0600004 1203#define ixROM_STATUS 0xc0600008 1204#define ixCGTT_ROM_CLK_CTRL0 0xc060000c 1205#define ixROM_INDEX 0xc0600010 1206#define ixROM_DATA 0xc0600014 1207#define ixROM_START 0xc0600018 1208#define ixROM_SW_CNTL 0xc060001c 1209#define ixROM_SW_STATUS 0xc0600020 1210#define ixROM_SW_COMMAND 0xc0600024 1211#define ixROM_SW_DATA_1 0xc0600028 1212#define ixROM_SW_DATA_2 0xc060002c 1213#define ixROM_SW_DATA_3 0xc0600030 1214#define ixROM_SW_DATA_4 0xc0600034 1215#define ixROM_SW_DATA_5 0xc0600038 1216#define ixROM_SW_DATA_6 0xc060003c 1217#define ixROM_SW_DATA_7 0xc0600040 1218#define ixROM_SW_DATA_8 0xc0600044 1219#define ixROM_SW_DATA_9 0xc0600048 1220#define ixROM_SW_DATA_10 0xc060004c 1221#define ixROM_SW_DATA_11 0xc0600050 1222#define ixROM_SW_DATA_12 0xc0600054 1223#define ixROM_SW_DATA_13 0xc0600058 1224#define ixROM_SW_DATA_14 0xc060005c 1225#define ixROM_SW_DATA_15 0xc0600060 1226#define ixROM_SW_DATA_16 0xc0600064 1227#define ixROM_SW_DATA_17 0xc0600068 1228#define ixROM_SW_DATA_18 0xc060006c 1229#define ixROM_SW_DATA_19 0xc0600070 1230#define ixROM_SW_DATA_20 0xc0600074 1231#define ixROM_SW_DATA_21 0xc0600078 1232#define ixROM_SW_DATA_22 0xc060007c 1233#define ixROM_SW_DATA_23 0xc0600080 1234#define ixROM_SW_DATA_24 0xc0600084 1235#define ixROM_SW_DATA_25 0xc0600088 1236#define ixROM_SW_DATA_26 0xc060008c 1237#define ixROM_SW_DATA_27 0xc0600090 1238#define ixROM_SW_DATA_28 0xc0600094 1239#define ixROM_SW_DATA_29 0xc0600098 1240#define ixROM_SW_DATA_30 0xc060009c 1241#define ixROM_SW_DATA_31 0xc06000a0 1242#define ixROM_SW_DATA_32 0xc06000a4 1243#define ixROM_SW_DATA_33 0xc06000a8 1244#define ixROM_SW_DATA_34 0xc06000ac 1245#define ixROM_SW_DATA_35 0xc06000b0 1246#define ixROM_SW_DATA_36 0xc06000b4 1247#define ixROM_SW_DATA_37 0xc06000b8 1248#define ixROM_SW_DATA_38 0xc06000bc 1249#define ixROM_SW_DATA_39 0xc06000c0 1250#define ixROM_SW_DATA_40 0xc06000c4 1251#define ixROM_SW_DATA_41 0xc06000c8 1252#define ixROM_SW_DATA_42 0xc06000cc 1253#define ixROM_SW_DATA_43 0xc06000d0 1254#define ixROM_SW_DATA_44 0xc06000d4 1255#define ixROM_SW_DATA_45 0xc06000d8 1256#define ixROM_SW_DATA_46 0xc06000dc 1257#define ixROM_SW_DATA_47 0xc06000e0 1258#define ixROM_SW_DATA_48 0xc06000e4 1259#define ixROM_SW_DATA_49 0xc06000e8 1260#define ixROM_SW_DATA_50 0xc06000ec 1261#define ixROM_SW_DATA_51 0xc06000f0 1262#define ixROM_SW_DATA_52 0xc06000f4 1263#define ixROM_SW_DATA_53 0xc06000f8 1264#define ixROM_SW_DATA_54 0xc06000fc 1265#define ixROM_SW_DATA_55 0xc0600100 1266#define ixROM_SW_DATA_56 0xc0600104 1267#define ixROM_SW_DATA_57 0xc0600108 1268#define ixROM_SW_DATA_58 0xc060010c 1269#define ixROM_SW_DATA_59 0xc0600110 1270#define ixROM_SW_DATA_60 0xc0600114 1271#define ixROM_SW_DATA_61 0xc0600118 1272#define ixROM_SW_DATA_62 0xc060011c 1273#define ixROM_SW_DATA_63 0xc0600120 1274#define ixROM_SW_DATA_64 0xc0600124 1275#define ixCURRENT_PG_STATUS 0xc020029c 1276#define ixCURRENT_PG_STATUS_APU 0xd020029c 1277 1278#endif /* SMU_7_1_2_D_H */ 1279