1/* 2 * Copyright 2023 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23#ifndef _mp_14_0_0_SH_MASK_HEADER 24#define _mp_14_0_0_SH_MASK_HEADER 25 26// addressBlock: mp_SmuMp1Pub_CruDec 27//MP1_CRU1_MP1_FIRMWARE_FLAGS 28#define MP1_CRU1_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT 0x0 29#define MP1_CRU1_MP1_FIRMWARE_FLAGS__RESERVED__SHIFT 0x1 30#define MP1_CRU1_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK 0x00000001L 31#define MP1_CRU1_MP1_FIRMWARE_FLAGS__RESERVED_MASK 0xFFFFFFFEL 32 33 34// addressBlock: mp_SmuMp1_SmnDec 35//MP1_SMN_C2PMSG_0 36#define MP1_SMN_C2PMSG_0__CONTENT__SHIFT 0x0 37#define MP1_SMN_C2PMSG_0__CONTENT_MASK 0xFFFFFFFFL 38//MP1_SMN_C2PMSG_1 39#define MP1_SMN_C2PMSG_1__CONTENT__SHIFT 0x0 40#define MP1_SMN_C2PMSG_1__CONTENT_MASK 0xFFFFFFFFL 41//MP1_SMN_C2PMSG_2 42#define MP1_SMN_C2PMSG_2__CONTENT__SHIFT 0x0 43#define MP1_SMN_C2PMSG_2__CONTENT_MASK 0xFFFFFFFFL 44//MP1_SMN_C2PMSG_3 45#define MP1_SMN_C2PMSG_3__CONTENT__SHIFT 0x0 46#define MP1_SMN_C2PMSG_3__CONTENT_MASK 0xFFFFFFFFL 47//MP1_SMN_C2PMSG_4 48#define MP1_SMN_C2PMSG_4__CONTENT__SHIFT 0x0 49#define MP1_SMN_C2PMSG_4__CONTENT_MASK 0xFFFFFFFFL 50//MP1_SMN_C2PMSG_5 51#define MP1_SMN_C2PMSG_5__CONTENT__SHIFT 0x0 52#define MP1_SMN_C2PMSG_5__CONTENT_MASK 0xFFFFFFFFL 53//MP1_SMN_C2PMSG_6 54#define MP1_SMN_C2PMSG_6__CONTENT__SHIFT 0x0 55#define MP1_SMN_C2PMSG_6__CONTENT_MASK 0xFFFFFFFFL 56//MP1_SMN_C2PMSG_7 57#define MP1_SMN_C2PMSG_7__CONTENT__SHIFT 0x0 58#define MP1_SMN_C2PMSG_7__CONTENT_MASK 0xFFFFFFFFL 59//MP1_SMN_C2PMSG_8 60#define MP1_SMN_C2PMSG_8__CONTENT__SHIFT 0x0 61#define MP1_SMN_C2PMSG_8__CONTENT_MASK 0xFFFFFFFFL 62//MP1_SMN_C2PMSG_9 63#define MP1_SMN_C2PMSG_9__CONTENT__SHIFT 0x0 64#define MP1_SMN_C2PMSG_9__CONTENT_MASK 0xFFFFFFFFL 65//MP1_SMN_C2PMSG_10 66#define MP1_SMN_C2PMSG_10__CONTENT__SHIFT 0x0 67#define MP1_SMN_C2PMSG_10__CONTENT_MASK 0xFFFFFFFFL 68//MP1_SMN_C2PMSG_11 69#define MP1_SMN_C2PMSG_11__CONTENT__SHIFT 0x0 70#define MP1_SMN_C2PMSG_11__CONTENT_MASK 0xFFFFFFFFL 71//MP1_SMN_C2PMSG_12 72#define MP1_SMN_C2PMSG_12__CONTENT__SHIFT 0x0 73#define MP1_SMN_C2PMSG_12__CONTENT_MASK 0xFFFFFFFFL 74//MP1_SMN_C2PMSG_13 75#define MP1_SMN_C2PMSG_13__CONTENT__SHIFT 0x0 76#define MP1_SMN_C2PMSG_13__CONTENT_MASK 0xFFFFFFFFL 77//MP1_SMN_C2PMSG_14 78#define MP1_SMN_C2PMSG_14__CONTENT__SHIFT 0x0 79#define MP1_SMN_C2PMSG_14__CONTENT_MASK 0xFFFFFFFFL 80//MP1_SMN_C2PMSG_15 81#define MP1_SMN_C2PMSG_15__CONTENT__SHIFT 0x0 82#define MP1_SMN_C2PMSG_15__CONTENT_MASK 0xFFFFFFFFL 83//MP1_SMN_C2PMSG_16 84#define MP1_SMN_C2PMSG_16__CONTENT__SHIFT 0x0 85#define MP1_SMN_C2PMSG_16__CONTENT_MASK 0xFFFFFFFFL 86//MP1_SMN_C2PMSG_17 87#define MP1_SMN_C2PMSG_17__CONTENT__SHIFT 0x0 88#define MP1_SMN_C2PMSG_17__CONTENT_MASK 0xFFFFFFFFL 89//MP1_SMN_C2PMSG_18 90#define MP1_SMN_C2PMSG_18__CONTENT__SHIFT 0x0 91#define MP1_SMN_C2PMSG_18__CONTENT_MASK 0xFFFFFFFFL 92//MP1_SMN_C2PMSG_19 93#define MP1_SMN_C2PMSG_19__CONTENT__SHIFT 0x0 94#define MP1_SMN_C2PMSG_19__CONTENT_MASK 0xFFFFFFFFL 95//MP1_SMN_C2PMSG_20 96#define MP1_SMN_C2PMSG_20__CONTENT__SHIFT 0x0 97#define MP1_SMN_C2PMSG_20__CONTENT_MASK 0xFFFFFFFFL 98//MP1_SMN_C2PMSG_21 99#define MP1_SMN_C2PMSG_21__CONTENT__SHIFT 0x0 100#define MP1_SMN_C2PMSG_21__CONTENT_MASK 0xFFFFFFFFL 101//MP1_SMN_C2PMSG_22 102#define MP1_SMN_C2PMSG_22__CONTENT__SHIFT 0x0 103#define MP1_SMN_C2PMSG_22__CONTENT_MASK 0xFFFFFFFFL 104//MP1_SMN_C2PMSG_23 105#define MP1_SMN_C2PMSG_23__CONTENT__SHIFT 0x0 106#define MP1_SMN_C2PMSG_23__CONTENT_MASK 0xFFFFFFFFL 107//MP1_SMN_C2PMSG_24 108#define MP1_SMN_C2PMSG_24__CONTENT__SHIFT 0x0 109#define MP1_SMN_C2PMSG_24__CONTENT_MASK 0xFFFFFFFFL 110//MP1_SMN_C2PMSG_25 111#define MP1_SMN_C2PMSG_25__CONTENT__SHIFT 0x0 112#define MP1_SMN_C2PMSG_25__CONTENT_MASK 0xFFFFFFFFL 113//MP1_SMN_C2PMSG_26 114#define MP1_SMN_C2PMSG_26__CONTENT__SHIFT 0x0 115#define MP1_SMN_C2PMSG_26__CONTENT_MASK 0xFFFFFFFFL 116//MP1_SMN_C2PMSG_27 117#define MP1_SMN_C2PMSG_27__CONTENT__SHIFT 0x0 118#define MP1_SMN_C2PMSG_27__CONTENT_MASK 0xFFFFFFFFL 119//MP1_SMN_C2PMSG_28 120#define MP1_SMN_C2PMSG_28__CONTENT__SHIFT 0x0 121#define MP1_SMN_C2PMSG_28__CONTENT_MASK 0xFFFFFFFFL 122//MP1_SMN_C2PMSG_29 123#define MP1_SMN_C2PMSG_29__CONTENT__SHIFT 0x0 124#define MP1_SMN_C2PMSG_29__CONTENT_MASK 0xFFFFFFFFL 125//MP1_SMN_C2PMSG_30 126#define MP1_SMN_C2PMSG_30__CONTENT__SHIFT 0x0 127#define MP1_SMN_C2PMSG_30__CONTENT_MASK 0xFFFFFFFFL 128//MP1_SMN_C2PMSG_31 129#define MP1_SMN_C2PMSG_31__CONTENT__SHIFT 0x0 130#define MP1_SMN_C2PMSG_31__CONTENT_MASK 0xFFFFFFFFL 131//MP1_SMN_C2PMSG_32 132#define MP1_SMN_C2PMSG_32__CONTENT__SHIFT 0x0 133#define MP1_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 134//MP1_SMN_C2PMSG_33 135#define MP1_SMN_C2PMSG_33__CONTENT__SHIFT 0x0 136#define MP1_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 137//MP1_SMN_C2PMSG_34 138#define MP1_SMN_C2PMSG_34__CONTENT__SHIFT 0x0 139#define MP1_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 140//MP1_SMN_C2PMSG_35 141#define MP1_SMN_C2PMSG_35__CONTENT__SHIFT 0x0 142#define MP1_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 143//MP1_SMN_C2PMSG_36 144#define MP1_SMN_C2PMSG_36__CONTENT__SHIFT 0x0 145#define MP1_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 146//MP1_SMN_C2PMSG_37 147#define MP1_SMN_C2PMSG_37__CONTENT__SHIFT 0x0 148#define MP1_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 149//MP1_SMN_C2PMSG_38 150#define MP1_SMN_C2PMSG_38__CONTENT__SHIFT 0x0 151#define MP1_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 152//MP1_SMN_C2PMSG_39 153#define MP1_SMN_C2PMSG_39__CONTENT__SHIFT 0x0 154#define MP1_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 155//MP1_SMN_C2PMSG_40 156#define MP1_SMN_C2PMSG_40__CONTENT__SHIFT 0x0 157#define MP1_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 158//MP1_SMN_C2PMSG_41 159#define MP1_SMN_C2PMSG_41__CONTENT__SHIFT 0x0 160#define MP1_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 161//MP1_SMN_C2PMSG_42 162#define MP1_SMN_C2PMSG_42__CONTENT__SHIFT 0x0 163#define MP1_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 164//MP1_SMN_C2PMSG_43 165#define MP1_SMN_C2PMSG_43__CONTENT__SHIFT 0x0 166#define MP1_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 167//MP1_SMN_C2PMSG_44 168#define MP1_SMN_C2PMSG_44__CONTENT__SHIFT 0x0 169#define MP1_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 170//MP1_SMN_C2PMSG_45 171#define MP1_SMN_C2PMSG_45__CONTENT__SHIFT 0x0 172#define MP1_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 173//MP1_SMN_C2PMSG_46 174#define MP1_SMN_C2PMSG_46__CONTENT__SHIFT 0x0 175#define MP1_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 176//MP1_SMN_C2PMSG_47 177#define MP1_SMN_C2PMSG_47__CONTENT__SHIFT 0x0 178#define MP1_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 179//MP1_SMN_C2PMSG_48 180#define MP1_SMN_C2PMSG_48__CONTENT__SHIFT 0x0 181#define MP1_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 182//MP1_SMN_C2PMSG_49 183#define MP1_SMN_C2PMSG_49__CONTENT__SHIFT 0x0 184#define MP1_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 185//MP1_SMN_C2PMSG_50 186#define MP1_SMN_C2PMSG_50__CONTENT__SHIFT 0x0 187#define MP1_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 188//MP1_SMN_C2PMSG_51 189#define MP1_SMN_C2PMSG_51__CONTENT__SHIFT 0x0 190#define MP1_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 191//MP1_SMN_C2PMSG_52 192#define MP1_SMN_C2PMSG_52__CONTENT__SHIFT 0x0 193#define MP1_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 194//MP1_SMN_C2PMSG_53 195#define MP1_SMN_C2PMSG_53__CONTENT__SHIFT 0x0 196#define MP1_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 197//MP1_SMN_C2PMSG_54 198#define MP1_SMN_C2PMSG_54__CONTENT__SHIFT 0x0 199#define MP1_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 200//MP1_SMN_C2PMSG_55 201#define MP1_SMN_C2PMSG_55__CONTENT__SHIFT 0x0 202#define MP1_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 203//MP1_SMN_C2PMSG_56 204#define MP1_SMN_C2PMSG_56__CONTENT__SHIFT 0x0 205#define MP1_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 206//MP1_SMN_C2PMSG_57 207#define MP1_SMN_C2PMSG_57__CONTENT__SHIFT 0x0 208#define MP1_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 209//MP1_SMN_C2PMSG_58 210#define MP1_SMN_C2PMSG_58__CONTENT__SHIFT 0x0 211#define MP1_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 212//MP1_SMN_C2PMSG_59 213#define MP1_SMN_C2PMSG_59__CONTENT__SHIFT 0x0 214#define MP1_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 215//MP1_SMN_C2PMSG_60 216#define MP1_SMN_C2PMSG_60__CONTENT__SHIFT 0x0 217#define MP1_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 218//MP1_SMN_C2PMSG_61 219#define MP1_SMN_C2PMSG_61__CONTENT__SHIFT 0x0 220#define MP1_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 221//MP1_SMN_C2PMSG_62 222#define MP1_SMN_C2PMSG_62__CONTENT__SHIFT 0x0 223#define MP1_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 224//MP1_SMN_C2PMSG_63 225#define MP1_SMN_C2PMSG_63__CONTENT__SHIFT 0x0 226#define MP1_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 227//MP1_SMN_C2PMSG_64 228#define MP1_SMN_C2PMSG_64__CONTENT__SHIFT 0x0 229#define MP1_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 230//MP1_SMN_C2PMSG_65 231#define MP1_SMN_C2PMSG_65__CONTENT__SHIFT 0x0 232#define MP1_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 233//MP1_SMN_C2PMSG_66 234#define MP1_SMN_C2PMSG_66__CONTENT__SHIFT 0x0 235#define MP1_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 236//MP1_SMN_C2PMSG_67 237#define MP1_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 238#define MP1_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 239//MP1_SMN_C2PMSG_68 240#define MP1_SMN_C2PMSG_68__CONTENT__SHIFT 0x0 241#define MP1_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 242//MP1_SMN_C2PMSG_69 243#define MP1_SMN_C2PMSG_69__CONTENT__SHIFT 0x0 244#define MP1_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 245//MP1_SMN_C2PMSG_70 246#define MP1_SMN_C2PMSG_70__CONTENT__SHIFT 0x0 247#define MP1_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 248//MP1_SMN_C2PMSG_71 249#define MP1_SMN_C2PMSG_71__CONTENT__SHIFT 0x0 250#define MP1_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 251//MP1_SMN_C2PMSG_72 252#define MP1_SMN_C2PMSG_72__CONTENT__SHIFT 0x0 253#define MP1_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 254//MP1_SMN_C2PMSG_73 255#define MP1_SMN_C2PMSG_73__CONTENT__SHIFT 0x0 256#define MP1_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 257//MP1_SMN_C2PMSG_74 258#define MP1_SMN_C2PMSG_74__CONTENT__SHIFT 0x0 259#define MP1_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 260//MP1_SMN_C2PMSG_75 261#define MP1_SMN_C2PMSG_75__CONTENT__SHIFT 0x0 262#define MP1_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 263//MP1_SMN_C2PMSG_76 264#define MP1_SMN_C2PMSG_76__CONTENT__SHIFT 0x0 265#define MP1_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 266//MP1_SMN_C2PMSG_77 267#define MP1_SMN_C2PMSG_77__CONTENT__SHIFT 0x0 268#define MP1_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 269//MP1_SMN_C2PMSG_78 270#define MP1_SMN_C2PMSG_78__CONTENT__SHIFT 0x0 271#define MP1_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 272//MP1_SMN_C2PMSG_79 273#define MP1_SMN_C2PMSG_79__CONTENT__SHIFT 0x0 274#define MP1_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 275//MP1_SMN_C2PMSG_80 276#define MP1_SMN_C2PMSG_80__CONTENT__SHIFT 0x0 277#define MP1_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 278//MP1_SMN_C2PMSG_81 279#define MP1_SMN_C2PMSG_81__CONTENT__SHIFT 0x0 280#define MP1_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 281//MP1_SMN_C2PMSG_82 282#define MP1_SMN_C2PMSG_82__CONTENT__SHIFT 0x0 283#define MP1_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 284//MP1_SMN_C2PMSG_83 285#define MP1_SMN_C2PMSG_83__CONTENT__SHIFT 0x0 286#define MP1_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 287//MP1_SMN_C2PMSG_84 288#define MP1_SMN_C2PMSG_84__CONTENT__SHIFT 0x0 289#define MP1_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 290//MP1_SMN_C2PMSG_85 291#define MP1_SMN_C2PMSG_85__CONTENT__SHIFT 0x0 292#define MP1_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 293//MP1_SMN_C2PMSG_86 294#define MP1_SMN_C2PMSG_86__CONTENT__SHIFT 0x0 295#define MP1_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 296//MP1_SMN_C2PMSG_87 297#define MP1_SMN_C2PMSG_87__CONTENT__SHIFT 0x0 298#define MP1_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 299//MP1_SMN_C2PMSG_88 300#define MP1_SMN_C2PMSG_88__CONTENT__SHIFT 0x0 301#define MP1_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 302//MP1_SMN_C2PMSG_89 303#define MP1_SMN_C2PMSG_89__CONTENT__SHIFT 0x0 304#define MP1_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 305//MP1_SMN_C2PMSG_90 306#define MP1_SMN_C2PMSG_90__CONTENT__SHIFT 0x0 307#define MP1_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 308//MP1_SMN_C2PMSG_91 309#define MP1_SMN_C2PMSG_91__CONTENT__SHIFT 0x0 310#define MP1_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 311//MP1_SMN_C2PMSG_92 312#define MP1_SMN_C2PMSG_92__CONTENT__SHIFT 0x0 313#define MP1_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 314//MP1_SMN_C2PMSG_93 315#define MP1_SMN_C2PMSG_93__CONTENT__SHIFT 0x0 316#define MP1_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 317//MP1_SMN_C2PMSG_94 318#define MP1_SMN_C2PMSG_94__CONTENT__SHIFT 0x0 319#define MP1_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 320//MP1_SMN_C2PMSG_95 321#define MP1_SMN_C2PMSG_95__CONTENT__SHIFT 0x0 322#define MP1_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 323//MP1_SMN_C2PMSG_96 324#define MP1_SMN_C2PMSG_96__CONTENT__SHIFT 0x0 325#define MP1_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 326//MP1_SMN_C2PMSG_97 327#define MP1_SMN_C2PMSG_97__CONTENT__SHIFT 0x0 328#define MP1_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 329//MP1_SMN_C2PMSG_98 330#define MP1_SMN_C2PMSG_98__CONTENT__SHIFT 0x0 331#define MP1_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 332//MP1_SMN_C2PMSG_99 333#define MP1_SMN_C2PMSG_99__CONTENT__SHIFT 0x0 334#define MP1_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 335//MP1_SMN_C2PMSG_100 336#define MP1_SMN_C2PMSG_100__CONTENT__SHIFT 0x0 337#define MP1_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 338//MP1_SMN_C2PMSG_101 339#define MP1_SMN_C2PMSG_101__CONTENT__SHIFT 0x0 340#define MP1_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 341//MP1_SMN_C2PMSG_102 342#define MP1_SMN_C2PMSG_102__CONTENT__SHIFT 0x0 343#define MP1_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 344//MP1_SMN_C2PMSG_103 345#define MP1_SMN_C2PMSG_103__CONTENT__SHIFT 0x0 346#define MP1_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 347//MP1_SMN_C2PMSG_104 348#define MP1_SMN_C2PMSG_104__CONTENT__SHIFT 0x0 349#define MP1_SMN_C2PMSG_104__CONTENT_MASK 0xFFFFFFFFL 350//MP1_SMN_C2PMSG_105 351#define MP1_SMN_C2PMSG_105__CONTENT__SHIFT 0x0 352#define MP1_SMN_C2PMSG_105__CONTENT_MASK 0xFFFFFFFFL 353//MP1_SMN_C2PMSG_106 354#define MP1_SMN_C2PMSG_106__CONTENT__SHIFT 0x0 355#define MP1_SMN_C2PMSG_106__CONTENT_MASK 0xFFFFFFFFL 356//MP1_SMN_C2PMSG_107 357#define MP1_SMN_C2PMSG_107__CONTENT__SHIFT 0x0 358#define MP1_SMN_C2PMSG_107__CONTENT_MASK 0xFFFFFFFFL 359//MP1_SMN_C2PMSG_108 360#define MP1_SMN_C2PMSG_108__CONTENT__SHIFT 0x0 361#define MP1_SMN_C2PMSG_108__CONTENT_MASK 0xFFFFFFFFL 362//MP1_SMN_C2PMSG_109 363#define MP1_SMN_C2PMSG_109__CONTENT__SHIFT 0x0 364#define MP1_SMN_C2PMSG_109__CONTENT_MASK 0xFFFFFFFFL 365//MP1_SMN_C2PMSG_110 366#define MP1_SMN_C2PMSG_110__CONTENT__SHIFT 0x0 367#define MP1_SMN_C2PMSG_110__CONTENT_MASK 0xFFFFFFFFL 368//MP1_SMN_C2PMSG_111 369#define MP1_SMN_C2PMSG_111__CONTENT__SHIFT 0x0 370#define MP1_SMN_C2PMSG_111__CONTENT_MASK 0xFFFFFFFFL 371//MP1_SMN_C2PMSG_112 372#define MP1_SMN_C2PMSG_112__CONTENT__SHIFT 0x0 373#define MP1_SMN_C2PMSG_112__CONTENT_MASK 0xFFFFFFFFL 374//MP1_SMN_C2PMSG_113 375#define MP1_SMN_C2PMSG_113__CONTENT__SHIFT 0x0 376#define MP1_SMN_C2PMSG_113__CONTENT_MASK 0xFFFFFFFFL 377//MP1_SMN_C2PMSG_114 378#define MP1_SMN_C2PMSG_114__CONTENT__SHIFT 0x0 379#define MP1_SMN_C2PMSG_114__CONTENT_MASK 0xFFFFFFFFL 380//MP1_SMN_C2PMSG_115 381#define MP1_SMN_C2PMSG_115__CONTENT__SHIFT 0x0 382#define MP1_SMN_C2PMSG_115__CONTENT_MASK 0xFFFFFFFFL 383//MP1_SMN_C2PMSG_116 384#define MP1_SMN_C2PMSG_116__CONTENT__SHIFT 0x0 385#define MP1_SMN_C2PMSG_116__CONTENT_MASK 0xFFFFFFFFL 386//MP1_SMN_C2PMSG_117 387#define MP1_SMN_C2PMSG_117__CONTENT__SHIFT 0x0 388#define MP1_SMN_C2PMSG_117__CONTENT_MASK 0xFFFFFFFFL 389//MP1_SMN_C2PMSG_118 390#define MP1_SMN_C2PMSG_118__CONTENT__SHIFT 0x0 391#define MP1_SMN_C2PMSG_118__CONTENT_MASK 0xFFFFFFFFL 392//MP1_SMN_C2PMSG_119 393#define MP1_SMN_C2PMSG_119__CONTENT__SHIFT 0x0 394#define MP1_SMN_C2PMSG_119__CONTENT_MASK 0xFFFFFFFFL 395//MP1_SMN_C2PMSG_120 396#define MP1_SMN_C2PMSG_120__CONTENT__SHIFT 0x0 397#define MP1_SMN_C2PMSG_120__CONTENT_MASK 0xFFFFFFFFL 398//MP1_SMN_C2PMSG_121 399#define MP1_SMN_C2PMSG_121__CONTENT__SHIFT 0x0 400#define MP1_SMN_C2PMSG_121__CONTENT_MASK 0xFFFFFFFFL 401//MP1_SMN_C2PMSG_122 402#define MP1_SMN_C2PMSG_122__CONTENT__SHIFT 0x0 403#define MP1_SMN_C2PMSG_122__CONTENT_MASK 0xFFFFFFFFL 404//MP1_SMN_C2PMSG_123 405#define MP1_SMN_C2PMSG_123__CONTENT__SHIFT 0x0 406#define MP1_SMN_C2PMSG_123__CONTENT_MASK 0xFFFFFFFFL 407//MP1_SMN_C2PMSG_124 408#define MP1_SMN_C2PMSG_124__CONTENT__SHIFT 0x0 409#define MP1_SMN_C2PMSG_124__CONTENT_MASK 0xFFFFFFFFL 410//MP1_SMN_C2PMSG_125 411#define MP1_SMN_C2PMSG_125__CONTENT__SHIFT 0x0 412#define MP1_SMN_C2PMSG_125__CONTENT_MASK 0xFFFFFFFFL 413//MP1_SMN_C2PMSG_126 414#define MP1_SMN_C2PMSG_126__CONTENT__SHIFT 0x0 415#define MP1_SMN_C2PMSG_126__CONTENT_MASK 0xFFFFFFFFL 416//MP1_SMN_C2PMSG_127 417#define MP1_SMN_C2PMSG_127__CONTENT__SHIFT 0x0 418#define MP1_SMN_C2PMSG_127__CONTENT_MASK 0xFFFFFFFFL 419//MP1_SMN_IH_CREDIT 420#define MP1_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 421#define MP1_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10 422#define MP1_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 423#define MP1_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 424//MP1_SMN_IH_SW_INT 425#define MP1_SMN_IH_SW_INT__ID__SHIFT 0x0 426#define MP1_SMN_IH_SW_INT__VALID__SHIFT 0x8 427#define MP1_SMN_IH_SW_INT__ID_MASK 0x000000FFL 428#define MP1_SMN_IH_SW_INT__VALID_MASK 0x00000100L 429//MP1_SMN_IH_SW_INT_CTRL 430#define MP1_SMN_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 431#define MP1_SMN_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 432#define MP1_SMN_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L 433#define MP1_SMN_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L 434//MP1_SMN_FPS_CNT 435#define MP1_SMN_FPS_CNT__COUNT__SHIFT 0x0 436#define MP1_SMN_FPS_CNT__COUNT_MASK 0xFFFFFFFFL 437//MP1_SMN_EXT_SCRATCH0 438#define MP1_SMN_EXT_SCRATCH0__DATA__SHIFT 0x0 439#define MP1_SMN_EXT_SCRATCH0__DATA_MASK 0xFFFFFFFFL 440//MP1_SMN_EXT_SCRATCH1 441#define MP1_SMN_EXT_SCRATCH1__DATA__SHIFT 0x0 442#define MP1_SMN_EXT_SCRATCH1__DATA_MASK 0xFFFFFFFFL 443//MP1_SMN_EXT_SCRATCH2 444#define MP1_SMN_EXT_SCRATCH2__DATA__SHIFT 0x0 445#define MP1_SMN_EXT_SCRATCH2__DATA_MASK 0xFFFFFFFFL 446//MP1_SMN_EXT_SCRATCH3 447#define MP1_SMN_EXT_SCRATCH3__DATA__SHIFT 0x0 448#define MP1_SMN_EXT_SCRATCH3__DATA_MASK 0xFFFFFFFFL 449//MP1_SMN_EXT_SCRATCH4 450#define MP1_SMN_EXT_SCRATCH4__DATA__SHIFT 0x0 451#define MP1_SMN_EXT_SCRATCH4__DATA_MASK 0xFFFFFFFFL 452//MP1_SMN_EXT_SCRATCH5 453#define MP1_SMN_EXT_SCRATCH5__DATA__SHIFT 0x0 454#define MP1_SMN_EXT_SCRATCH5__DATA_MASK 0xFFFFFFFFL 455//MP1_SMN_EXT_SCRATCH6 456#define MP1_SMN_EXT_SCRATCH6__DATA__SHIFT 0x0 457#define MP1_SMN_EXT_SCRATCH6__DATA_MASK 0xFFFFFFFFL 458//MP1_SMN_EXT_SCRATCH7 459#define MP1_SMN_EXT_SCRATCH7__DATA__SHIFT 0x0 460#define MP1_SMN_EXT_SCRATCH7__DATA_MASK 0xFFFFFFFFL 461//MP1_SMN_EXT_SCRATCH8 462#define MP1_SMN_EXT_SCRATCH8__DATA__SHIFT 0x0 463#define MP1_SMN_EXT_SCRATCH8__DATA_MASK 0xFFFFFFFFL 464//MP1_SMN_EXT_SCRATCH9 465#define MP1_SMN_EXT_SCRATCH9__DATA__SHIFT 0x0 466#define MP1_SMN_EXT_SCRATCH9__DATA_MASK 0xFFFFFFFFL 467//MP1_SMN_EXT_SCRATCH10 468#define MP1_SMN_EXT_SCRATCH10__DATA__SHIFT 0x0 469#define MP1_SMN_EXT_SCRATCH10__DATA_MASK 0xFFFFFFFFL 470//MP1_SMN_EXT_SCRATCH11 471#define MP1_SMN_EXT_SCRATCH11__DATA__SHIFT 0x0 472#define MP1_SMN_EXT_SCRATCH11__DATA_MASK 0xFFFFFFFFL 473//MP1_SMN_EXT_SCRATCH12 474#define MP1_SMN_EXT_SCRATCH12__DATA__SHIFT 0x0 475#define MP1_SMN_EXT_SCRATCH12__DATA_MASK 0xFFFFFFFFL 476//MP1_SMN_EXT_SCRATCH13 477#define MP1_SMN_EXT_SCRATCH13__DATA__SHIFT 0x0 478#define MP1_SMN_EXT_SCRATCH13__DATA_MASK 0xFFFFFFFFL 479//MP1_SMN_EXT_SCRATCH14 480#define MP1_SMN_EXT_SCRATCH14__DATA__SHIFT 0x0 481#define MP1_SMN_EXT_SCRATCH14__DATA_MASK 0xFFFFFFFFL 482//MP1_SMN_EXT_SCRATCH15 483#define MP1_SMN_EXT_SCRATCH15__DATA__SHIFT 0x0 484#define MP1_SMN_EXT_SCRATCH15__DATA_MASK 0xFFFFFFFFL 485//MP1_SMN_EXT_SCRATCH16 486#define MP1_SMN_EXT_SCRATCH16__DATA__SHIFT 0x0 487#define MP1_SMN_EXT_SCRATCH16__DATA_MASK 0xFFFFFFFFL 488//MP1_SMN_EXT_SCRATCH17 489#define MP1_SMN_EXT_SCRATCH17__DATA__SHIFT 0x0 490#define MP1_SMN_EXT_SCRATCH17__DATA_MASK 0xFFFFFFFFL 491//MP1_SMN_EXT_SCRATCH18 492#define MP1_SMN_EXT_SCRATCH18__DATA__SHIFT 0x0 493#define MP1_SMN_EXT_SCRATCH18__DATA_MASK 0xFFFFFFFFL 494//MP1_SMN_EXT_SCRATCH19 495#define MP1_SMN_EXT_SCRATCH19__DATA__SHIFT 0x0 496#define MP1_SMN_EXT_SCRATCH19__DATA_MASK 0xFFFFFFFFL 497//MP1_SMN_EXT_SCRATCH20 498#define MP1_SMN_EXT_SCRATCH20__DATA__SHIFT 0x0 499#define MP1_SMN_EXT_SCRATCH20__DATA_MASK 0xFFFFFFFFL 500//MP1_SMN_EXT_SCRATCH21 501#define MP1_SMN_EXT_SCRATCH21__DATA__SHIFT 0x0 502#define MP1_SMN_EXT_SCRATCH21__DATA_MASK 0xFFFFFFFFL 503//MP1_SMN_EXT_SCRATCH22 504#define MP1_SMN_EXT_SCRATCH22__DATA__SHIFT 0x0 505#define MP1_SMN_EXT_SCRATCH22__DATA_MASK 0xFFFFFFFFL 506//MP1_SMN_EXT_SCRATCH23 507#define MP1_SMN_EXT_SCRATCH23__DATA__SHIFT 0x0 508#define MP1_SMN_EXT_SCRATCH23__DATA_MASK 0xFFFFFFFFL 509//MP1_SMN_EXT_SCRATCH24 510#define MP1_SMN_EXT_SCRATCH24__DATA__SHIFT 0x0 511#define MP1_SMN_EXT_SCRATCH24__DATA_MASK 0xFFFFFFFFL 512//MP1_SMN_EXT_SCRATCH25 513#define MP1_SMN_EXT_SCRATCH25__DATA__SHIFT 0x0 514#define MP1_SMN_EXT_SCRATCH25__DATA_MASK 0xFFFFFFFFL 515//MP1_SMN_EXT_SCRATCH26 516#define MP1_SMN_EXT_SCRATCH26__DATA__SHIFT 0x0 517#define MP1_SMN_EXT_SCRATCH26__DATA_MASK 0xFFFFFFFFL 518//MP1_SMN_EXT_SCRATCH27 519#define MP1_SMN_EXT_SCRATCH27__DATA__SHIFT 0x0 520#define MP1_SMN_EXT_SCRATCH27__DATA_MASK 0xFFFFFFFFL 521//MP1_SMN_EXT_SCRATCH28 522#define MP1_SMN_EXT_SCRATCH28__DATA__SHIFT 0x0 523#define MP1_SMN_EXT_SCRATCH28__DATA_MASK 0xFFFFFFFFL 524//MP1_SMN_EXT_SCRATCH29 525#define MP1_SMN_EXT_SCRATCH29__DATA__SHIFT 0x0 526#define MP1_SMN_EXT_SCRATCH29__DATA_MASK 0xFFFFFFFFL 527//MP1_SMN_EXT_SCRATCH30 528#define MP1_SMN_EXT_SCRATCH30__DATA__SHIFT 0x0 529#define MP1_SMN_EXT_SCRATCH30__DATA_MASK 0xFFFFFFFFL 530//MP1_SMN_EXT_SCRATCH31 531#define MP1_SMN_EXT_SCRATCH31__DATA__SHIFT 0x0 532#define MP1_SMN_EXT_SCRATCH31__DATA_MASK 0xFFFFFFFFL 533 534#endif 535