1/*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef __AUDIO_TYPES_H__
27#define __AUDIO_TYPES_H__
28
29#include "signal_types.h"
30#include "fixed31_32.h"
31#include "dc_dp_types.h"
32
33#define AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS 20
34#define MAX_HW_AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS 18
35#define MULTI_CHANNEL_SPLIT_NO_ASSO_INFO 0xFFFFFFFF
36
37struct audio_dp_link_info {
38	uint32_t link_bandwidth_kbps;
39	uint32_t hblank_min_symbol_width;
40	enum dp_link_encoding encoding;
41	enum dc_link_rate link_rate;
42	enum dc_lane_count lane_count;
43	bool is_mst;
44};
45
46struct audio_crtc_info {
47	uint32_t h_total;
48	uint32_t h_active;
49	uint32_t v_active;
50	uint32_t pixel_repetition;
51	uint32_t requested_pixel_clock_100Hz; /* in 100Hz */
52	uint32_t calculated_pixel_clock_100Hz; /* in 100Hz */
53	uint32_t refresh_rate;
54	enum dc_color_depth color_depth;
55	enum dc_pixel_encoding pixel_encoding;
56	bool interlaced;
57	uint32_t dsc_bits_per_pixel;
58	uint32_t dsc_num_slices;
59};
60struct azalia_clock_info {
61	uint32_t pixel_clock_in_10khz;
62	uint32_t audio_dto_phase;
63	uint32_t audio_dto_module;
64	uint32_t audio_dto_wall_clock_ratio;
65};
66
67enum audio_dto_source {
68	DTO_SOURCE_UNKNOWN = 0,
69	DTO_SOURCE_ID0,
70	DTO_SOURCE_ID1,
71	DTO_SOURCE_ID2,
72	DTO_SOURCE_ID3,
73	DTO_SOURCE_ID4,
74	DTO_SOURCE_ID5
75};
76
77/* PLL information required for AZALIA DTO calculation */
78
79struct audio_pll_info {
80	uint32_t audio_dto_source_clock_in_khz;
81	uint32_t feed_back_divider;
82	enum audio_dto_source dto_source;
83	bool ss_enabled;
84	uint32_t ss_percentage;
85	uint32_t ss_percentage_divider;
86};
87
88struct audio_channel_associate_info {
89	union {
90		struct {
91			uint32_t ALL_CHANNEL_FL:4;
92			uint32_t ALL_CHANNEL_FR:4;
93			uint32_t ALL_CHANNEL_FC:4;
94			uint32_t ALL_CHANNEL_Sub:4;
95			uint32_t ALL_CHANNEL_SL:4;
96			uint32_t ALL_CHANNEL_SR:4;
97			uint32_t ALL_CHANNEL_BL:4;
98			uint32_t ALL_CHANNEL_BR:4;
99		} bits;
100		uint32_t u32all;
101	};
102};
103
104struct audio_output {
105	/* Front DIG id. */
106	enum engine_id engine_id;
107	/* encoder output signal */
108	enum signal_type signal;
109	/* video timing */
110	struct audio_crtc_info crtc_info;
111	/* DP link info */
112	struct audio_dp_link_info dp_link_info;
113	/* PLL for audio */
114	struct audio_pll_info pll_info;
115};
116
117enum audio_payload {
118	CHANNEL_SPLIT_MAPPINGCHANG = 0x9,
119};
120
121#endif /* __AUDIO_TYPES_H__ */
122