1// SPDX-License-Identifier: GPL-2.0+
2/*
3 *  comedi/drivers/ni_routing/ni_device_routes/pxi-6733.c
4 *  List of valid routes for specific NI boards.
5 *
6 *  COMEDI - Linux Control and Measurement Device Interface
7 *  Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu>
8 *
9 *  This program is free software; you can redistribute it and/or modify
10 *  it under the terms of the GNU General Public License as published by
11 *  the Free Software Foundation; either version 2 of the License, or
12 *  (at your option) any later version.
13 *
14 *  This program is distributed in the hope that it will be useful,
15 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *  GNU General Public License for more details.
18 */
19
20/*
21 * The contents of this file are generated using the tools in
22 * comedi/drivers/ni_routing/tools
23 *
24 * Please use those tools to help maintain the contents of this file.
25 */
26
27#include "../ni_device_routes.h"
28#include "all.h"
29
30struct ni_device_routes ni_pxi_6733_device_routes = {
31	.device = "pxi-6733",
32	.routes = (struct ni_route_set[]){
33		{
34			.dest = NI_PFI(3),
35			.src = (int[]){
36				NI_CtrSource(1),
37				0, /* Termination */
38			}
39		},
40		{
41			.dest = NI_PFI(4),
42			.src = (int[]){
43				NI_CtrGate(1),
44				0, /* Termination */
45			}
46		},
47		{
48			.dest = NI_PFI(5),
49			.src = (int[]){
50				NI_AO_SampleClock,
51				0, /* Termination */
52			}
53		},
54		{
55			.dest = NI_PFI(6),
56			.src = (int[]){
57				NI_AO_StartTrigger,
58				0, /* Termination */
59			}
60		},
61		{
62			.dest = NI_PFI(8),
63			.src = (int[]){
64				NI_CtrSource(0),
65				0, /* Termination */
66			}
67		},
68		{
69			.dest = NI_PFI(9),
70			.src = (int[]){
71				NI_CtrGate(0),
72				0, /* Termination */
73			}
74		},
75		{
76			.dest = TRIGGER_LINE(0),
77			.src = (int[]){
78				NI_CtrSource(0),
79				NI_CtrGate(0),
80				NI_CtrInternalOutput(0),
81				NI_CtrOut(0),
82				NI_AO_SampleClock,
83				NI_AO_StartTrigger,
84				0, /* Termination */
85			}
86		},
87		{
88			.dest = TRIGGER_LINE(1),
89			.src = (int[]){
90				NI_CtrSource(0),
91				NI_CtrGate(0),
92				NI_CtrInternalOutput(0),
93				NI_CtrOut(0),
94				NI_AO_SampleClock,
95				NI_AO_StartTrigger,
96				0, /* Termination */
97			}
98		},
99		{
100			.dest = TRIGGER_LINE(2),
101			.src = (int[]){
102				NI_CtrSource(0),
103				NI_CtrGate(0),
104				NI_CtrInternalOutput(0),
105				NI_CtrOut(0),
106				NI_AO_SampleClock,
107				NI_AO_StartTrigger,
108				0, /* Termination */
109			}
110		},
111		{
112			.dest = TRIGGER_LINE(3),
113			.src = (int[]){
114				NI_CtrSource(0),
115				NI_CtrGate(0),
116				NI_CtrInternalOutput(0),
117				NI_CtrOut(0),
118				NI_AO_SampleClock,
119				NI_AO_StartTrigger,
120				0, /* Termination */
121			}
122		},
123		{
124			.dest = TRIGGER_LINE(4),
125			.src = (int[]){
126				NI_CtrSource(0),
127				NI_CtrGate(0),
128				NI_CtrInternalOutput(0),
129				NI_CtrOut(0),
130				NI_AO_SampleClock,
131				NI_AO_StartTrigger,
132				0, /* Termination */
133			}
134		},
135		{
136			.dest = TRIGGER_LINE(5),
137			.src = (int[]){
138				NI_CtrSource(0),
139				NI_CtrGate(0),
140				NI_CtrInternalOutput(0),
141				NI_CtrOut(0),
142				NI_AO_SampleClock,
143				NI_AO_StartTrigger,
144				0, /* Termination */
145			}
146		},
147		{
148			.dest = TRIGGER_LINE(7),
149			.src = (int[]){
150				NI_20MHzTimebase,
151				0, /* Termination */
152			}
153		},
154		{
155			.dest = NI_CtrSource(0),
156			.src = (int[]){
157				NI_PFI(0),
158				NI_PFI(1),
159				NI_PFI(2),
160				NI_PFI(3),
161				NI_PFI(4),
162				NI_PFI(5),
163				NI_PFI(6),
164				NI_PFI(7),
165				NI_PFI(8),
166				NI_PFI(9),
167				TRIGGER_LINE(0),
168				TRIGGER_LINE(1),
169				TRIGGER_LINE(2),
170				TRIGGER_LINE(3),
171				TRIGGER_LINE(4),
172				TRIGGER_LINE(5),
173				TRIGGER_LINE(7),
174				PXI_Star,
175				NI_MasterTimebase,
176				NI_20MHzTimebase,
177				NI_100kHzTimebase,
178				0, /* Termination */
179			}
180		},
181		{
182			.dest = NI_CtrSource(1),
183			.src = (int[]){
184				NI_PFI(0),
185				NI_PFI(1),
186				NI_PFI(2),
187				NI_PFI(3),
188				NI_PFI(4),
189				NI_PFI(5),
190				NI_PFI(6),
191				NI_PFI(7),
192				NI_PFI(8),
193				NI_PFI(9),
194				TRIGGER_LINE(0),
195				TRIGGER_LINE(1),
196				TRIGGER_LINE(2),
197				TRIGGER_LINE(3),
198				TRIGGER_LINE(4),
199				TRIGGER_LINE(5),
200				TRIGGER_LINE(7),
201				PXI_Star,
202				NI_MasterTimebase,
203				NI_20MHzTimebase,
204				NI_100kHzTimebase,
205				0, /* Termination */
206			}
207		},
208		{
209			.dest = NI_CtrGate(0),
210			.src = (int[]){
211				NI_PFI(0),
212				NI_PFI(1),
213				NI_PFI(2),
214				NI_PFI(3),
215				NI_PFI(4),
216				NI_PFI(5),
217				NI_PFI(6),
218				NI_PFI(7),
219				NI_PFI(8),
220				NI_PFI(9),
221				TRIGGER_LINE(0),
222				TRIGGER_LINE(1),
223				TRIGGER_LINE(2),
224				TRIGGER_LINE(3),
225				TRIGGER_LINE(4),
226				TRIGGER_LINE(5),
227				NI_CtrInternalOutput(1),
228				PXI_Star,
229				0, /* Termination */
230			}
231		},
232		{
233			.dest = NI_CtrGate(1),
234			.src = (int[]){
235				NI_PFI(0),
236				NI_PFI(1),
237				NI_PFI(2),
238				NI_PFI(3),
239				NI_PFI(4),
240				NI_PFI(5),
241				NI_PFI(6),
242				NI_PFI(7),
243				NI_PFI(8),
244				NI_PFI(9),
245				TRIGGER_LINE(0),
246				TRIGGER_LINE(1),
247				TRIGGER_LINE(2),
248				TRIGGER_LINE(3),
249				TRIGGER_LINE(4),
250				TRIGGER_LINE(5),
251				NI_CtrInternalOutput(0),
252				PXI_Star,
253				0, /* Termination */
254			}
255		},
256		{
257			.dest = NI_CtrOut(0),
258			.src = (int[]){
259				TRIGGER_LINE(0),
260				TRIGGER_LINE(1),
261				TRIGGER_LINE(2),
262				TRIGGER_LINE(3),
263				TRIGGER_LINE(4),
264				TRIGGER_LINE(5),
265				NI_CtrInternalOutput(0),
266				PXI_Star,
267				0, /* Termination */
268			}
269		},
270		{
271			.dest = NI_CtrOut(1),
272			.src = (int[]){
273				NI_CtrInternalOutput(1),
274				0, /* Termination */
275			}
276		},
277		{
278			.dest = PXI_Star,
279			.src = (int[]){
280				NI_CtrSource(0),
281				NI_CtrGate(0),
282				NI_CtrInternalOutput(0),
283				NI_CtrOut(0),
284				NI_AO_SampleClock,
285				NI_AO_StartTrigger,
286				0, /* Termination */
287			}
288		},
289		{
290			.dest = NI_AO_SampleClock,
291			.src = (int[]){
292				NI_PFI(0),
293				NI_PFI(1),
294				NI_PFI(2),
295				NI_PFI(3),
296				NI_PFI(4),
297				NI_PFI(5),
298				NI_PFI(6),
299				NI_PFI(7),
300				NI_PFI(8),
301				NI_PFI(9),
302				TRIGGER_LINE(0),
303				TRIGGER_LINE(1),
304				TRIGGER_LINE(2),
305				TRIGGER_LINE(3),
306				TRIGGER_LINE(4),
307				TRIGGER_LINE(5),
308				NI_CtrInternalOutput(1),
309				PXI_Star,
310				NI_AO_SampleClockTimebase,
311				0, /* Termination */
312			}
313		},
314		{
315			.dest = NI_AO_SampleClockTimebase,
316			.src = (int[]){
317				NI_PFI(0),
318				NI_PFI(1),
319				NI_PFI(2),
320				NI_PFI(3),
321				NI_PFI(4),
322				NI_PFI(5),
323				NI_PFI(6),
324				NI_PFI(7),
325				NI_PFI(8),
326				NI_PFI(9),
327				TRIGGER_LINE(0),
328				TRIGGER_LINE(1),
329				TRIGGER_LINE(2),
330				TRIGGER_LINE(3),
331				TRIGGER_LINE(4),
332				TRIGGER_LINE(5),
333				TRIGGER_LINE(7),
334				PXI_Star,
335				NI_MasterTimebase,
336				NI_20MHzTimebase,
337				NI_100kHzTimebase,
338				0, /* Termination */
339			}
340		},
341		{
342			.dest = NI_AO_StartTrigger,
343			.src = (int[]){
344				NI_PFI(0),
345				NI_PFI(1),
346				NI_PFI(2),
347				NI_PFI(3),
348				NI_PFI(4),
349				NI_PFI(5),
350				NI_PFI(6),
351				NI_PFI(7),
352				NI_PFI(8),
353				NI_PFI(9),
354				TRIGGER_LINE(0),
355				TRIGGER_LINE(1),
356				TRIGGER_LINE(2),
357				TRIGGER_LINE(3),
358				TRIGGER_LINE(4),
359				TRIGGER_LINE(5),
360				PXI_Star,
361				0, /* Termination */
362			}
363		},
364		{
365			.dest = NI_AO_PauseTrigger,
366			.src = (int[]){
367				NI_PFI(0),
368				NI_PFI(1),
369				NI_PFI(2),
370				NI_PFI(3),
371				NI_PFI(4),
372				NI_PFI(5),
373				NI_PFI(6),
374				NI_PFI(7),
375				NI_PFI(8),
376				NI_PFI(9),
377				TRIGGER_LINE(0),
378				TRIGGER_LINE(1),
379				TRIGGER_LINE(2),
380				TRIGGER_LINE(3),
381				TRIGGER_LINE(4),
382				TRIGGER_LINE(5),
383				PXI_Star,
384				0, /* Termination */
385			}
386		},
387		{
388			.dest = NI_DI_SampleClock,
389			.src = (int[]){
390				TRIGGER_LINE(0),
391				TRIGGER_LINE(1),
392				TRIGGER_LINE(2),
393				TRIGGER_LINE(3),
394				TRIGGER_LINE(4),
395				TRIGGER_LINE(5),
396				PXI_Star,
397				NI_AO_SampleClock,
398				0, /* Termination */
399			}
400		},
401		{
402			.dest = NI_DO_SampleClock,
403			.src = (int[]){
404				TRIGGER_LINE(0),
405				TRIGGER_LINE(1),
406				TRIGGER_LINE(2),
407				TRIGGER_LINE(3),
408				TRIGGER_LINE(4),
409				TRIGGER_LINE(5),
410				PXI_Star,
411				NI_AO_SampleClock,
412				0, /* Termination */
413			}
414		},
415		{
416			.dest = NI_MasterTimebase,
417			.src = (int[]){
418				TRIGGER_LINE(7),
419				NI_20MHzTimebase,
420				0, /* Termination */
421			}
422		},
423		{ /* Termination of list */
424			.dest = 0,
425		},
426	},
427};
428