1/* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2016-2018 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8/************************************ 9 ** This is an auto-generated file ** 10 ** DO NOT EDIT BELOW ** 11 ************************************/ 12 13#ifndef ASIC_REG_TPC0_CFG_REGS_H_ 14#define ASIC_REG_TPC0_CFG_REGS_H_ 15 16/* 17 ***************************************** 18 * TPC0_CFG (Prototype: TPC) 19 ***************************************** 20 */ 21 22#define mmTPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW 0xE06400 23 24#define mmTPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH 0xE06404 25 26#define mmTPC0_CFG_KERNEL_TENSOR_0_PADDING_VALUE 0xE06408 27 28#define mmTPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG 0xE0640C 29 30#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_0_SIZE 0xE06410 31 32#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_0_STRIDE 0xE06414 33 34#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_0_BASE_OFFSET 0xE06418 35 36#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_1_SIZE 0xE0641C 37 38#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_1_STRIDE 0xE06420 39 40#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_1_BASE_OFFSET 0xE06424 41 42#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_2_SIZE 0xE06428 43 44#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_2_STRIDE 0xE0642C 45 46#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_2_BASE_OFFSET 0xE06430 47 48#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_3_SIZE 0xE06434 49 50#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_3_STRIDE 0xE06438 51 52#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_3_BASE_OFFSET 0xE0643C 53 54#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_4_SIZE 0xE06440 55 56#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_4_STRIDE 0xE06444 57 58#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_4_BASE_OFFSET 0xE06448 59 60#define mmTPC0_CFG_KERNEL_TENSOR_1_BASE_ADDR_LOW 0xE0644C 61 62#define mmTPC0_CFG_KERNEL_TENSOR_1_BASE_ADDR_HIGH 0xE06450 63 64#define mmTPC0_CFG_KERNEL_TENSOR_1_PADDING_VALUE 0xE06454 65 66#define mmTPC0_CFG_KERNEL_TENSOR_1_TENSOR_CONFIG 0xE06458 67 68#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_0_SIZE 0xE0645C 69 70#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_0_STRIDE 0xE06460 71 72#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_0_BASE_OFFSET 0xE06464 73 74#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_1_SIZE 0xE06468 75 76#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_1_STRIDE 0xE0646C 77 78#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_1_BASE_OFFSET 0xE06470 79 80#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_2_SIZE 0xE06474 81 82#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_2_STRIDE 0xE06478 83 84#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_2_BASE_OFFSET 0xE0647C 85 86#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_3_SIZE 0xE06480 87 88#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_3_STRIDE 0xE06484 89 90#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_3_BASE_OFFSET 0xE06488 91 92#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_4_SIZE 0xE0648C 93 94#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_4_STRIDE 0xE06490 95 96#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_4_BASE_OFFSET 0xE06494 97 98#define mmTPC0_CFG_KERNEL_TENSOR_2_BASE_ADDR_LOW 0xE06498 99 100#define mmTPC0_CFG_KERNEL_TENSOR_2_BASE_ADDR_HIGH 0xE0649C 101 102#define mmTPC0_CFG_KERNEL_TENSOR_2_PADDING_VALUE 0xE064A0 103 104#define mmTPC0_CFG_KERNEL_TENSOR_2_TENSOR_CONFIG 0xE064A4 105 106#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_0_SIZE 0xE064A8 107 108#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_0_STRIDE 0xE064AC 109 110#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_0_BASE_OFFSET 0xE064B0 111 112#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_1_SIZE 0xE064B4 113 114#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_1_STRIDE 0xE064B8 115 116#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_1_BASE_OFFSET 0xE064BC 117 118#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_2_SIZE 0xE064C0 119 120#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_2_STRIDE 0xE064C4 121 122#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_2_BASE_OFFSET 0xE064C8 123 124#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_3_SIZE 0xE064CC 125 126#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_3_STRIDE 0xE064D0 127 128#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_3_BASE_OFFSET 0xE064D4 129 130#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_4_SIZE 0xE064D8 131 132#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_4_STRIDE 0xE064DC 133 134#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_4_BASE_OFFSET 0xE064E0 135 136#define mmTPC0_CFG_KERNEL_TENSOR_3_BASE_ADDR_LOW 0xE064E4 137 138#define mmTPC0_CFG_KERNEL_TENSOR_3_BASE_ADDR_HIGH 0xE064E8 139 140#define mmTPC0_CFG_KERNEL_TENSOR_3_PADDING_VALUE 0xE064EC 141 142#define mmTPC0_CFG_KERNEL_TENSOR_3_TENSOR_CONFIG 0xE064F0 143 144#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_0_SIZE 0xE064F4 145 146#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_0_STRIDE 0xE064F8 147 148#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_0_BASE_OFFSET 0xE064FC 149 150#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_1_SIZE 0xE06500 151 152#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_1_STRIDE 0xE06504 153 154#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_1_BASE_OFFSET 0xE06508 155 156#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_2_SIZE 0xE0650C 157 158#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_2_STRIDE 0xE06510 159 160#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_2_BASE_OFFSET 0xE06514 161 162#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_3_SIZE 0xE06518 163 164#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_3_STRIDE 0xE0651C 165 166#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_3_BASE_OFFSET 0xE06520 167 168#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_4_SIZE 0xE06524 169 170#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_4_STRIDE 0xE06528 171 172#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_4_BASE_OFFSET 0xE0652C 173 174#define mmTPC0_CFG_KERNEL_TENSOR_4_BASE_ADDR_LOW 0xE06530 175 176#define mmTPC0_CFG_KERNEL_TENSOR_4_BASE_ADDR_HIGH 0xE06534 177 178#define mmTPC0_CFG_KERNEL_TENSOR_4_PADDING_VALUE 0xE06538 179 180#define mmTPC0_CFG_KERNEL_TENSOR_4_TENSOR_CONFIG 0xE0653C 181 182#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_0_SIZE 0xE06540 183 184#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_0_STRIDE 0xE06544 185 186#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_0_BASE_OFFSET 0xE06548 187 188#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_1_SIZE 0xE0654C 189 190#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_1_STRIDE 0xE06550 191 192#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_1_BASE_OFFSET 0xE06554 193 194#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_2_SIZE 0xE06558 195 196#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_2_STRIDE 0xE0655C 197 198#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_2_BASE_OFFSET 0xE06560 199 200#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_3_SIZE 0xE06564 201 202#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_3_STRIDE 0xE06568 203 204#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_3_BASE_OFFSET 0xE0656C 205 206#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_4_SIZE 0xE06570 207 208#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_4_STRIDE 0xE06574 209 210#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_4_BASE_OFFSET 0xE06578 211 212#define mmTPC0_CFG_KERNEL_TENSOR_5_BASE_ADDR_LOW 0xE0657C 213 214#define mmTPC0_CFG_KERNEL_TENSOR_5_BASE_ADDR_HIGH 0xE06580 215 216#define mmTPC0_CFG_KERNEL_TENSOR_5_PADDING_VALUE 0xE06584 217 218#define mmTPC0_CFG_KERNEL_TENSOR_5_TENSOR_CONFIG 0xE06588 219 220#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_0_SIZE 0xE0658C 221 222#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_0_STRIDE 0xE06590 223 224#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_0_BASE_OFFSET 0xE06594 225 226#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_1_SIZE 0xE06598 227 228#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_1_STRIDE 0xE0659C 229 230#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_1_BASE_OFFSET 0xE065A0 231 232#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_2_SIZE 0xE065A4 233 234#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_2_STRIDE 0xE065A8 235 236#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_2_BASE_OFFSET 0xE065AC 237 238#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_3_SIZE 0xE065B0 239 240#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_3_STRIDE 0xE065B4 241 242#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_3_BASE_OFFSET 0xE065B8 243 244#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_4_SIZE 0xE065BC 245 246#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_4_STRIDE 0xE065C0 247 248#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_4_BASE_OFFSET 0xE065C4 249 250#define mmTPC0_CFG_KERNEL_TENSOR_6_BASE_ADDR_LOW 0xE065C8 251 252#define mmTPC0_CFG_KERNEL_TENSOR_6_BASE_ADDR_HIGH 0xE065CC 253 254#define mmTPC0_CFG_KERNEL_TENSOR_6_PADDING_VALUE 0xE065D0 255 256#define mmTPC0_CFG_KERNEL_TENSOR_6_TENSOR_CONFIG 0xE065D4 257 258#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_0_SIZE 0xE065D8 259 260#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_0_STRIDE 0xE065DC 261 262#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_0_BASE_OFFSET 0xE065E0 263 264#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_1_SIZE 0xE065E4 265 266#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_1_STRIDE 0xE065E8 267 268#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_1_BASE_OFFSET 0xE065EC 269 270#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_2_SIZE 0xE065F0 271 272#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_2_STRIDE 0xE065F4 273 274#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_2_BASE_OFFSET 0xE065F8 275 276#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_3_SIZE 0xE065FC 277 278#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_3_STRIDE 0xE06600 279 280#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_3_BASE_OFFSET 0xE06604 281 282#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_4_SIZE 0xE06608 283 284#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_4_STRIDE 0xE0660C 285 286#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_4_BASE_OFFSET 0xE06610 287 288#define mmTPC0_CFG_KERNEL_TENSOR_7_BASE_ADDR_LOW 0xE06614 289 290#define mmTPC0_CFG_KERNEL_TENSOR_7_BASE_ADDR_HIGH 0xE06618 291 292#define mmTPC0_CFG_KERNEL_TENSOR_7_PADDING_VALUE 0xE0661C 293 294#define mmTPC0_CFG_KERNEL_TENSOR_7_TENSOR_CONFIG 0xE06620 295 296#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_0_SIZE 0xE06624 297 298#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_0_STRIDE 0xE06628 299 300#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_0_BASE_OFFSET 0xE0662C 301 302#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_1_SIZE 0xE06630 303 304#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_1_STRIDE 0xE06634 305 306#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_1_BASE_OFFSET 0xE06638 307 308#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_2_SIZE 0xE0663C 309 310#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_2_STRIDE 0xE06640 311 312#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_2_BASE_OFFSET 0xE06644 313 314#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_3_SIZE 0xE06648 315 316#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_3_STRIDE 0xE0664C 317 318#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_3_BASE_OFFSET 0xE06650 319 320#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_4_SIZE 0xE06654 321 322#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_4_STRIDE 0xE06658 323 324#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_4_BASE_OFFSET 0xE0665C 325 326#define mmTPC0_CFG_KERNEL_KERNEL_BASE_ADDRESS_LOW 0xE06660 327 328#define mmTPC0_CFG_KERNEL_KERNEL_BASE_ADDRESS_HIGH 0xE06664 329 330#define mmTPC0_CFG_KERNEL_TID_BASE_DIM_0 0xE06668 331 332#define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_0 0xE0666C 333 334#define mmTPC0_CFG_KERNEL_TID_BASE_DIM_1 0xE06670 335 336#define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_1 0xE06674 337 338#define mmTPC0_CFG_KERNEL_TID_BASE_DIM_2 0xE06678 339 340#define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_2 0xE0667C 341 342#define mmTPC0_CFG_KERNEL_TID_BASE_DIM_3 0xE06680 343 344#define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_3 0xE06684 345 346#define mmTPC0_CFG_KERNEL_TID_BASE_DIM_4 0xE06688 347 348#define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_4 0xE0668C 349 350#define mmTPC0_CFG_KERNEL_SRF_0 0xE06690 351 352#define mmTPC0_CFG_KERNEL_SRF_1 0xE06694 353 354#define mmTPC0_CFG_KERNEL_SRF_2 0xE06698 355 356#define mmTPC0_CFG_KERNEL_SRF_3 0xE0669C 357 358#define mmTPC0_CFG_KERNEL_SRF_4 0xE066A0 359 360#define mmTPC0_CFG_KERNEL_SRF_5 0xE066A4 361 362#define mmTPC0_CFG_KERNEL_SRF_6 0xE066A8 363 364#define mmTPC0_CFG_KERNEL_SRF_7 0xE066AC 365 366#define mmTPC0_CFG_KERNEL_SRF_8 0xE066B0 367 368#define mmTPC0_CFG_KERNEL_SRF_9 0xE066B4 369 370#define mmTPC0_CFG_KERNEL_SRF_10 0xE066B8 371 372#define mmTPC0_CFG_KERNEL_SRF_11 0xE066BC 373 374#define mmTPC0_CFG_KERNEL_SRF_12 0xE066C0 375 376#define mmTPC0_CFG_KERNEL_SRF_13 0xE066C4 377 378#define mmTPC0_CFG_KERNEL_SRF_14 0xE066C8 379 380#define mmTPC0_CFG_KERNEL_SRF_15 0xE066CC 381 382#define mmTPC0_CFG_KERNEL_SRF_16 0xE066D0 383 384#define mmTPC0_CFG_KERNEL_SRF_17 0xE066D4 385 386#define mmTPC0_CFG_KERNEL_SRF_18 0xE066D8 387 388#define mmTPC0_CFG_KERNEL_SRF_19 0xE066DC 389 390#define mmTPC0_CFG_KERNEL_SRF_20 0xE066E0 391 392#define mmTPC0_CFG_KERNEL_SRF_21 0xE066E4 393 394#define mmTPC0_CFG_KERNEL_SRF_22 0xE066E8 395 396#define mmTPC0_CFG_KERNEL_SRF_23 0xE066EC 397 398#define mmTPC0_CFG_KERNEL_SRF_24 0xE066F0 399 400#define mmTPC0_CFG_KERNEL_SRF_25 0xE066F4 401 402#define mmTPC0_CFG_KERNEL_SRF_26 0xE066F8 403 404#define mmTPC0_CFG_KERNEL_SRF_27 0xE066FC 405 406#define mmTPC0_CFG_KERNEL_SRF_28 0xE06700 407 408#define mmTPC0_CFG_KERNEL_SRF_29 0xE06704 409 410#define mmTPC0_CFG_KERNEL_SRF_30 0xE06708 411 412#define mmTPC0_CFG_KERNEL_SRF_31 0xE0670C 413 414#define mmTPC0_CFG_KERNEL_KERNEL_CONFIG 0xE06710 415 416#define mmTPC0_CFG_KERNEL_SYNC_OBJECT_MESSAGE 0xE06714 417 418#define mmTPC0_CFG_RESERVED_DESC_END 0xE06738 419 420#define mmTPC0_CFG_ROUND_CSR 0xE067FC 421 422#define mmTPC0_CFG_TBUF_BASE_ADDR_LOW 0xE06800 423 424#define mmTPC0_CFG_TBUF_BASE_ADDR_HIGH 0xE06804 425 426#define mmTPC0_CFG_SEMAPHORE 0xE06808 427 428#define mmTPC0_CFG_VFLAGS 0xE0680C 429 430#define mmTPC0_CFG_SFLAGS 0xE06810 431 432#define mmTPC0_CFG_LFSR_POLYNOM 0xE06818 433 434#define mmTPC0_CFG_STATUS 0xE0681C 435 436#define mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH 0xE06820 437 438#define mmTPC0_CFG_CFG_SUBTRACT_VALUE 0xE06824 439 440#define mmTPC0_CFG_SM_BASE_ADDRESS_LOW 0xE06828 441 442#define mmTPC0_CFG_SM_BASE_ADDRESS_HIGH 0xE0682C 443 444#define mmTPC0_CFG_TPC_CMD 0xE06830 445 446#define mmTPC0_CFG_TPC_EXECUTE 0xE06838 447 448#define mmTPC0_CFG_TPC_STALL 0xE0683C 449 450#define mmTPC0_CFG_ICACHE_BASE_ADDERESS_LOW 0xE06840 451 452#define mmTPC0_CFG_ICACHE_BASE_ADDERESS_HIGH 0xE06844 453 454#define mmTPC0_CFG_MSS_CONFIG 0xE06854 455 456#define mmTPC0_CFG_TPC_INTR_CAUSE 0xE06858 457 458#define mmTPC0_CFG_TPC_INTR_MASK 0xE0685C 459 460#define mmTPC0_CFG_TSB_CONFIG 0xE06860 461 462#define mmTPC0_CFG_QM_TENSOR_0_BASE_ADDR_LOW 0xE06A00 463 464#define mmTPC0_CFG_QM_TENSOR_0_BASE_ADDR_HIGH 0xE06A04 465 466#define mmTPC0_CFG_QM_TENSOR_0_PADDING_VALUE 0xE06A08 467 468#define mmTPC0_CFG_QM_TENSOR_0_TENSOR_CONFIG 0xE06A0C 469 470#define mmTPC0_CFG_QM_TENSOR_0_DIM_0_SIZE 0xE06A10 471 472#define mmTPC0_CFG_QM_TENSOR_0_DIM_0_STRIDE 0xE06A14 473 474#define mmTPC0_CFG_QM_TENSOR_0_DIM_0_BASE_OFFSET 0xE06A18 475 476#define mmTPC0_CFG_QM_TENSOR_0_DIM_1_SIZE 0xE06A1C 477 478#define mmTPC0_CFG_QM_TENSOR_0_DIM_1_STRIDE 0xE06A20 479 480#define mmTPC0_CFG_QM_TENSOR_0_DIM_1_BASE_OFFSET 0xE06A24 481 482#define mmTPC0_CFG_QM_TENSOR_0_DIM_2_SIZE 0xE06A28 483 484#define mmTPC0_CFG_QM_TENSOR_0_DIM_2_STRIDE 0xE06A2C 485 486#define mmTPC0_CFG_QM_TENSOR_0_DIM_2_BASE_OFFSET 0xE06A30 487 488#define mmTPC0_CFG_QM_TENSOR_0_DIM_3_SIZE 0xE06A34 489 490#define mmTPC0_CFG_QM_TENSOR_0_DIM_3_STRIDE 0xE06A38 491 492#define mmTPC0_CFG_QM_TENSOR_0_DIM_3_BASE_OFFSET 0xE06A3C 493 494#define mmTPC0_CFG_QM_TENSOR_0_DIM_4_SIZE 0xE06A40 495 496#define mmTPC0_CFG_QM_TENSOR_0_DIM_4_STRIDE 0xE06A44 497 498#define mmTPC0_CFG_QM_TENSOR_0_DIM_4_BASE_OFFSET 0xE06A48 499 500#define mmTPC0_CFG_QM_TENSOR_1_BASE_ADDR_LOW 0xE06A4C 501 502#define mmTPC0_CFG_QM_TENSOR_1_BASE_ADDR_HIGH 0xE06A50 503 504#define mmTPC0_CFG_QM_TENSOR_1_PADDING_VALUE 0xE06A54 505 506#define mmTPC0_CFG_QM_TENSOR_1_TENSOR_CONFIG 0xE06A58 507 508#define mmTPC0_CFG_QM_TENSOR_1_DIM_0_SIZE 0xE06A5C 509 510#define mmTPC0_CFG_QM_TENSOR_1_DIM_0_STRIDE 0xE06A60 511 512#define mmTPC0_CFG_QM_TENSOR_1_DIM_0_BASE_OFFSET 0xE06A64 513 514#define mmTPC0_CFG_QM_TENSOR_1_DIM_1_SIZE 0xE06A68 515 516#define mmTPC0_CFG_QM_TENSOR_1_DIM_1_STRIDE 0xE06A6C 517 518#define mmTPC0_CFG_QM_TENSOR_1_DIM_1_BASE_OFFSET 0xE06A70 519 520#define mmTPC0_CFG_QM_TENSOR_1_DIM_2_SIZE 0xE06A74 521 522#define mmTPC0_CFG_QM_TENSOR_1_DIM_2_STRIDE 0xE06A78 523 524#define mmTPC0_CFG_QM_TENSOR_1_DIM_2_BASE_OFFSET 0xE06A7C 525 526#define mmTPC0_CFG_QM_TENSOR_1_DIM_3_SIZE 0xE06A80 527 528#define mmTPC0_CFG_QM_TENSOR_1_DIM_3_STRIDE 0xE06A84 529 530#define mmTPC0_CFG_QM_TENSOR_1_DIM_3_BASE_OFFSET 0xE06A88 531 532#define mmTPC0_CFG_QM_TENSOR_1_DIM_4_SIZE 0xE06A8C 533 534#define mmTPC0_CFG_QM_TENSOR_1_DIM_4_STRIDE 0xE06A90 535 536#define mmTPC0_CFG_QM_TENSOR_1_DIM_4_BASE_OFFSET 0xE06A94 537 538#define mmTPC0_CFG_QM_TENSOR_2_BASE_ADDR_LOW 0xE06A98 539 540#define mmTPC0_CFG_QM_TENSOR_2_BASE_ADDR_HIGH 0xE06A9C 541 542#define mmTPC0_CFG_QM_TENSOR_2_PADDING_VALUE 0xE06AA0 543 544#define mmTPC0_CFG_QM_TENSOR_2_TENSOR_CONFIG 0xE06AA4 545 546#define mmTPC0_CFG_QM_TENSOR_2_DIM_0_SIZE 0xE06AA8 547 548#define mmTPC0_CFG_QM_TENSOR_2_DIM_0_STRIDE 0xE06AAC 549 550#define mmTPC0_CFG_QM_TENSOR_2_DIM_0_BASE_OFFSET 0xE06AB0 551 552#define mmTPC0_CFG_QM_TENSOR_2_DIM_1_SIZE 0xE06AB4 553 554#define mmTPC0_CFG_QM_TENSOR_2_DIM_1_STRIDE 0xE06AB8 555 556#define mmTPC0_CFG_QM_TENSOR_2_DIM_1_BASE_OFFSET 0xE06ABC 557 558#define mmTPC0_CFG_QM_TENSOR_2_DIM_2_SIZE 0xE06AC0 559 560#define mmTPC0_CFG_QM_TENSOR_2_DIM_2_STRIDE 0xE06AC4 561 562#define mmTPC0_CFG_QM_TENSOR_2_DIM_2_BASE_OFFSET 0xE06AC8 563 564#define mmTPC0_CFG_QM_TENSOR_2_DIM_3_SIZE 0xE06ACC 565 566#define mmTPC0_CFG_QM_TENSOR_2_DIM_3_STRIDE 0xE06AD0 567 568#define mmTPC0_CFG_QM_TENSOR_2_DIM_3_BASE_OFFSET 0xE06AD4 569 570#define mmTPC0_CFG_QM_TENSOR_2_DIM_4_SIZE 0xE06AD8 571 572#define mmTPC0_CFG_QM_TENSOR_2_DIM_4_STRIDE 0xE06ADC 573 574#define mmTPC0_CFG_QM_TENSOR_2_DIM_4_BASE_OFFSET 0xE06AE0 575 576#define mmTPC0_CFG_QM_TENSOR_3_BASE_ADDR_LOW 0xE06AE4 577 578#define mmTPC0_CFG_QM_TENSOR_3_BASE_ADDR_HIGH 0xE06AE8 579 580#define mmTPC0_CFG_QM_TENSOR_3_PADDING_VALUE 0xE06AEC 581 582#define mmTPC0_CFG_QM_TENSOR_3_TENSOR_CONFIG 0xE06AF0 583 584#define mmTPC0_CFG_QM_TENSOR_3_DIM_0_SIZE 0xE06AF4 585 586#define mmTPC0_CFG_QM_TENSOR_3_DIM_0_STRIDE 0xE06AF8 587 588#define mmTPC0_CFG_QM_TENSOR_3_DIM_0_BASE_OFFSET 0xE06AFC 589 590#define mmTPC0_CFG_QM_TENSOR_3_DIM_1_SIZE 0xE06B00 591 592#define mmTPC0_CFG_QM_TENSOR_3_DIM_1_STRIDE 0xE06B04 593 594#define mmTPC0_CFG_QM_TENSOR_3_DIM_1_BASE_OFFSET 0xE06B08 595 596#define mmTPC0_CFG_QM_TENSOR_3_DIM_2_SIZE 0xE06B0C 597 598#define mmTPC0_CFG_QM_TENSOR_3_DIM_2_STRIDE 0xE06B10 599 600#define mmTPC0_CFG_QM_TENSOR_3_DIM_2_BASE_OFFSET 0xE06B14 601 602#define mmTPC0_CFG_QM_TENSOR_3_DIM_3_SIZE 0xE06B18 603 604#define mmTPC0_CFG_QM_TENSOR_3_DIM_3_STRIDE 0xE06B1C 605 606#define mmTPC0_CFG_QM_TENSOR_3_DIM_3_BASE_OFFSET 0xE06B20 607 608#define mmTPC0_CFG_QM_TENSOR_3_DIM_4_SIZE 0xE06B24 609 610#define mmTPC0_CFG_QM_TENSOR_3_DIM_4_STRIDE 0xE06B28 611 612#define mmTPC0_CFG_QM_TENSOR_3_DIM_4_BASE_OFFSET 0xE06B2C 613 614#define mmTPC0_CFG_QM_TENSOR_4_BASE_ADDR_LOW 0xE06B30 615 616#define mmTPC0_CFG_QM_TENSOR_4_BASE_ADDR_HIGH 0xE06B34 617 618#define mmTPC0_CFG_QM_TENSOR_4_PADDING_VALUE 0xE06B38 619 620#define mmTPC0_CFG_QM_TENSOR_4_TENSOR_CONFIG 0xE06B3C 621 622#define mmTPC0_CFG_QM_TENSOR_4_DIM_0_SIZE 0xE06B40 623 624#define mmTPC0_CFG_QM_TENSOR_4_DIM_0_STRIDE 0xE06B44 625 626#define mmTPC0_CFG_QM_TENSOR_4_DIM_0_BASE_OFFSET 0xE06B48 627 628#define mmTPC0_CFG_QM_TENSOR_4_DIM_1_SIZE 0xE06B4C 629 630#define mmTPC0_CFG_QM_TENSOR_4_DIM_1_STRIDE 0xE06B50 631 632#define mmTPC0_CFG_QM_TENSOR_4_DIM_1_BASE_OFFSET 0xE06B54 633 634#define mmTPC0_CFG_QM_TENSOR_4_DIM_2_SIZE 0xE06B58 635 636#define mmTPC0_CFG_QM_TENSOR_4_DIM_2_STRIDE 0xE06B5C 637 638#define mmTPC0_CFG_QM_TENSOR_4_DIM_2_BASE_OFFSET 0xE06B60 639 640#define mmTPC0_CFG_QM_TENSOR_4_DIM_3_SIZE 0xE06B64 641 642#define mmTPC0_CFG_QM_TENSOR_4_DIM_3_STRIDE 0xE06B68 643 644#define mmTPC0_CFG_QM_TENSOR_4_DIM_3_BASE_OFFSET 0xE06B6C 645 646#define mmTPC0_CFG_QM_TENSOR_4_DIM_4_SIZE 0xE06B70 647 648#define mmTPC0_CFG_QM_TENSOR_4_DIM_4_STRIDE 0xE06B74 649 650#define mmTPC0_CFG_QM_TENSOR_4_DIM_4_BASE_OFFSET 0xE06B78 651 652#define mmTPC0_CFG_QM_TENSOR_5_BASE_ADDR_LOW 0xE06B7C 653 654#define mmTPC0_CFG_QM_TENSOR_5_BASE_ADDR_HIGH 0xE06B80 655 656#define mmTPC0_CFG_QM_TENSOR_5_PADDING_VALUE 0xE06B84 657 658#define mmTPC0_CFG_QM_TENSOR_5_TENSOR_CONFIG 0xE06B88 659 660#define mmTPC0_CFG_QM_TENSOR_5_DIM_0_SIZE 0xE06B8C 661 662#define mmTPC0_CFG_QM_TENSOR_5_DIM_0_STRIDE 0xE06B90 663 664#define mmTPC0_CFG_QM_TENSOR_5_DIM_0_BASE_OFFSET 0xE06B94 665 666#define mmTPC0_CFG_QM_TENSOR_5_DIM_1_SIZE 0xE06B98 667 668#define mmTPC0_CFG_QM_TENSOR_5_DIM_1_STRIDE 0xE06B9C 669 670#define mmTPC0_CFG_QM_TENSOR_5_DIM_1_BASE_OFFSET 0xE06BA0 671 672#define mmTPC0_CFG_QM_TENSOR_5_DIM_2_SIZE 0xE06BA4 673 674#define mmTPC0_CFG_QM_TENSOR_5_DIM_2_STRIDE 0xE06BA8 675 676#define mmTPC0_CFG_QM_TENSOR_5_DIM_2_BASE_OFFSET 0xE06BAC 677 678#define mmTPC0_CFG_QM_TENSOR_5_DIM_3_SIZE 0xE06BB0 679 680#define mmTPC0_CFG_QM_TENSOR_5_DIM_3_STRIDE 0xE06BB4 681 682#define mmTPC0_CFG_QM_TENSOR_5_DIM_3_BASE_OFFSET 0xE06BB8 683 684#define mmTPC0_CFG_QM_TENSOR_5_DIM_4_SIZE 0xE06BBC 685 686#define mmTPC0_CFG_QM_TENSOR_5_DIM_4_STRIDE 0xE06BC0 687 688#define mmTPC0_CFG_QM_TENSOR_5_DIM_4_BASE_OFFSET 0xE06BC4 689 690#define mmTPC0_CFG_QM_TENSOR_6_BASE_ADDR_LOW 0xE06BC8 691 692#define mmTPC0_CFG_QM_TENSOR_6_BASE_ADDR_HIGH 0xE06BCC 693 694#define mmTPC0_CFG_QM_TENSOR_6_PADDING_VALUE 0xE06BD0 695 696#define mmTPC0_CFG_QM_TENSOR_6_TENSOR_CONFIG 0xE06BD4 697 698#define mmTPC0_CFG_QM_TENSOR_6_DIM_0_SIZE 0xE06BD8 699 700#define mmTPC0_CFG_QM_TENSOR_6_DIM_0_STRIDE 0xE06BDC 701 702#define mmTPC0_CFG_QM_TENSOR_6_DIM_0_BASE_OFFSET 0xE06BE0 703 704#define mmTPC0_CFG_QM_TENSOR_6_DIM_1_SIZE 0xE06BE4 705 706#define mmTPC0_CFG_QM_TENSOR_6_DIM_1_STRIDE 0xE06BE8 707 708#define mmTPC0_CFG_QM_TENSOR_6_DIM_1_BASE_OFFSET 0xE06BEC 709 710#define mmTPC0_CFG_QM_TENSOR_6_DIM_2_SIZE 0xE06BF0 711 712#define mmTPC0_CFG_QM_TENSOR_6_DIM_2_STRIDE 0xE06BF4 713 714#define mmTPC0_CFG_QM_TENSOR_6_DIM_2_BASE_OFFSET 0xE06BF8 715 716#define mmTPC0_CFG_QM_TENSOR_6_DIM_3_SIZE 0xE06BFC 717 718#define mmTPC0_CFG_QM_TENSOR_6_DIM_3_STRIDE 0xE06C00 719 720#define mmTPC0_CFG_QM_TENSOR_6_DIM_3_BASE_OFFSET 0xE06C04 721 722#define mmTPC0_CFG_QM_TENSOR_6_DIM_4_SIZE 0xE06C08 723 724#define mmTPC0_CFG_QM_TENSOR_6_DIM_4_STRIDE 0xE06C0C 725 726#define mmTPC0_CFG_QM_TENSOR_6_DIM_4_BASE_OFFSET 0xE06C10 727 728#define mmTPC0_CFG_QM_TENSOR_7_BASE_ADDR_LOW 0xE06C14 729 730#define mmTPC0_CFG_QM_TENSOR_7_BASE_ADDR_HIGH 0xE06C18 731 732#define mmTPC0_CFG_QM_TENSOR_7_PADDING_VALUE 0xE06C1C 733 734#define mmTPC0_CFG_QM_TENSOR_7_TENSOR_CONFIG 0xE06C20 735 736#define mmTPC0_CFG_QM_TENSOR_7_DIM_0_SIZE 0xE06C24 737 738#define mmTPC0_CFG_QM_TENSOR_7_DIM_0_STRIDE 0xE06C28 739 740#define mmTPC0_CFG_QM_TENSOR_7_DIM_0_BASE_OFFSET 0xE06C2C 741 742#define mmTPC0_CFG_QM_TENSOR_7_DIM_1_SIZE 0xE06C30 743 744#define mmTPC0_CFG_QM_TENSOR_7_DIM_1_STRIDE 0xE06C34 745 746#define mmTPC0_CFG_QM_TENSOR_7_DIM_1_BASE_OFFSET 0xE06C38 747 748#define mmTPC0_CFG_QM_TENSOR_7_DIM_2_SIZE 0xE06C3C 749 750#define mmTPC0_CFG_QM_TENSOR_7_DIM_2_STRIDE 0xE06C40 751 752#define mmTPC0_CFG_QM_TENSOR_7_DIM_2_BASE_OFFSET 0xE06C44 753 754#define mmTPC0_CFG_QM_TENSOR_7_DIM_3_SIZE 0xE06C48 755 756#define mmTPC0_CFG_QM_TENSOR_7_DIM_3_STRIDE 0xE06C4C 757 758#define mmTPC0_CFG_QM_TENSOR_7_DIM_3_BASE_OFFSET 0xE06C50 759 760#define mmTPC0_CFG_QM_TENSOR_7_DIM_4_SIZE 0xE06C54 761 762#define mmTPC0_CFG_QM_TENSOR_7_DIM_4_STRIDE 0xE06C58 763 764#define mmTPC0_CFG_QM_TENSOR_7_DIM_4_BASE_OFFSET 0xE06C5C 765 766#define mmTPC0_CFG_QM_KERNEL_BASE_ADDRESS_LOW 0xE06C60 767 768#define mmTPC0_CFG_QM_KERNEL_BASE_ADDRESS_HIGH 0xE06C64 769 770#define mmTPC0_CFG_QM_TID_BASE_DIM_0 0xE06C68 771 772#define mmTPC0_CFG_QM_TID_SIZE_DIM_0 0xE06C6C 773 774#define mmTPC0_CFG_QM_TID_BASE_DIM_1 0xE06C70 775 776#define mmTPC0_CFG_QM_TID_SIZE_DIM_1 0xE06C74 777 778#define mmTPC0_CFG_QM_TID_BASE_DIM_2 0xE06C78 779 780#define mmTPC0_CFG_QM_TID_SIZE_DIM_2 0xE06C7C 781 782#define mmTPC0_CFG_QM_TID_BASE_DIM_3 0xE06C80 783 784#define mmTPC0_CFG_QM_TID_SIZE_DIM_3 0xE06C84 785 786#define mmTPC0_CFG_QM_TID_BASE_DIM_4 0xE06C88 787 788#define mmTPC0_CFG_QM_TID_SIZE_DIM_4 0xE06C8C 789 790#define mmTPC0_CFG_QM_SRF_0 0xE06C90 791 792#define mmTPC0_CFG_QM_SRF_1 0xE06C94 793 794#define mmTPC0_CFG_QM_SRF_2 0xE06C98 795 796#define mmTPC0_CFG_QM_SRF_3 0xE06C9C 797 798#define mmTPC0_CFG_QM_SRF_4 0xE06CA0 799 800#define mmTPC0_CFG_QM_SRF_5 0xE06CA4 801 802#define mmTPC0_CFG_QM_SRF_6 0xE06CA8 803 804#define mmTPC0_CFG_QM_SRF_7 0xE06CAC 805 806#define mmTPC0_CFG_QM_SRF_8 0xE06CB0 807 808#define mmTPC0_CFG_QM_SRF_9 0xE06CB4 809 810#define mmTPC0_CFG_QM_SRF_10 0xE06CB8 811 812#define mmTPC0_CFG_QM_SRF_11 0xE06CBC 813 814#define mmTPC0_CFG_QM_SRF_12 0xE06CC0 815 816#define mmTPC0_CFG_QM_SRF_13 0xE06CC4 817 818#define mmTPC0_CFG_QM_SRF_14 0xE06CC8 819 820#define mmTPC0_CFG_QM_SRF_15 0xE06CCC 821 822#define mmTPC0_CFG_QM_SRF_16 0xE06CD0 823 824#define mmTPC0_CFG_QM_SRF_17 0xE06CD4 825 826#define mmTPC0_CFG_QM_SRF_18 0xE06CD8 827 828#define mmTPC0_CFG_QM_SRF_19 0xE06CDC 829 830#define mmTPC0_CFG_QM_SRF_20 0xE06CE0 831 832#define mmTPC0_CFG_QM_SRF_21 0xE06CE4 833 834#define mmTPC0_CFG_QM_SRF_22 0xE06CE8 835 836#define mmTPC0_CFG_QM_SRF_23 0xE06CEC 837 838#define mmTPC0_CFG_QM_SRF_24 0xE06CF0 839 840#define mmTPC0_CFG_QM_SRF_25 0xE06CF4 841 842#define mmTPC0_CFG_QM_SRF_26 0xE06CF8 843 844#define mmTPC0_CFG_QM_SRF_27 0xE06CFC 845 846#define mmTPC0_CFG_QM_SRF_28 0xE06D00 847 848#define mmTPC0_CFG_QM_SRF_29 0xE06D04 849 850#define mmTPC0_CFG_QM_SRF_30 0xE06D08 851 852#define mmTPC0_CFG_QM_SRF_31 0xE06D0C 853 854#define mmTPC0_CFG_QM_KERNEL_CONFIG 0xE06D10 855 856#define mmTPC0_CFG_QM_SYNC_OBJECT_MESSAGE 0xE06D14 857 858#define mmTPC0_CFG_ARUSER 0xE06D18 859 860#define mmTPC0_CFG_AWUSER 0xE06D1C 861 862#define mmTPC0_CFG_FUNC_MBIST_CNTRL 0xE06E00 863 864#define mmTPC0_CFG_FUNC_MBIST_PAT 0xE06E04 865 866#define mmTPC0_CFG_FUNC_MBIST_MEM_0 0xE06E08 867 868#define mmTPC0_CFG_FUNC_MBIST_MEM_1 0xE06E0C 869 870#define mmTPC0_CFG_FUNC_MBIST_MEM_2 0xE06E10 871 872#define mmTPC0_CFG_FUNC_MBIST_MEM_3 0xE06E14 873 874#define mmTPC0_CFG_FUNC_MBIST_MEM_4 0xE06E18 875 876#define mmTPC0_CFG_FUNC_MBIST_MEM_5 0xE06E1C 877 878#define mmTPC0_CFG_FUNC_MBIST_MEM_6 0xE06E20 879 880#define mmTPC0_CFG_FUNC_MBIST_MEM_7 0xE06E24 881 882#define mmTPC0_CFG_FUNC_MBIST_MEM_8 0xE06E28 883 884#define mmTPC0_CFG_FUNC_MBIST_MEM_9 0xE06E2C 885 886#endif /* ASIC_REG_TPC0_CFG_REGS_H_ */ 887