1/* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2016-2018 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8/************************************ 9 ** This is an auto-generated file ** 10 ** DO NOT EDIT BELOW ** 11 ************************************/ 12 13#ifndef ASIC_REG_DMA_IF_E_S_DOWN_CH0_REGS_H_ 14#define ASIC_REG_DMA_IF_E_S_DOWN_CH0_REGS_H_ 15 16/* 17 ***************************************** 18 * DMA_IF_E_S_DOWN_CH0 (Prototype: RTR_CTRL) 19 ***************************************** 20 */ 21 22#define mmDMA_IF_E_S_DOWN_CH0_PERM_SEL 0x4A1108 23 24#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_0 0x4A1114 25 26#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_1 0x4A1118 27 28#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_2 0x4A111C 29 30#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_3 0x4A1120 31 32#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_4 0x4A1124 33 34#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_5 0x4A1128 35 36#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_6 0x4A112C 37 38#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_7 0x4A1130 39 40#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_8 0x4A1134 41 42#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_9 0x4A1138 43 44#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_10 0x4A113C 45 46#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_11 0x4A1140 47 48#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_12 0x4A1144 49 50#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_13 0x4A1148 51 52#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_14 0x4A114C 53 54#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_15 0x4A1150 55 56#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_16 0x4A1154 57 58#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_17 0x4A1158 59 60#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_18 0x4A115C 61 62#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_19 0x4A1160 63 64#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_20 0x4A1164 65 66#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_21 0x4A1168 67 68#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_22 0x4A116C 69 70#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_23 0x4A1170 71 72#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_24 0x4A1174 73 74#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_25 0x4A1178 75 76#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_26 0x4A117C 77 78#define mmDMA_IF_E_S_DOWN_CH0_HBM_POLY_H3_27 0x4A1180 79 80#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_0 0x4A1184 81 82#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_1 0x4A1188 83 84#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_2 0x4A118C 85 86#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_3 0x4A1190 87 88#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_4 0x4A1194 89 90#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_5 0x4A1198 91 92#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_6 0x4A119C 93 94#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_7 0x4A11A0 95 96#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_8 0x4A11A4 97 98#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_9 0x4A11A8 99 100#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_10 0x4A11AC 101 102#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_11 0x4A11B0 103 104#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_12 0x4A11B4 105 106#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_13 0x4A11B8 107 108#define mmDMA_IF_E_S_DOWN_CH0_SRAM_POLY_H3_14 0x4A11BC 109 110#define mmDMA_IF_E_S_DOWN_CH0_SCRAM_SRAM_EN 0x4A126C 111 112#define mmDMA_IF_E_S_DOWN_CH0_RL_HBM_EN 0x4A1274 113 114#define mmDMA_IF_E_S_DOWN_CH0_RL_HBM_SAT 0x4A1278 115 116#define mmDMA_IF_E_S_DOWN_CH0_RL_HBM_RST 0x4A127C 117 118#define mmDMA_IF_E_S_DOWN_CH0_RL_HBM_TIMEOUT 0x4A1280 119 120#define mmDMA_IF_E_S_DOWN_CH0_SCRAM_HBM_EN 0x4A1284 121 122#define mmDMA_IF_E_S_DOWN_CH0_RL_PCI_EN 0x4A1288 123 124#define mmDMA_IF_E_S_DOWN_CH0_RL_PCI_SAT 0x4A128C 125 126#define mmDMA_IF_E_S_DOWN_CH0_RL_PCI_RST 0x4A1290 127 128#define mmDMA_IF_E_S_DOWN_CH0_RL_PCI_TIMEOUT 0x4A1294 129 130#define mmDMA_IF_E_S_DOWN_CH0_RL_SRAM_EN 0x4A129C 131 132#define mmDMA_IF_E_S_DOWN_CH0_RL_SRAM_SAT 0x4A12A0 133 134#define mmDMA_IF_E_S_DOWN_CH0_RL_SRAM_RST 0x4A12A4 135 136#define mmDMA_IF_E_S_DOWN_CH0_RL_SRAM_TIMEOUT 0x4A12AC 137 138#define mmDMA_IF_E_S_DOWN_CH0_RL_SRAM_RED 0x4A12B4 139 140#define mmDMA_IF_E_S_DOWN_CH0_E2E_HBM_EN 0x4A12EC 141 142#define mmDMA_IF_E_S_DOWN_CH0_E2E_PCI_EN 0x4A12F0 143 144#define mmDMA_IF_E_S_DOWN_CH0_E2E_HBM_WR_SIZE 0x4A12F4 145 146#define mmDMA_IF_E_S_DOWN_CH0_E2E_PCI_WR_SIZE 0x4A12F8 147 148#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_PCI_CTR_SET_EN 0x4A1404 149 150#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_PCI_CTR_SET 0x4A1408 151 152#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_PCI_CTR_WRAP 0x4A140C 153 154#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_PCI_CTR_CNT 0x4A1410 155 156#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM_CTR_SET_EN 0x4A1414 157 158#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM_CTR_SET 0x4A1418 159 160#define mmDMA_IF_E_S_DOWN_CH0_E2E_HBM_RD_SIZE 0x4A141C 161 162#define mmDMA_IF_E_S_DOWN_CH0_E2E_PCI_RD_SIZE 0x4A1420 163 164#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_PCI_CTR_SET_EN 0x4A1424 165 166#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_PCI_CTR_SET 0x4A1428 167 168#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_PCI_CTR_WRAP 0x4A142C 169 170#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_PCI_CTR_CNT 0x4A1430 171 172#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM_CTR_SET_EN 0x4A1434 173 174#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM_CTR_SET 0x4A1438 175 176#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_SEL_0 0x4A1450 177 178#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_SEL_1 0x4A1454 179 180#define mmDMA_IF_E_S_DOWN_CH0_NON_LIN_EN 0x4A1480 181 182#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_BANK_0 0x4A1500 183 184#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_BANK_1 0x4A1504 185 186#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_BANK_2 0x4A1508 187 188#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_BANK_3 0x4A150C 189 190#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_BANK_4 0x4A1510 191 192#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_OFFSET_0 0x4A1514 193 194#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_OFFSET_1 0x4A1520 195 196#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_OFFSET_2 0x4A1524 197 198#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_OFFSET_3 0x4A1528 199 200#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_OFFSET_4 0x4A152C 201 202#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_OFFSET_5 0x4A1530 203 204#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_OFFSET_6 0x4A1534 205 206#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_OFFSET_7 0x4A1538 207 208#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_OFFSET_8 0x4A153C 209 210#define mmDMA_IF_E_S_DOWN_CH0_NL_SRAM_OFFSET_9 0x4A1540 211 212#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_0 0x4A1550 213 214#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_1 0x4A1554 215 216#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_2 0x4A1558 217 218#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_3 0x4A155C 219 220#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_4 0x4A1560 221 222#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_5 0x4A1564 223 224#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_6 0x4A1568 225 226#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_7 0x4A156C 227 228#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_8 0x4A1570 229 230#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_9 0x4A1574 231 232#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_10 0x4A1578 233 234#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_11 0x4A157C 235 236#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_12 0x4A1580 237 238#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_13 0x4A1584 239 240#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_14 0x4A1588 241 242#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_15 0x4A158C 243 244#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_16 0x4A1590 245 246#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_17 0x4A1594 247 248#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_18 0x4A1598 249 250#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_0 0x4A15E4 251 252#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_1 0x4A15E8 253 254#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_2 0x4A15EC 255 256#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_3 0x4A15F0 257 258#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_4 0x4A15F4 259 260#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_5 0x4A15F8 261 262#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_6 0x4A15FC 263 264#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_7 0x4A1600 265 266#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_8 0x4A1604 267 268#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_9 0x4A1608 269 270#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_10 0x4A160C 271 272#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_11 0x4A1610 273 274#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_12 0x4A1614 275 276#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_13 0x4A1618 277 278#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_14 0x4A161C 279 280#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_15 0x4A1620 281 282#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_0 0x4A1624 283 284#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_1 0x4A1628 285 286#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_2 0x4A162C 287 288#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_3 0x4A1630 289 290#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_4 0x4A1634 291 292#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_5 0x4A1638 293 294#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_6 0x4A163C 295 296#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_7 0x4A1640 297 298#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_8 0x4A1644 299 300#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_9 0x4A1648 301 302#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_10 0x4A164C 303 304#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_11 0x4A1650 305 306#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_12 0x4A1654 307 308#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_13 0x4A1658 309 310#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_14 0x4A165C 311 312#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_15 0x4A1660 313 314#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_0 0x4A1664 315 316#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_1 0x4A1668 317 318#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_2 0x4A166C 319 320#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_3 0x4A1670 321 322#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_4 0x4A1674 323 324#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_5 0x4A1678 325 326#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_6 0x4A167C 327 328#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_7 0x4A1680 329 330#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_8 0x4A1684 331 332#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_9 0x4A1688 333 334#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_10 0x4A168C 335 336#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_11 0x4A1690 337 338#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_12 0x4A1694 339 340#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_13 0x4A1698 341 342#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_14 0x4A169C 343 344#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_15 0x4A16A0 345 346#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_0 0x4A16A4 347 348#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_1 0x4A16A8 349 350#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_2 0x4A16AC 351 352#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_3 0x4A16B0 353 354#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_4 0x4A16B4 355 356#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_5 0x4A16B8 357 358#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_6 0x4A16BC 359 360#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_7 0x4A16C0 361 362#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_8 0x4A16C4 363 364#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_9 0x4A16C8 365 366#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_10 0x4A16CC 367 368#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_11 0x4A16D0 369 370#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_12 0x4A16D4 371 372#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_13 0x4A16D8 373 374#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_14 0x4A16DC 375 376#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_15 0x4A16E0 377 378#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_0 0x4A16E4 379 380#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_1 0x4A16E8 381 382#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_2 0x4A16EC 383 384#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_3 0x4A16F0 385 386#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_4 0x4A16F4 387 388#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_5 0x4A16F8 389 390#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_6 0x4A16FC 391 392#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_7 0x4A1700 393 394#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_8 0x4A1704 395 396#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_9 0x4A1708 397 398#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_10 0x4A170C 399 400#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_11 0x4A1710 401 402#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_12 0x4A1714 403 404#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_13 0x4A1718 405 406#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_14 0x4A171C 407 408#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_15 0x4A1720 409 410#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_0 0x4A1724 411 412#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_1 0x4A1728 413 414#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_2 0x4A172C 415 416#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_3 0x4A1730 417 418#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_4 0x4A1734 419 420#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_5 0x4A1738 421 422#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_6 0x4A173C 423 424#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_7 0x4A1740 425 426#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_8 0x4A1744 427 428#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_9 0x4A1748 429 430#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_10 0x4A174C 431 432#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_11 0x4A1750 433 434#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_12 0x4A1754 435 436#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_13 0x4A1758 437 438#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_14 0x4A175C 439 440#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_15 0x4A1760 441 442#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_0 0x4A1764 443 444#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_1 0x4A1768 445 446#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_2 0x4A176C 447 448#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_3 0x4A1770 449 450#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_4 0x4A1774 451 452#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_5 0x4A1778 453 454#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_6 0x4A177C 455 456#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_7 0x4A1780 457 458#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_8 0x4A1784 459 460#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_9 0x4A1788 461 462#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_10 0x4A178C 463 464#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_11 0x4A1790 465 466#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_12 0x4A1794 467 468#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_13 0x4A1798 469 470#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_14 0x4A179C 471 472#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_15 0x4A17A0 473 474#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_0 0x4A17A4 475 476#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_1 0x4A17A8 477 478#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_2 0x4A17AC 479 480#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_3 0x4A17B0 481 482#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_4 0x4A17B4 483 484#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_5 0x4A17B8 485 486#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_6 0x4A17BC 487 488#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_7 0x4A17C0 489 490#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_8 0x4A17C4 491 492#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_9 0x4A17C8 493 494#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_10 0x4A17CC 495 496#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_11 0x4A17D0 497 498#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_12 0x4A17D4 499 500#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_13 0x4A17D8 501 502#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_14 0x4A17DC 503 504#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_15 0x4A17E0 505 506#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_0 0x4A1824 507 508#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_1 0x4A1828 509 510#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_2 0x4A182C 511 512#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_3 0x4A1830 513 514#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_4 0x4A1834 515 516#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_5 0x4A1838 517 518#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_6 0x4A183C 519 520#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_7 0x4A1840 521 522#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_8 0x4A1844 523 524#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_9 0x4A1848 525 526#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_10 0x4A184C 527 528#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_11 0x4A1850 529 530#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_12 0x4A1854 531 532#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_13 0x4A1858 533 534#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_14 0x4A185C 535 536#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_15 0x4A1860 537 538#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_0 0x4A1864 539 540#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_1 0x4A1868 541 542#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_2 0x4A186C 543 544#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_3 0x4A1870 545 546#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_4 0x4A1874 547 548#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_5 0x4A1878 549 550#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_6 0x4A187C 551 552#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_7 0x4A1880 553 554#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_8 0x4A1884 555 556#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_9 0x4A1888 557 558#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_10 0x4A188C 559 560#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_11 0x4A1890 561 562#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_12 0x4A1894 563 564#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_13 0x4A1898 565 566#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_14 0x4A189C 567 568#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_15 0x4A18A0 569 570#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_0 0x4A18A4 571 572#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_1 0x4A18A8 573 574#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_2 0x4A18AC 575 576#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_3 0x4A18B0 577 578#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_4 0x4A18B4 579 580#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_5 0x4A18B8 581 582#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_6 0x4A18BC 583 584#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_7 0x4A18C0 585 586#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_8 0x4A18C4 587 588#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_9 0x4A18C8 589 590#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_10 0x4A18CC 591 592#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_11 0x4A18D0 593 594#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_12 0x4A18D4 595 596#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_13 0x4A18D8 597 598#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_14 0x4A18DC 599 600#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_15 0x4A18E0 601 602#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_0 0x4A18E4 603 604#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_1 0x4A18E8 605 606#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_2 0x4A18EC 607 608#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_3 0x4A18F0 609 610#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_4 0x4A18F4 611 612#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_5 0x4A18F8 613 614#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_6 0x4A18FC 615 616#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_7 0x4A1900 617 618#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_8 0x4A1904 619 620#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_9 0x4A1908 621 622#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_10 0x4A190C 623 624#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_11 0x4A1910 625 626#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_12 0x4A1914 627 628#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_13 0x4A1918 629 630#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_14 0x4A191C 631 632#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_15 0x4A1920 633 634#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_0 0x4A1924 635 636#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_1 0x4A1928 637 638#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_2 0x4A192C 639 640#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_3 0x4A1930 641 642#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_4 0x4A1934 643 644#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_5 0x4A1938 645 646#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_6 0x4A193C 647 648#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_7 0x4A1940 649 650#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_8 0x4A1944 651 652#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_9 0x4A1948 653 654#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_10 0x4A194C 655 656#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_11 0x4A1950 657 658#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_12 0x4A1954 659 660#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_13 0x4A1958 661 662#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_14 0x4A195C 663 664#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_15 0x4A1960 665 666#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_0 0x4A1964 667 668#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_1 0x4A1968 669 670#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_2 0x4A196C 671 672#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_3 0x4A1970 673 674#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_4 0x4A1974 675 676#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_5 0x4A1978 677 678#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_6 0x4A197C 679 680#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_7 0x4A1980 681 682#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_8 0x4A1984 683 684#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_9 0x4A1988 685 686#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_10 0x4A198C 687 688#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_11 0x4A1990 689 690#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_12 0x4A1994 691 692#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_13 0x4A1998 693 694#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_14 0x4A199C 695 696#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_15 0x4A19A0 697 698#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_0 0x4A19A4 699 700#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_1 0x4A19A8 701 702#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_2 0x4A19AC 703 704#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_3 0x4A19B0 705 706#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_4 0x4A19B4 707 708#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_5 0x4A19B8 709 710#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_6 0x4A19BC 711 712#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_7 0x4A19C0 713 714#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_8 0x4A19C4 715 716#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_9 0x4A19C8 717 718#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_10 0x4A19CC 719 720#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_11 0x4A19D0 721 722#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_12 0x4A19D4 723 724#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_13 0x4A19D8 725 726#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_14 0x4A19DC 727 728#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_15 0x4A19E0 729 730#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_0 0x4A19E4 731 732#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_1 0x4A19E8 733 734#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_2 0x4A19EC 735 736#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_3 0x4A19F0 737 738#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_4 0x4A19F4 739 740#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_5 0x4A19F8 741 742#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_6 0x4A19FC 743 744#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_7 0x4A1A00 745 746#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_8 0x4A1A04 747 748#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_9 0x4A1A08 749 750#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_10 0x4A1A0C 751 752#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_11 0x4A1A10 753 754#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_12 0x4A1A14 755 756#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_13 0x4A1A18 757 758#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_14 0x4A1A1C 759 760#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_15 0x4A1A20 761 762#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_HIT_AW 0x4A1A64 763 764#define mmDMA_IF_E_S_DOWN_CH0_RANGE_SEC_HIT_AR 0x4A1A68 765 766#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_HIT_AW 0x4A1A6C 767 768#define mmDMA_IF_E_S_DOWN_CH0_RANGE_PRIV_HIT_AR 0x4A1A70 769 770#define mmDMA_IF_E_S_DOWN_CH0_RGL_CFG 0x4A1B64 771 772#define mmDMA_IF_E_S_DOWN_CH0_RGL_SHIFT 0x4A1B68 773 774#define mmDMA_IF_E_S_DOWN_CH0_RGL_EXPECTED_LAT_0 0x4A1B6C 775 776#define mmDMA_IF_E_S_DOWN_CH0_RGL_EXPECTED_LAT_1 0x4A1B70 777 778#define mmDMA_IF_E_S_DOWN_CH0_RGL_EXPECTED_LAT_2 0x4A1B74 779 780#define mmDMA_IF_E_S_DOWN_CH0_RGL_EXPECTED_LAT_3 0x4A1B78 781 782#define mmDMA_IF_E_S_DOWN_CH0_RGL_EXPECTED_LAT_4 0x4A1B7C 783 784#define mmDMA_IF_E_S_DOWN_CH0_RGL_EXPECTED_LAT_5 0x4A1B80 785 786#define mmDMA_IF_E_S_DOWN_CH0_RGL_EXPECTED_LAT_6 0x4A1B84 787 788#define mmDMA_IF_E_S_DOWN_CH0_RGL_EXPECTED_LAT_7 0x4A1B88 789 790#define mmDMA_IF_E_S_DOWN_CH0_RGL_TOKEN_0 0x4A1BAC 791 792#define mmDMA_IF_E_S_DOWN_CH0_RGL_TOKEN_1 0x4A1BB0 793 794#define mmDMA_IF_E_S_DOWN_CH0_RGL_TOKEN_2 0x4A1BB4 795 796#define mmDMA_IF_E_S_DOWN_CH0_RGL_TOKEN_3 0x4A1BB8 797 798#define mmDMA_IF_E_S_DOWN_CH0_RGL_TOKEN_4 0x4A1BBC 799 800#define mmDMA_IF_E_S_DOWN_CH0_RGL_TOKEN_5 0x4A1BC0 801 802#define mmDMA_IF_E_S_DOWN_CH0_RGL_TOKEN_6 0x4A1BC4 803 804#define mmDMA_IF_E_S_DOWN_CH0_RGL_TOKEN_7 0x4A1BC8 805 806#define mmDMA_IF_E_S_DOWN_CH0_RGL_BANK_ID_0 0x4A1BEC 807 808#define mmDMA_IF_E_S_DOWN_CH0_RGL_BANK_ID_1 0x4A1BF0 809 810#define mmDMA_IF_E_S_DOWN_CH0_RGL_BANK_ID_2 0x4A1BF4 811 812#define mmDMA_IF_E_S_DOWN_CH0_RGL_BANK_ID_3 0x4A1BF8 813 814#define mmDMA_IF_E_S_DOWN_CH0_RGL_BANK_ID_4 0x4A1BFC 815 816#define mmDMA_IF_E_S_DOWN_CH0_RGL_BANK_ID_5 0x4A1C00 817 818#define mmDMA_IF_E_S_DOWN_CH0_RGL_BANK_ID_6 0x4A1C04 819 820#define mmDMA_IF_E_S_DOWN_CH0_RGL_BANK_ID_7 0x4A1C08 821 822#define mmDMA_IF_E_S_DOWN_CH0_RGL_WDT 0x4A1C2C 823 824#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM0_CH0_CTR_WRAP 0x4A1C30 825 826#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM0_CH1_CTR_WRAP 0x4A1C34 827 828#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM1_CH0_CTR_WRAP 0x4A1C38 829 830#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM1_CH1_CTR_WRAP 0x4A1C3C 831 832#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM2_CH0_CTR_WRAP 0x4A1C40 833 834#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM2_CH1_CTR_WRAP 0x4A1C44 835 836#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM3_CH0_CTR_WRAP 0x4A1C48 837 838#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM3_CH1_CTR_WRAP 0x4A1C4C 839 840#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM0_CH0_CTR_CNT 0x4A1C50 841 842#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM0_CH1_CTR_CNT 0x4A1C54 843 844#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM1_CH0_CTR_CNT 0x4A1C58 845 846#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM1_CH1_CTR_CNT 0x4A1C5C 847 848#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM2_CH0_CTR_CNT 0x4A1C60 849 850#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM2_CH1_CTR_CNT 0x4A1C64 851 852#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM3_CH0_CTR_CNT 0x4A1C68 853 854#define mmDMA_IF_E_S_DOWN_CH0_E2E_AR_HBM3_CH1_CTR_CNT 0x4A1C6C 855 856#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM0_CH0_CTR_WRAP 0x4A1C70 857 858#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM0_CH1_CTR_WRAP 0x4A1C74 859 860#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM1_CH0_CTR_WRAP 0x4A1C78 861 862#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM1_CH1_CTR_WRAP 0x4A1C7C 863 864#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM2_CH0_CTR_WRAP 0x4A1C80 865 866#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM2_CH1_CTR_WRAP 0x4A1C84 867 868#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM3_CH0_CTR_WRAP 0x4A1C88 869 870#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM3_CH1_CTR_WRAP 0x4A1C8C 871 872#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM0_CH0_CTR_CNT 0x4A1C90 873 874#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM0_CH1_CTR_CNT 0x4A1C94 875 876#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM1_CH0_CTR_CNT 0x4A1C98 877 878#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM1_CH1_CTR_CNT 0x4A1C9C 879 880#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM2_CH0_CTR_CNT 0x4A1CA0 881 882#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM2_CH1_CTR_CNT 0x4A1CA4 883 884#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM3_CH0_CTR_CNT 0x4A1CA8 885 886#define mmDMA_IF_E_S_DOWN_CH0_E2E_AW_HBM3_CH1_CTR_CNT 0x4A1CAC 887 888#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_PC_SEL_0 0x4A1CB0 889 890#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_PC_SEL_1 0x4A1CB4 891 892#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_PC_SEL_2 0x4A1CB8 893 894#define mmDMA_IF_E_S_DOWN_CH0_NL_HBM_PC_SEL_3 0x4A1CBC 895 896#endif /* ASIC_REG_DMA_IF_E_S_DOWN_CH0_REGS_H_ */ 897