1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 *
4 * arch/xtensa/platform/xtavnet/setup.c
5 *
6 * ...
7 *
8 * Authors:	Chris Zankel <chris@zankel.net>
9 *		Joe Taylor <joe@tensilica.com>
10 *
11 * Copyright 2001 - 2006 Tensilica Inc.
12 */
13#include <linux/stddef.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <linux/errno.h>
18#include <linux/reboot.h>
19#include <linux/kdev_t.h>
20#include <linux/types.h>
21#include <linux/major.h>
22#include <linux/console.h>
23#include <linux/delay.h>
24#include <linux/of.h>
25#include <linux/clk-provider.h>
26#include <linux/of_address.h>
27#include <linux/slab.h>
28
29#include <asm/timex.h>
30#include <asm/processor.h>
31#include <asm/platform.h>
32#include <asm/bootparam.h>
33#include <platform/lcd.h>
34#include <platform/hardware.h>
35
36static int xtfpga_power_off(struct sys_off_data *unused)
37{
38	lcd_disp_at_pos("POWEROFF", 0);
39	local_irq_disable();
40	while (1)
41		cpu_relax();
42	return NOTIFY_DONE;
43}
44
45static int xtfpga_restart(struct notifier_block *this,
46			  unsigned long event, void *ptr)
47{
48	/* Try software reset first. */
49	WRITE_ONCE(*(u32 *)XTFPGA_SWRST_VADDR, 0xdead);
50
51	/* If software reset did not work, flush and reset the mmu,
52	 * simulate a processor reset, and jump to the reset vector.
53	 */
54	cpu_reset();
55
56	return NOTIFY_DONE;
57}
58
59static struct notifier_block xtfpga_restart_block = {
60	.notifier_call = xtfpga_restart,
61};
62
63#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
64
65void __init platform_calibrate_ccount(void)
66{
67	ccount_freq = *(long *)XTFPGA_CLKFRQ_VADDR;
68}
69
70#endif
71
72static void __init xtfpga_register_handlers(void)
73{
74	register_restart_handler(&xtfpga_restart_block);
75	register_sys_off_handler(SYS_OFF_MODE_POWER_OFF,
76				 SYS_OFF_PRIO_DEFAULT,
77				 xtfpga_power_off, NULL);
78}
79
80#ifdef CONFIG_USE_OF
81
82static void __init xtfpga_clk_setup(struct device_node *np)
83{
84	void __iomem *base = of_iomap(np, 0);
85	struct clk *clk;
86	u32 freq;
87
88	if (!base) {
89		pr_err("%pOFn: invalid address\n", np);
90		return;
91	}
92
93	freq = __raw_readl(base);
94	iounmap(base);
95	clk = clk_register_fixed_rate(NULL, np->name, NULL, 0, freq);
96
97	if (IS_ERR(clk)) {
98		pr_err("%pOFn: clk registration failed\n", np);
99		return;
100	}
101
102	if (of_clk_add_provider(np, of_clk_src_simple_get, clk)) {
103		pr_err("%pOFn: clk provider registration failed\n", np);
104		return;
105	}
106}
107CLK_OF_DECLARE(xtfpga_clk, "cdns,xtfpga-clock", xtfpga_clk_setup);
108
109#define MAC_LEN 6
110static void __init update_local_mac(struct device_node *node)
111{
112	struct property *newmac;
113	const u8* macaddr;
114	int prop_len;
115
116	macaddr = of_get_property(node, "local-mac-address", &prop_len);
117	if (macaddr == NULL || prop_len != MAC_LEN)
118		return;
119
120	newmac = kzalloc(sizeof(*newmac) + MAC_LEN, GFP_KERNEL);
121	if (newmac == NULL)
122		return;
123
124	newmac->value = newmac + 1;
125	newmac->length = MAC_LEN;
126	newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
127	if (newmac->name == NULL) {
128		kfree(newmac);
129		return;
130	}
131
132	memcpy(newmac->value, macaddr, MAC_LEN);
133	((u8*)newmac->value)[5] = (*(u32*)DIP_SWITCHES_VADDR) & 0x3f;
134	of_update_property(node, newmac);
135}
136
137static int __init machine_setup(void)
138{
139	struct device_node *eth = NULL;
140
141	if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
142		update_local_mac(eth);
143	of_node_put(eth);
144
145	xtfpga_register_handlers();
146
147	return 0;
148}
149arch_initcall(machine_setup);
150
151#else
152
153#include <linux/serial_8250.h>
154#include <linux/if.h>
155#include <net/ethoc.h>
156#include <linux/usb/c67x00.h>
157
158/*----------------------------------------------------------------------------
159 *  Ethernet -- OpenCores Ethernet MAC (ethoc driver)
160 */
161
162static struct resource ethoc_res[] = {
163	[0] = { /* register space */
164		.start = OETH_REGS_PADDR,
165		.end   = OETH_REGS_PADDR + OETH_REGS_SIZE - 1,
166		.flags = IORESOURCE_MEM,
167	},
168	[1] = { /* buffer space */
169		.start = OETH_SRAMBUFF_PADDR,
170		.end   = OETH_SRAMBUFF_PADDR + OETH_SRAMBUFF_SIZE - 1,
171		.flags = IORESOURCE_MEM,
172	},
173	[2] = { /* IRQ number */
174		.start = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
175		.end   = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
176		.flags = IORESOURCE_IRQ,
177	},
178};
179
180static struct ethoc_platform_data ethoc_pdata = {
181	/*
182	 * The MAC address for these boards is 00:50:c2:13:6f:xx.
183	 * The last byte (here as zero) is read from the DIP switches on the
184	 * board.
185	 */
186	.hwaddr = { 0x00, 0x50, 0xc2, 0x13, 0x6f, 0 },
187	.phy_id = -1,
188	.big_endian = XCHAL_HAVE_BE,
189};
190
191static struct platform_device ethoc_device = {
192	.name = "ethoc",
193	.id = -1,
194	.num_resources = ARRAY_SIZE(ethoc_res),
195	.resource = ethoc_res,
196	.dev = {
197		.platform_data = &ethoc_pdata,
198	},
199};
200
201/*----------------------------------------------------------------------------
202 *  USB Host/Device -- Cypress CY7C67300
203 */
204
205static struct resource c67x00_res[] = {
206	[0] = { /* register space */
207		.start = C67X00_PADDR,
208		.end   = C67X00_PADDR + C67X00_SIZE - 1,
209		.flags = IORESOURCE_MEM,
210	},
211	[1] = { /* IRQ number */
212		.start = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
213		.end   = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
214		.flags = IORESOURCE_IRQ,
215	},
216};
217
218static struct c67x00_platform_data c67x00_pdata = {
219	.sie_config = C67X00_SIE1_HOST | C67X00_SIE2_UNUSED,
220	.hpi_regstep = 4,
221};
222
223static struct platform_device c67x00_device = {
224	.name = "c67x00",
225	.id = -1,
226	.num_resources = ARRAY_SIZE(c67x00_res),
227	.resource = c67x00_res,
228	.dev = {
229		.platform_data = &c67x00_pdata,
230	},
231};
232
233/*----------------------------------------------------------------------------
234 *  UART
235 */
236
237static struct resource serial_resource = {
238	.start	= DUART16552_PADDR,
239	.end	= DUART16552_PADDR + 0x1f,
240	.flags	= IORESOURCE_MEM,
241};
242
243static struct plat_serial8250_port serial_platform_data[] = {
244	[0] = {
245		.mapbase	= DUART16552_PADDR,
246		.irq		= XTENSA_PIC_LINUX_IRQ(DUART16552_INTNUM),
247		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
248				  UPF_IOREMAP,
249		.iotype		= XCHAL_HAVE_BE ? UPIO_MEM32BE : UPIO_MEM32,
250		.regshift	= 2,
251		.uartclk	= 0,    /* set in xtavnet_init() */
252	},
253	{ },
254};
255
256static struct platform_device xtavnet_uart = {
257	.name		= "serial8250",
258	.id		= PLAT8250_DEV_PLATFORM,
259	.dev		= {
260		.platform_data	= serial_platform_data,
261	},
262	.num_resources	= 1,
263	.resource	= &serial_resource,
264};
265
266/* platform devices */
267static struct platform_device *platform_devices[] __initdata = {
268	&ethoc_device,
269	&c67x00_device,
270	&xtavnet_uart,
271};
272
273
274static int __init xtavnet_init(void)
275{
276	/* Ethernet MAC address.  */
277	ethoc_pdata.hwaddr[5] = *(u32 *)DIP_SWITCHES_VADDR;
278
279	/* Clock rate varies among FPGA bitstreams; board specific FPGA register
280	 * reports the actual clock rate.
281	 */
282	serial_platform_data[0].uartclk = *(long *)XTFPGA_CLKFRQ_VADDR;
283
284
285	/* register platform devices */
286	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
287
288	/* ETHOC driver is a bit quiet; at least display Ethernet MAC, so user
289	 * knows whether they set it correctly on the DIP switches.
290	 */
291	pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr);
292	ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR;
293
294	xtfpga_register_handlers();
295
296	return 0;
297}
298
299/*
300 * Register to be done during do_initcalls().
301 */
302arch_initcall(xtavnet_init);
303
304#endif /* CONFIG_USE_OF */
305