1/* 2 * include/asm-xtensa/elf.h 3 * 4 * ELF register definitions 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 * 10 * Copyright (C) 2001 - 2005 Tensilica Inc. 11 */ 12 13#ifndef _XTENSA_ELF_H 14#define _XTENSA_ELF_H 15 16#include <asm/ptrace.h> 17#include <asm/coprocessor.h> 18#include <linux/elf-em.h> 19 20/* Xtensa processor ELF architecture-magic number */ 21 22#define EM_XTENSA_OLD 0xABC7 23 24/* Xtensa relocations defined by the ABIs */ 25 26#define R_XTENSA_NONE 0 27#define R_XTENSA_32 1 28#define R_XTENSA_RTLD 2 29#define R_XTENSA_GLOB_DAT 3 30#define R_XTENSA_JMP_SLOT 4 31#define R_XTENSA_RELATIVE 5 32#define R_XTENSA_PLT 6 33#define R_XTENSA_OP0 8 34#define R_XTENSA_OP1 9 35#define R_XTENSA_OP2 10 36#define R_XTENSA_ASM_EXPAND 11 37#define R_XTENSA_ASM_SIMPLIFY 12 38#define R_XTENSA_GNU_VTINHERIT 15 39#define R_XTENSA_GNU_VTENTRY 16 40#define R_XTENSA_DIFF8 17 41#define R_XTENSA_DIFF16 18 42#define R_XTENSA_DIFF32 19 43#define R_XTENSA_SLOT0_OP 20 44#define R_XTENSA_SLOT1_OP 21 45#define R_XTENSA_SLOT2_OP 22 46#define R_XTENSA_SLOT3_OP 23 47#define R_XTENSA_SLOT4_OP 24 48#define R_XTENSA_SLOT5_OP 25 49#define R_XTENSA_SLOT6_OP 26 50#define R_XTENSA_SLOT7_OP 27 51#define R_XTENSA_SLOT8_OP 28 52#define R_XTENSA_SLOT9_OP 29 53#define R_XTENSA_SLOT10_OP 30 54#define R_XTENSA_SLOT11_OP 31 55#define R_XTENSA_SLOT12_OP 32 56#define R_XTENSA_SLOT13_OP 33 57#define R_XTENSA_SLOT14_OP 34 58#define R_XTENSA_SLOT0_ALT 35 59#define R_XTENSA_SLOT1_ALT 36 60#define R_XTENSA_SLOT2_ALT 37 61#define R_XTENSA_SLOT3_ALT 38 62#define R_XTENSA_SLOT4_ALT 39 63#define R_XTENSA_SLOT5_ALT 40 64#define R_XTENSA_SLOT6_ALT 41 65#define R_XTENSA_SLOT7_ALT 42 66#define R_XTENSA_SLOT8_ALT 43 67#define R_XTENSA_SLOT9_ALT 44 68#define R_XTENSA_SLOT10_ALT 45 69#define R_XTENSA_SLOT11_ALT 46 70#define R_XTENSA_SLOT12_ALT 47 71#define R_XTENSA_SLOT13_ALT 48 72#define R_XTENSA_SLOT14_ALT 49 73 74/* ELF register definitions. This is needed for core dump support. */ 75 76typedef unsigned long elf_greg_t; 77 78typedef struct user_pt_regs xtensa_gregset_t; 79 80#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t)) 81 82typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 83 84#define ELF_NFPREG 18 85 86typedef unsigned int elf_fpreg_t; 87typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; 88 89/* 90 * This is used to ensure we don't load something for the wrong architecture. 91 */ 92 93#define elf_check_arch(x) ( ( (x)->e_machine == EM_XTENSA ) || \ 94 ( (x)->e_machine == EM_XTENSA_OLD ) ) 95 96#define ELFOSABI_XTENSA_FDPIC 65 97#define elf_check_fdpic(x) ((x)->e_ident[EI_OSABI] == ELFOSABI_XTENSA_FDPIC) 98#define ELF_FDPIC_CORE_EFLAGS 0 99 100/* 101 * These are used to set parameters in the core dumps. 102 */ 103 104#ifdef __XTENSA_EL__ 105# define ELF_DATA ELFDATA2LSB 106#elif defined(__XTENSA_EB__) 107# define ELF_DATA ELFDATA2MSB 108#else 109# error processor byte order undefined! 110#endif 111 112#define ELF_CLASS ELFCLASS32 113#define ELF_ARCH EM_XTENSA 114 115#define ELF_EXEC_PAGESIZE PAGE_SIZE 116#define CORE_DUMP_USE_REGSET 117 118/* 119 * This is the location that an ET_DYN program is loaded if exec'ed. Typical 120 * use of this is to invoke "./ld.so someprog" to test out a new version of 121 * the loader. We need to make sure that it is out of the way of the program 122 * that it will "exec", and that there is sufficient room for the brk. 123 */ 124 125#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) 126 127/* 128 * This yields a mask that user programs can use to figure out what 129 * instruction set this CPU supports. This could be done in user space, 130 * but it's not easy, and we've already done it here. 131 */ 132 133#define ELF_HWCAP (0) 134 135/* 136 * This yields a string that ld.so will use to load implementation 137 * specific libraries for optimization. This is more specific in 138 * intent than poking at uname or /proc/cpuinfo. 139 * For the moment, we have only optimizations for the Intel generations, 140 * but that could change... 141 */ 142 143#define ELF_PLATFORM (NULL) 144 145/* 146 * The Xtensa processor ABI says that when the program starts, a2 147 * contains a pointer to a function which might be registered using 148 * `atexit'. This provides a mean for the dynamic linker to call 149 * DT_FINI functions for shared libraries that have been loaded before 150 * the code runs. 151 * 152 * A value of 0 tells we have no such handler. 153 * 154 * We might as well make sure everything else is cleared too (except 155 * for the stack pointer in a1), just to make things more 156 * deterministic. Also, clearing a0 terminates debugger backtraces. 157 */ 158 159#define ELF_PLAT_INIT(_r, load_addr) \ 160 do { \ 161 (_r)->areg[0] = 0; /*(_r)->areg[1] = 0;*/ \ 162 (_r)->areg[2] = 0; (_r)->areg[3] = 0; \ 163 (_r)->areg[4] = 0; (_r)->areg[5] = 0; \ 164 (_r)->areg[6] = 0; (_r)->areg[7] = 0; \ 165 (_r)->areg[8] = 0; (_r)->areg[9] = 0; \ 166 (_r)->areg[10] = 0; (_r)->areg[11] = 0; \ 167 (_r)->areg[12] = 0; (_r)->areg[13] = 0; \ 168 (_r)->areg[14] = 0; (_r)->areg[15] = 0; \ 169 } while (0) 170 171#define ELF_FDPIC_PLAT_INIT(_r, _exec_map_addr, _interp_map_addr, dynamic_addr) \ 172 do { \ 173 (_r)->areg[4] = _exec_map_addr; \ 174 (_r)->areg[5] = _interp_map_addr; \ 175 (_r)->areg[6] = dynamic_addr; \ 176 } while (0) 177 178typedef struct { 179 xtregs_opt_t opt; 180 xtregs_user_t user; 181#if XTENSA_HAVE_COPROCESSORS 182 xtregs_cp0_t cp0; 183 xtregs_cp1_t cp1; 184 xtregs_cp2_t cp2; 185 xtregs_cp3_t cp3; 186 xtregs_cp4_t cp4; 187 xtregs_cp5_t cp5; 188 xtregs_cp6_t cp6; 189 xtregs_cp7_t cp7; 190#endif 191} elf_xtregs_t; 192 193#define SET_PERSONALITY(ex) \ 194 set_personality(PER_LINUX_32BIT | (current->personality & (~PER_MASK))) 195 196#endif /* _XTENSA_ELF_H */ 197