1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _ASM_X86_KVM_H
3#define _ASM_X86_KVM_H
4
5/*
6 * KVM x86 specific structures and definitions
7 *
8 */
9
10#include <linux/const.h>
11#include <linux/bits.h>
12#include <linux/types.h>
13#include <linux/ioctl.h>
14#include <linux/stddef.h>
15
16#define KVM_PIO_PAGE_OFFSET 1
17#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
18#define KVM_DIRTY_LOG_PAGE_OFFSET 64
19
20#define DE_VECTOR 0
21#define DB_VECTOR 1
22#define BP_VECTOR 3
23#define OF_VECTOR 4
24#define BR_VECTOR 5
25#define UD_VECTOR 6
26#define NM_VECTOR 7
27#define DF_VECTOR 8
28#define TS_VECTOR 10
29#define NP_VECTOR 11
30#define SS_VECTOR 12
31#define GP_VECTOR 13
32#define PF_VECTOR 14
33#define MF_VECTOR 16
34#define AC_VECTOR 17
35#define MC_VECTOR 18
36#define XM_VECTOR 19
37#define VE_VECTOR 20
38
39/* Select x86 specific features in <linux/kvm.h> */
40#define __KVM_HAVE_PIT
41#define __KVM_HAVE_IOAPIC
42#define __KVM_HAVE_IRQ_LINE
43#define __KVM_HAVE_MSI
44#define __KVM_HAVE_USER_NMI
45#define __KVM_HAVE_MSIX
46#define __KVM_HAVE_MCE
47#define __KVM_HAVE_PIT_STATE2
48#define __KVM_HAVE_XEN_HVM
49#define __KVM_HAVE_VCPU_EVENTS
50#define __KVM_HAVE_DEBUGREGS
51#define __KVM_HAVE_XSAVE
52#define __KVM_HAVE_XCRS
53
54/* Architectural interrupt line count. */
55#define KVM_NR_INTERRUPTS 256
56
57/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
58struct kvm_pic_state {
59	__u8 last_irr;	/* edge detection */
60	__u8 irr;		/* interrupt request register */
61	__u8 imr;		/* interrupt mask register */
62	__u8 isr;		/* interrupt service register */
63	__u8 priority_add;	/* highest irq priority */
64	__u8 irq_base;
65	__u8 read_reg_select;
66	__u8 poll;
67	__u8 special_mask;
68	__u8 init_state;
69	__u8 auto_eoi;
70	__u8 rotate_on_auto_eoi;
71	__u8 special_fully_nested_mode;
72	__u8 init4;		/* true if 4 byte init */
73	__u8 elcr;		/* PIIX edge/trigger selection */
74	__u8 elcr_mask;
75};
76
77#define KVM_IOAPIC_NUM_PINS  24
78struct kvm_ioapic_state {
79	__u64 base_address;
80	__u32 ioregsel;
81	__u32 id;
82	__u32 irr;
83	__u32 pad;
84	union {
85		__u64 bits;
86		struct {
87			__u8 vector;
88			__u8 delivery_mode:3;
89			__u8 dest_mode:1;
90			__u8 delivery_status:1;
91			__u8 polarity:1;
92			__u8 remote_irr:1;
93			__u8 trig_mode:1;
94			__u8 mask:1;
95			__u8 reserve:7;
96			__u8 reserved[4];
97			__u8 dest_id;
98		} fields;
99	} redirtbl[KVM_IOAPIC_NUM_PINS];
100};
101
102#define KVM_IRQCHIP_PIC_MASTER   0
103#define KVM_IRQCHIP_PIC_SLAVE    1
104#define KVM_IRQCHIP_IOAPIC       2
105#define KVM_NR_IRQCHIPS          3
106
107#define KVM_RUN_X86_SMM		 (1 << 0)
108#define KVM_RUN_X86_BUS_LOCK     (1 << 1)
109
110/* for KVM_GET_REGS and KVM_SET_REGS */
111struct kvm_regs {
112	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
113	__u64 rax, rbx, rcx, rdx;
114	__u64 rsi, rdi, rsp, rbp;
115	__u64 r8,  r9,  r10, r11;
116	__u64 r12, r13, r14, r15;
117	__u64 rip, rflags;
118};
119
120/* for KVM_GET_LAPIC and KVM_SET_LAPIC */
121#define KVM_APIC_REG_SIZE 0x400
122struct kvm_lapic_state {
123	char regs[KVM_APIC_REG_SIZE];
124};
125
126struct kvm_segment {
127	__u64 base;
128	__u32 limit;
129	__u16 selector;
130	__u8  type;
131	__u8  present, dpl, db, s, l, g, avl;
132	__u8  unusable;
133	__u8  padding;
134};
135
136struct kvm_dtable {
137	__u64 base;
138	__u16 limit;
139	__u16 padding[3];
140};
141
142
143/* for KVM_GET_SREGS and KVM_SET_SREGS */
144struct kvm_sregs {
145	/* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
146	struct kvm_segment cs, ds, es, fs, gs, ss;
147	struct kvm_segment tr, ldt;
148	struct kvm_dtable gdt, idt;
149	__u64 cr0, cr2, cr3, cr4, cr8;
150	__u64 efer;
151	__u64 apic_base;
152	__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
153};
154
155struct kvm_sregs2 {
156	/* out (KVM_GET_SREGS2) / in (KVM_SET_SREGS2) */
157	struct kvm_segment cs, ds, es, fs, gs, ss;
158	struct kvm_segment tr, ldt;
159	struct kvm_dtable gdt, idt;
160	__u64 cr0, cr2, cr3, cr4, cr8;
161	__u64 efer;
162	__u64 apic_base;
163	__u64 flags;
164	__u64 pdptrs[4];
165};
166#define KVM_SREGS2_FLAGS_PDPTRS_VALID 1
167
168/* for KVM_GET_FPU and KVM_SET_FPU */
169struct kvm_fpu {
170	__u8  fpr[8][16];
171	__u16 fcw;
172	__u16 fsw;
173	__u8  ftwx;  /* in fxsave format */
174	__u8  pad1;
175	__u16 last_opcode;
176	__u64 last_ip;
177	__u64 last_dp;
178	__u8  xmm[16][16];
179	__u32 mxcsr;
180	__u32 pad2;
181};
182
183struct kvm_msr_entry {
184	__u32 index;
185	__u32 reserved;
186	__u64 data;
187};
188
189/* for KVM_GET_MSRS and KVM_SET_MSRS */
190struct kvm_msrs {
191	__u32 nmsrs; /* number of msrs in entries */
192	__u32 pad;
193
194	struct kvm_msr_entry entries[];
195};
196
197/* for KVM_GET_MSR_INDEX_LIST */
198struct kvm_msr_list {
199	__u32 nmsrs; /* number of msrs in entries */
200	__u32 indices[];
201};
202
203/* Maximum size of any access bitmap in bytes */
204#define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600
205
206/* for KVM_X86_SET_MSR_FILTER */
207struct kvm_msr_filter_range {
208#define KVM_MSR_FILTER_READ  (1 << 0)
209#define KVM_MSR_FILTER_WRITE (1 << 1)
210#define KVM_MSR_FILTER_RANGE_VALID_MASK (KVM_MSR_FILTER_READ | \
211					 KVM_MSR_FILTER_WRITE)
212	__u32 flags;
213	__u32 nmsrs; /* number of msrs in bitmap */
214	__u32 base;  /* MSR index the bitmap starts at */
215	__u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */
216};
217
218#define KVM_MSR_FILTER_MAX_RANGES 16
219struct kvm_msr_filter {
220#ifndef __KERNEL__
221#define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
222#endif
223#define KVM_MSR_FILTER_DEFAULT_DENY  (1 << 0)
224#define KVM_MSR_FILTER_VALID_MASK (KVM_MSR_FILTER_DEFAULT_DENY)
225	__u32 flags;
226	struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
227};
228
229struct kvm_cpuid_entry {
230	__u32 function;
231	__u32 eax;
232	__u32 ebx;
233	__u32 ecx;
234	__u32 edx;
235	__u32 padding;
236};
237
238/* for KVM_SET_CPUID */
239struct kvm_cpuid {
240	__u32 nent;
241	__u32 padding;
242	struct kvm_cpuid_entry entries[];
243};
244
245struct kvm_cpuid_entry2 {
246	__u32 function;
247	__u32 index;
248	__u32 flags;
249	__u32 eax;
250	__u32 ebx;
251	__u32 ecx;
252	__u32 edx;
253	__u32 padding[3];
254};
255
256#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX		(1 << 0)
257#define KVM_CPUID_FLAG_STATEFUL_FUNC		(1 << 1)
258#define KVM_CPUID_FLAG_STATE_READ_NEXT		(1 << 2)
259
260/* for KVM_SET_CPUID2 */
261struct kvm_cpuid2 {
262	__u32 nent;
263	__u32 padding;
264	struct kvm_cpuid_entry2 entries[];
265};
266
267/* for KVM_GET_PIT and KVM_SET_PIT */
268struct kvm_pit_channel_state {
269	__u32 count; /* can be 65536 */
270	__u16 latched_count;
271	__u8 count_latched;
272	__u8 status_latched;
273	__u8 status;
274	__u8 read_state;
275	__u8 write_state;
276	__u8 write_latch;
277	__u8 rw_mode;
278	__u8 mode;
279	__u8 bcd;
280	__u8 gate;
281	__s64 count_load_time;
282};
283
284struct kvm_debug_exit_arch {
285	__u32 exception;
286	__u32 pad;
287	__u64 pc;
288	__u64 dr6;
289	__u64 dr7;
290};
291
292#define KVM_GUESTDBG_USE_SW_BP		0x00010000
293#define KVM_GUESTDBG_USE_HW_BP		0x00020000
294#define KVM_GUESTDBG_INJECT_DB		0x00040000
295#define KVM_GUESTDBG_INJECT_BP		0x00080000
296#define KVM_GUESTDBG_BLOCKIRQ		0x00100000
297
298/* for KVM_SET_GUEST_DEBUG */
299struct kvm_guest_debug_arch {
300	__u64 debugreg[8];
301};
302
303struct kvm_pit_state {
304	struct kvm_pit_channel_state channels[3];
305};
306
307#define KVM_PIT_FLAGS_HPET_LEGACY     0x00000001
308#define KVM_PIT_FLAGS_SPEAKER_DATA_ON 0x00000002
309
310struct kvm_pit_state2 {
311	struct kvm_pit_channel_state channels[3];
312	__u32 flags;
313	__u32 reserved[9];
314};
315
316struct kvm_reinject_control {
317	__u8 pit_reinject;
318	__u8 reserved[31];
319};
320
321/* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
322#define KVM_VCPUEVENT_VALID_NMI_PENDING	0x00000001
323#define KVM_VCPUEVENT_VALID_SIPI_VECTOR	0x00000002
324#define KVM_VCPUEVENT_VALID_SHADOW	0x00000004
325#define KVM_VCPUEVENT_VALID_SMM		0x00000008
326#define KVM_VCPUEVENT_VALID_PAYLOAD	0x00000010
327#define KVM_VCPUEVENT_VALID_TRIPLE_FAULT	0x00000020
328
329/* Interrupt shadow states */
330#define KVM_X86_SHADOW_INT_MOV_SS	0x01
331#define KVM_X86_SHADOW_INT_STI		0x02
332
333/* for KVM_GET/SET_VCPU_EVENTS */
334struct kvm_vcpu_events {
335	struct {
336		__u8 injected;
337		__u8 nr;
338		__u8 has_error_code;
339		__u8 pending;
340		__u32 error_code;
341	} exception;
342	struct {
343		__u8 injected;
344		__u8 nr;
345		__u8 soft;
346		__u8 shadow;
347	} interrupt;
348	struct {
349		__u8 injected;
350		__u8 pending;
351		__u8 masked;
352		__u8 pad;
353	} nmi;
354	__u32 sipi_vector;
355	__u32 flags;
356	struct {
357		__u8 smm;
358		__u8 pending;
359		__u8 smm_inside_nmi;
360		__u8 latched_init;
361	} smi;
362	struct {
363		__u8 pending;
364	} triple_fault;
365	__u8 reserved[26];
366	__u8 exception_has_payload;
367	__u64 exception_payload;
368};
369
370/* for KVM_GET/SET_DEBUGREGS */
371struct kvm_debugregs {
372	__u64 db[4];
373	__u64 dr6;
374	__u64 dr7;
375	__u64 flags;
376	__u64 reserved[9];
377};
378
379/* for KVM_CAP_XSAVE and KVM_CAP_XSAVE2 */
380struct kvm_xsave {
381	/*
382	 * KVM_GET_XSAVE2 and KVM_SET_XSAVE write and read as many bytes
383	 * as are returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
384	 * respectively, when invoked on the vm file descriptor.
385	 *
386	 * The size value returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
387	 * will always be at least 4096. Currently, it is only greater
388	 * than 4096 if a dynamic feature has been enabled with
389	 * ``arch_prctl()``, but this may change in the future.
390	 *
391	 * The offsets of the state save areas in struct kvm_xsave follow
392	 * the contents of CPUID leaf 0xD on the host.
393	 */
394	__u32 region[1024];
395	__u32 extra[];
396};
397
398#define KVM_MAX_XCRS	16
399
400struct kvm_xcr {
401	__u32 xcr;
402	__u32 reserved;
403	__u64 value;
404};
405
406struct kvm_xcrs {
407	__u32 nr_xcrs;
408	__u32 flags;
409	struct kvm_xcr xcrs[KVM_MAX_XCRS];
410	__u64 padding[16];
411};
412
413#define KVM_SYNC_X86_REGS      (1UL << 0)
414#define KVM_SYNC_X86_SREGS     (1UL << 1)
415#define KVM_SYNC_X86_EVENTS    (1UL << 2)
416
417#define KVM_SYNC_X86_VALID_FIELDS \
418	(KVM_SYNC_X86_REGS| \
419	 KVM_SYNC_X86_SREGS| \
420	 KVM_SYNC_X86_EVENTS)
421
422/* kvm_sync_regs struct included by kvm_run struct */
423struct kvm_sync_regs {
424	/* Members of this structure are potentially malicious.
425	 * Care must be taken by code reading, esp. interpreting,
426	 * data fields from them inside KVM to prevent TOCTOU and
427	 * double-fetch types of vulnerabilities.
428	 */
429	struct kvm_regs regs;
430	struct kvm_sregs sregs;
431	struct kvm_vcpu_events events;
432};
433
434#define KVM_X86_QUIRK_LINT0_REENABLED		(1 << 0)
435#define KVM_X86_QUIRK_CD_NW_CLEARED		(1 << 1)
436#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE		(1 << 2)
437#define KVM_X86_QUIRK_OUT_7E_INC_RIP		(1 << 3)
438#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT	(1 << 4)
439#define KVM_X86_QUIRK_FIX_HYPERCALL_INSN	(1 << 5)
440#define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS	(1 << 6)
441
442#define KVM_STATE_NESTED_FORMAT_VMX	0
443#define KVM_STATE_NESTED_FORMAT_SVM	1
444
445#define KVM_STATE_NESTED_GUEST_MODE	0x00000001
446#define KVM_STATE_NESTED_RUN_PENDING	0x00000002
447#define KVM_STATE_NESTED_EVMCS		0x00000004
448#define KVM_STATE_NESTED_MTF_PENDING	0x00000008
449#define KVM_STATE_NESTED_GIF_SET	0x00000100
450
451#define KVM_STATE_NESTED_SMM_GUEST_MODE	0x00000001
452#define KVM_STATE_NESTED_SMM_VMXON	0x00000002
453
454#define KVM_STATE_NESTED_VMX_VMCS_SIZE	0x1000
455
456#define KVM_STATE_NESTED_SVM_VMCB_SIZE	0x1000
457
458#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE	0x00000001
459
460/* attributes for system fd (group 0) */
461#define KVM_X86_XCOMP_GUEST_SUPP	0
462
463struct kvm_vmx_nested_state_data {
464	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
465	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
466};
467
468struct kvm_vmx_nested_state_hdr {
469	__u64 vmxon_pa;
470	__u64 vmcs12_pa;
471
472	struct {
473		__u16 flags;
474	} smm;
475
476	__u16 pad;
477
478	__u32 flags;
479	__u64 preemption_timer_deadline;
480};
481
482struct kvm_svm_nested_state_data {
483	/* Save area only used if KVM_STATE_NESTED_RUN_PENDING.  */
484	__u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE];
485};
486
487struct kvm_svm_nested_state_hdr {
488	__u64 vmcb_pa;
489};
490
491/* for KVM_CAP_NESTED_STATE */
492struct kvm_nested_state {
493	__u16 flags;
494	__u16 format;
495	__u32 size;
496
497	union {
498		struct kvm_vmx_nested_state_hdr vmx;
499		struct kvm_svm_nested_state_hdr svm;
500
501		/* Pad the header to 128 bytes.  */
502		__u8 pad[120];
503	} hdr;
504
505	/*
506	 * Define data region as 0 bytes to preserve backwards-compatability
507	 * to old definition of kvm_nested_state in order to avoid changing
508	 * KVM_{GET,PUT}_NESTED_STATE ioctl values.
509	 */
510	union {
511		__DECLARE_FLEX_ARRAY(struct kvm_vmx_nested_state_data, vmx);
512		__DECLARE_FLEX_ARRAY(struct kvm_svm_nested_state_data, svm);
513	} data;
514};
515
516/* for KVM_CAP_PMU_EVENT_FILTER */
517struct kvm_pmu_event_filter {
518	__u32 action;
519	__u32 nevents;
520	__u32 fixed_counter_bitmap;
521	__u32 flags;
522	__u32 pad[4];
523	__u64 events[];
524};
525
526#define KVM_PMU_EVENT_ALLOW 0
527#define KVM_PMU_EVENT_DENY 1
528
529#define KVM_PMU_EVENT_FLAG_MASKED_EVENTS _BITUL(0)
530#define KVM_PMU_EVENT_FLAGS_VALID_MASK (KVM_PMU_EVENT_FLAG_MASKED_EVENTS)
531
532/* for KVM_CAP_MCE */
533struct kvm_x86_mce {
534	__u64 status;
535	__u64 addr;
536	__u64 misc;
537	__u64 mcg_status;
538	__u8 bank;
539	__u8 pad1[7];
540	__u64 pad2[3];
541};
542
543/* for KVM_CAP_XEN_HVM */
544#define KVM_XEN_HVM_CONFIG_HYPERCALL_MSR	(1 << 0)
545#define KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL	(1 << 1)
546#define KVM_XEN_HVM_CONFIG_SHARED_INFO		(1 << 2)
547#define KVM_XEN_HVM_CONFIG_RUNSTATE		(1 << 3)
548#define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL	(1 << 4)
549#define KVM_XEN_HVM_CONFIG_EVTCHN_SEND		(1 << 5)
550#define KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG	(1 << 6)
551#define KVM_XEN_HVM_CONFIG_PVCLOCK_TSC_UNSTABLE	(1 << 7)
552#define KVM_XEN_HVM_CONFIG_SHARED_INFO_HVA	(1 << 8)
553
554struct kvm_xen_hvm_config {
555	__u32 flags;
556	__u32 msr;
557	__u64 blob_addr_32;
558	__u64 blob_addr_64;
559	__u8 blob_size_32;
560	__u8 blob_size_64;
561	__u8 pad2[30];
562};
563
564struct kvm_xen_hvm_attr {
565	__u16 type;
566	__u16 pad[3];
567	union {
568		__u8 long_mode;
569		__u8 vector;
570		__u8 runstate_update_flag;
571		union {
572			__u64 gfn;
573#define KVM_XEN_INVALID_GFN ((__u64)-1)
574			__u64 hva;
575		} shared_info;
576		struct {
577			__u32 send_port;
578			__u32 type; /* EVTCHNSTAT_ipi / EVTCHNSTAT_interdomain */
579			__u32 flags;
580#define KVM_XEN_EVTCHN_DEASSIGN		(1 << 0)
581#define KVM_XEN_EVTCHN_UPDATE		(1 << 1)
582#define KVM_XEN_EVTCHN_RESET		(1 << 2)
583			/*
584			 * Events sent by the guest are either looped back to
585			 * the guest itself (potentially on a different port#)
586			 * or signalled via an eventfd.
587			 */
588			union {
589				struct {
590					__u32 port;
591					__u32 vcpu;
592					__u32 priority;
593				} port;
594				struct {
595					__u32 port; /* Zero for eventfd */
596					__s32 fd;
597				} eventfd;
598				__u32 padding[4];
599			} deliver;
600		} evtchn;
601		__u32 xen_version;
602		__u64 pad[8];
603	} u;
604};
605
606
607/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */
608#define KVM_XEN_ATTR_TYPE_LONG_MODE		0x0
609#define KVM_XEN_ATTR_TYPE_SHARED_INFO		0x1
610#define KVM_XEN_ATTR_TYPE_UPCALL_VECTOR		0x2
611/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
612#define KVM_XEN_ATTR_TYPE_EVTCHN		0x3
613#define KVM_XEN_ATTR_TYPE_XEN_VERSION		0x4
614/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG */
615#define KVM_XEN_ATTR_TYPE_RUNSTATE_UPDATE_FLAG	0x5
616/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO_HVA */
617#define KVM_XEN_ATTR_TYPE_SHARED_INFO_HVA	0x6
618
619struct kvm_xen_vcpu_attr {
620	__u16 type;
621	__u16 pad[3];
622	union {
623		__u64 gpa;
624#define KVM_XEN_INVALID_GPA ((__u64)-1)
625		__u64 hva;
626		__u64 pad[8];
627		struct {
628			__u64 state;
629			__u64 state_entry_time;
630			__u64 time_running;
631			__u64 time_runnable;
632			__u64 time_blocked;
633			__u64 time_offline;
634		} runstate;
635		__u32 vcpu_id;
636		struct {
637			__u32 port;
638			__u32 priority;
639			__u64 expires_ns;
640		} timer;
641		__u8 vector;
642	} u;
643};
644
645/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */
646#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO	0x0
647#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_TIME_INFO	0x1
648#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADDR	0x2
649#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_CURRENT	0x3
650#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA	0x4
651#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST	0x5
652/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
653#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_ID		0x6
654#define KVM_XEN_VCPU_ATTR_TYPE_TIMER		0x7
655#define KVM_XEN_VCPU_ATTR_TYPE_UPCALL_VECTOR	0x8
656/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO_HVA */
657#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO_HVA	0x9
658
659/* Secure Encrypted Virtualization command */
660enum sev_cmd_id {
661	/* Guest initialization commands */
662	KVM_SEV_INIT = 0,
663	KVM_SEV_ES_INIT,
664	/* Guest launch commands */
665	KVM_SEV_LAUNCH_START,
666	KVM_SEV_LAUNCH_UPDATE_DATA,
667	KVM_SEV_LAUNCH_UPDATE_VMSA,
668	KVM_SEV_LAUNCH_SECRET,
669	KVM_SEV_LAUNCH_MEASURE,
670	KVM_SEV_LAUNCH_FINISH,
671	/* Guest migration commands (outgoing) */
672	KVM_SEV_SEND_START,
673	KVM_SEV_SEND_UPDATE_DATA,
674	KVM_SEV_SEND_UPDATE_VMSA,
675	KVM_SEV_SEND_FINISH,
676	/* Guest migration commands (incoming) */
677	KVM_SEV_RECEIVE_START,
678	KVM_SEV_RECEIVE_UPDATE_DATA,
679	KVM_SEV_RECEIVE_UPDATE_VMSA,
680	KVM_SEV_RECEIVE_FINISH,
681	/* Guest status and debug commands */
682	KVM_SEV_GUEST_STATUS,
683	KVM_SEV_DBG_DECRYPT,
684	KVM_SEV_DBG_ENCRYPT,
685	/* Guest certificates commands */
686	KVM_SEV_CERT_EXPORT,
687	/* Attestation report */
688	KVM_SEV_GET_ATTESTATION_REPORT,
689	/* Guest Migration Extension */
690	KVM_SEV_SEND_CANCEL,
691
692	KVM_SEV_NR_MAX,
693};
694
695struct kvm_sev_cmd {
696	__u32 id;
697	__u32 pad0;
698	__u64 data;
699	__u32 error;
700	__u32 sev_fd;
701};
702
703struct kvm_sev_launch_start {
704	__u32 handle;
705	__u32 policy;
706	__u64 dh_uaddr;
707	__u32 dh_len;
708	__u32 pad0;
709	__u64 session_uaddr;
710	__u32 session_len;
711	__u32 pad1;
712};
713
714struct kvm_sev_launch_update_data {
715	__u64 uaddr;
716	__u32 len;
717	__u32 pad0;
718};
719
720
721struct kvm_sev_launch_secret {
722	__u64 hdr_uaddr;
723	__u32 hdr_len;
724	__u32 pad0;
725	__u64 guest_uaddr;
726	__u32 guest_len;
727	__u32 pad1;
728	__u64 trans_uaddr;
729	__u32 trans_len;
730	__u32 pad2;
731};
732
733struct kvm_sev_launch_measure {
734	__u64 uaddr;
735	__u32 len;
736	__u32 pad0;
737};
738
739struct kvm_sev_guest_status {
740	__u32 handle;
741	__u32 policy;
742	__u32 state;
743};
744
745struct kvm_sev_dbg {
746	__u64 src_uaddr;
747	__u64 dst_uaddr;
748	__u32 len;
749	__u32 pad0;
750};
751
752struct kvm_sev_attestation_report {
753	__u8 mnonce[16];
754	__u64 uaddr;
755	__u32 len;
756	__u32 pad0;
757};
758
759struct kvm_sev_send_start {
760	__u32 policy;
761	__u32 pad0;
762	__u64 pdh_cert_uaddr;
763	__u32 pdh_cert_len;
764	__u32 pad1;
765	__u64 plat_certs_uaddr;
766	__u32 plat_certs_len;
767	__u32 pad2;
768	__u64 amd_certs_uaddr;
769	__u32 amd_certs_len;
770	__u32 pad3;
771	__u64 session_uaddr;
772	__u32 session_len;
773	__u32 pad4;
774};
775
776struct kvm_sev_send_update_data {
777	__u64 hdr_uaddr;
778	__u32 hdr_len;
779	__u32 pad0;
780	__u64 guest_uaddr;
781	__u32 guest_len;
782	__u32 pad1;
783	__u64 trans_uaddr;
784	__u32 trans_len;
785	__u32 pad2;
786};
787
788struct kvm_sev_receive_start {
789	__u32 handle;
790	__u32 policy;
791	__u64 pdh_uaddr;
792	__u32 pdh_len;
793	__u32 pad0;
794	__u64 session_uaddr;
795	__u32 session_len;
796	__u32 pad1;
797};
798
799struct kvm_sev_receive_update_data {
800	__u64 hdr_uaddr;
801	__u32 hdr_len;
802	__u32 pad0;
803	__u64 guest_uaddr;
804	__u32 guest_len;
805	__u32 pad1;
806	__u64 trans_uaddr;
807	__u32 trans_len;
808	__u32 pad2;
809};
810
811#define KVM_X2APIC_API_USE_32BIT_IDS            (1ULL << 0)
812#define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK  (1ULL << 1)
813
814struct kvm_hyperv_eventfd {
815	__u32 conn_id;
816	__s32 fd;
817	__u32 flags;
818	__u32 padding[3];
819};
820
821#define KVM_HYPERV_CONN_ID_MASK		0x00ffffff
822#define KVM_HYPERV_EVENTFD_DEASSIGN	(1 << 0)
823
824/*
825 * Masked event layout.
826 * Bits   Description
827 * ----   -----------
828 * 7:0    event select (low bits)
829 * 15:8   umask match
830 * 31:16  unused
831 * 35:32  event select (high bits)
832 * 36:54  unused
833 * 55     exclude bit
834 * 63:56  umask mask
835 */
836
837#define KVM_PMU_ENCODE_MASKED_ENTRY(event_select, mask, match, exclude) \
838	(((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | \
839	(((mask) & 0xFFULL) << 56) | \
840	(((match) & 0xFFULL) << 8) | \
841	((__u64)(!!(exclude)) << 55))
842
843#define KVM_PMU_MASKED_ENTRY_EVENT_SELECT \
844	(__GENMASK_ULL(7, 0) | __GENMASK_ULL(35, 32))
845#define KVM_PMU_MASKED_ENTRY_UMASK_MASK		(__GENMASK_ULL(63, 56))
846#define KVM_PMU_MASKED_ENTRY_UMASK_MATCH	(__GENMASK_ULL(15, 8))
847#define KVM_PMU_MASKED_ENTRY_EXCLUDE		(_BITULL(55))
848#define KVM_PMU_MASKED_ENTRY_UMASK_MASK_SHIFT	(56)
849
850/* for KVM_{GET,SET,HAS}_DEVICE_ATTR */
851#define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */
852#define   KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */
853
854/* x86-specific KVM_EXIT_HYPERCALL flags. */
855#define KVM_EXIT_HYPERCALL_LONG_MODE	_BITULL(0)
856
857#define KVM_X86_DEFAULT_VM	0
858#define KVM_X86_SW_PROTECTED_VM	1
859
860#endif /* _ASM_X86_KVM_H */
861