150276Speter/* SPDX-License-Identifier: GPL-2.0 */ 2262629Sdelphij#ifndef _ASM_X86_PROCESSOR_FLAGS_H 350276Speter#define _ASM_X86_PROCESSOR_FLAGS_H 450276Speter 550276Speter#include <uapi/asm/processor-flags.h> 650276Speter#include <linux/mem_encrypt.h> 750276Speter 850276Speter#ifdef CONFIG_VM86 950276Speter#define X86_VM_MASK X86_EFLAGS_VM 1050276Speter#else 1150276Speter#define X86_VM_MASK 0 /* No VM86 support */ 1250276Speter#endif 1350276Speter 1450276Speter/* 1550276Speter * CR3's layout varies depending on several things. 1650276Speter * 1750276Speter * If CR4.PCIDE is set (64-bit only), then CR3[11:0] is the address space ID. 1850276Speter * If PAE is enabled, then CR3[11:5] is part of the PDPT address 1950276Speter * (i.e. it's 32-byte aligned, not page-aligned) and CR3[4:0] is ignored. 2050276Speter * Otherwise (non-PAE, non-PCID), CR3[3] is PWT, CR3[4] is PCD, and 2150276Speter * CR3[2:0] and CR3[11:5] are ignored. 2250276Speter * 2350276Speter * In all cases, Linux puts zeros in the low ignored bits and in PWT and PCD. 2450276Speter * 2550276Speter * CR3[63] is always read as zero. If CR4.PCIDE is set, then CR3[63] may be 2650276Speter * written as 1 to prevent the write to CR3 from flushing the TLB. 2750276Speter * 2850276Speter * On systems with SME, one bit (in a variable position!) is stolen to indicate 2950276Speter * that the top-level paging structure is encrypted. 3050276Speter * 3150276Speter * On systemms with LAM, bits 61 and 62 are used to indicate LAM mode. 32262629Sdelphij * 3350276Speter * All of the remaining bits indicate the physical address of the top-level 3450276Speter * paging structure. 35262629Sdelphij * 36166124Srafan * CR3_ADDR_MASK is the mask used by read_cr3_pa(). 3750276Speter */ 3850276Speter#ifdef CONFIG_X86_64 3976726Speter/* Mask off the address space ID and SME encryption bits. */ 4076726Speter#define CR3_ADDR_MASK __sme_clr(PHYSICAL_PAGE_MASK) 4150276Speter#define CR3_PCID_MASK 0xFFFull 4250276Speter#define CR3_NOFLUSH BIT_ULL(63) 4350276Speter 4450276Speter#else 4550276Speter/* 4656639Speter * CR3_ADDR_MASK needs at least bits 31:5 set on PAE systems, and we save 4756639Speter * a tiny bit of code size by setting all the bits. 4856639Speter */ 4956639Speter#define CR3_ADDR_MASK 0xFFFFFFFFull 5056639Speter#define CR3_PCID_MASK 0ull 5150276Speter#define CR3_NOFLUSH 0 5250276Speter#endif 5350276Speter 5450276Speter#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION 5550276Speter# define X86_CR3_PTI_PCID_USER_BIT 11 5676726Speter#endif 5776726Speter 5876726Speter#endif /* _ASM_X86_PROCESSOR_FLAGS_H */ 5976726Speter