1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *  S390 version
4 *
5 *  Derived from "include/asm-i386/mmu_context.h"
6 */
7
8#ifndef __S390_MMU_CONTEXT_H
9#define __S390_MMU_CONTEXT_H
10
11#include <asm/pgalloc.h>
12#include <linux/uaccess.h>
13#include <linux/mm_types.h>
14#include <asm/tlbflush.h>
15#include <asm/ctlreg.h>
16#include <asm-generic/mm_hooks.h>
17
18#define init_new_context init_new_context
19static inline int init_new_context(struct task_struct *tsk,
20				   struct mm_struct *mm)
21{
22	unsigned long asce_type, init_entry;
23
24	spin_lock_init(&mm->context.lock);
25	INIT_LIST_HEAD(&mm->context.gmap_list);
26	cpumask_clear(&mm->context.cpu_attach_mask);
27	atomic_set(&mm->context.flush_count, 0);
28	atomic_set(&mm->context.protected_count, 0);
29	mm->context.gmap_asce = 0;
30	mm->context.flush_mm = 0;
31#ifdef CONFIG_PGSTE
32	mm->context.alloc_pgste = page_table_allocate_pgste ||
33		test_thread_flag(TIF_PGSTE) ||
34		(current->mm && current->mm->context.alloc_pgste);
35	mm->context.has_pgste = 0;
36	mm->context.uses_skeys = 0;
37	mm->context.uses_cmm = 0;
38	mm->context.allow_gmap_hpage_1m = 0;
39#endif
40	switch (mm->context.asce_limit) {
41	default:
42		/*
43		 * context created by exec, the value of asce_limit can
44		 * only be zero in this case
45		 */
46		VM_BUG_ON(mm->context.asce_limit);
47		/* continue as 3-level task */
48		mm->context.asce_limit = _REGION2_SIZE;
49		fallthrough;
50	case _REGION2_SIZE:
51		/* forked 3-level task */
52		init_entry = _REGION3_ENTRY_EMPTY;
53		asce_type = _ASCE_TYPE_REGION3;
54		break;
55	case TASK_SIZE_MAX:
56		/* forked 5-level task */
57		init_entry = _REGION1_ENTRY_EMPTY;
58		asce_type = _ASCE_TYPE_REGION1;
59		break;
60	case _REGION1_SIZE:
61		/* forked 4-level task */
62		init_entry = _REGION2_ENTRY_EMPTY;
63		asce_type = _ASCE_TYPE_REGION2;
64		break;
65	}
66	mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
67			   _ASCE_USER_BITS | asce_type;
68	crst_table_init((unsigned long *) mm->pgd, init_entry);
69	return 0;
70}
71
72static inline void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
73				      struct task_struct *tsk)
74{
75	int cpu = smp_processor_id();
76
77	if (next == &init_mm)
78		S390_lowcore.user_asce = s390_invalid_asce;
79	else
80		S390_lowcore.user_asce.val = next->context.asce;
81	cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
82	/* Clear previous user-ASCE from CR7 */
83	local_ctl_load(7, &s390_invalid_asce);
84	if (prev != next)
85		cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
86}
87#define switch_mm_irqs_off switch_mm_irqs_off
88
89static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
90			     struct task_struct *tsk)
91{
92	unsigned long flags;
93
94	local_irq_save(flags);
95	switch_mm_irqs_off(prev, next, tsk);
96	local_irq_restore(flags);
97}
98
99#define finish_arch_post_lock_switch finish_arch_post_lock_switch
100static inline void finish_arch_post_lock_switch(void)
101{
102	struct task_struct *tsk = current;
103	struct mm_struct *mm = tsk->mm;
104
105	if (mm) {
106		preempt_disable();
107		while (atomic_read(&mm->context.flush_count))
108			cpu_relax();
109		cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
110		__tlb_flush_mm_lazy(mm);
111		preempt_enable();
112	}
113	local_ctl_load(7, &S390_lowcore.user_asce);
114}
115
116#define activate_mm activate_mm
117static inline void activate_mm(struct mm_struct *prev,
118                               struct mm_struct *next)
119{
120	switch_mm(prev, next, current);
121	cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
122	local_ctl_load(7, &S390_lowcore.user_asce);
123}
124
125#include <asm-generic/mmu_context.h>
126
127#endif /* __S390_MMU_CONTEXT_H */
128