1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *    Copyright IBM Corp. 1999, 2012
4 *    Author(s): Hartmut Penner <hp@de.ibm.com>,
5 *		 Martin Schwidefsky <schwidefsky@de.ibm.com>,
6 *		 Denis Joseph Barrow,
7 */
8
9#ifndef _ASM_S390_LOWCORE_H
10#define _ASM_S390_LOWCORE_H
11
12#include <linux/types.h>
13#include <asm/ptrace.h>
14#include <asm/ctlreg.h>
15#include <asm/cpu.h>
16#include <asm/types.h>
17
18#define LC_ORDER 1
19#define LC_PAGES 2
20
21struct pgm_tdb {
22	u64 data[32];
23};
24
25struct lowcore {
26	__u8	pad_0x0000[0x0014-0x0000];	/* 0x0000 */
27	__u32	ipl_parmblock_ptr;		/* 0x0014 */
28	__u8	pad_0x0018[0x0080-0x0018];	/* 0x0018 */
29	__u32	ext_params;			/* 0x0080 */
30	union {
31		struct {
32			__u16 ext_cpu_addr;	/* 0x0084 */
33			__u16 ext_int_code;	/* 0x0086 */
34		};
35		__u32 ext_int_code_addr;
36	};
37	__u32	svc_int_code;			/* 0x0088 */
38	union {
39		struct {
40			__u16	pgm_ilc;	/* 0x008c */
41			__u16	pgm_code;	/* 0x008e */
42		};
43		__u32 pgm_int_code;
44	};
45	__u32	data_exc_code;			/* 0x0090 */
46	__u16	mon_class_num;			/* 0x0094 */
47	union {
48		struct {
49			__u8	per_code;	/* 0x0096 */
50			__u8	per_atmid;	/* 0x0097 */
51		};
52		__u16 per_code_combined;
53	};
54	__u64	per_address;			/* 0x0098 */
55	__u8	exc_access_id;			/* 0x00a0 */
56	__u8	per_access_id;			/* 0x00a1 */
57	__u8	op_access_id;			/* 0x00a2 */
58	__u8	ar_mode_id;			/* 0x00a3 */
59	__u8	pad_0x00a4[0x00a8-0x00a4];	/* 0x00a4 */
60	__u64	trans_exc_code;			/* 0x00a8 */
61	__u64	monitor_code;			/* 0x00b0 */
62	union {
63		struct {
64			__u16	subchannel_id;	/* 0x00b8 */
65			__u16	subchannel_nr;	/* 0x00ba */
66			__u32	io_int_parm;	/* 0x00bc */
67			__u32	io_int_word;	/* 0x00c0 */
68		};
69		struct tpi_info	tpi_info;	/* 0x00b8 */
70	};
71	__u8	pad_0x00c4[0x00c8-0x00c4];	/* 0x00c4 */
72	__u32	stfl_fac_list;			/* 0x00c8 */
73	__u8	pad_0x00cc[0x00e8-0x00cc];	/* 0x00cc */
74	__u64	mcck_interruption_code;		/* 0x00e8 */
75	__u8	pad_0x00f0[0x00f4-0x00f0];	/* 0x00f0 */
76	__u32	external_damage_code;		/* 0x00f4 */
77	__u64	failing_storage_address;	/* 0x00f8 */
78	__u8	pad_0x0100[0x0110-0x0100];	/* 0x0100 */
79	__u64	pgm_last_break;			/* 0x0110 */
80	__u8	pad_0x0118[0x0120-0x0118];	/* 0x0118 */
81	psw_t	restart_old_psw;		/* 0x0120 */
82	psw_t	external_old_psw;		/* 0x0130 */
83	psw_t	svc_old_psw;			/* 0x0140 */
84	psw_t	program_old_psw;		/* 0x0150 */
85	psw_t	mcck_old_psw;			/* 0x0160 */
86	psw_t	io_old_psw;			/* 0x0170 */
87	__u8	pad_0x0180[0x01a0-0x0180];	/* 0x0180 */
88	psw_t	restart_psw;			/* 0x01a0 */
89	psw_t	external_new_psw;		/* 0x01b0 */
90	psw_t	svc_new_psw;			/* 0x01c0 */
91	psw_t	program_new_psw;		/* 0x01d0 */
92	psw_t	mcck_new_psw;			/* 0x01e0 */
93	psw_t	io_new_psw;			/* 0x01f0 */
94
95	/* Save areas. */
96	__u64	save_area_sync[8];		/* 0x0200 */
97	__u64	save_area_async[8];		/* 0x0240 */
98	__u64	save_area_restart[1];		/* 0x0280 */
99
100	/* CPU flags. */
101	__u64	cpu_flags;			/* 0x0288 */
102
103	/* Return psws. */
104	psw_t	return_psw;			/* 0x0290 */
105	psw_t	return_mcck_psw;		/* 0x02a0 */
106
107	__u64	last_break;			/* 0x02b0 */
108
109	/* CPU accounting and timing values. */
110	__u64	sys_enter_timer;		/* 0x02b8 */
111	__u64	mcck_enter_timer;		/* 0x02c0 */
112	__u64	exit_timer;			/* 0x02c8 */
113	__u64	user_timer;			/* 0x02d0 */
114	__u64	guest_timer;			/* 0x02d8 */
115	__u64	system_timer;			/* 0x02e0 */
116	__u64	hardirq_timer;			/* 0x02e8 */
117	__u64	softirq_timer;			/* 0x02f0 */
118	__u64	steal_timer;			/* 0x02f8 */
119	__u64	avg_steal_timer;		/* 0x0300 */
120	__u64	last_update_timer;		/* 0x0308 */
121	__u64	last_update_clock;		/* 0x0310 */
122	__u64	int_clock;			/* 0x0318 */
123	__u8	pad_0x0320[0x0328-0x0320];	/* 0x0320 */
124	__u64	clock_comparator;		/* 0x0328 */
125	__u64	boot_clock[2];			/* 0x0330 */
126
127	/* Current process. */
128	__u64	current_task;			/* 0x0340 */
129	__u64	kernel_stack;			/* 0x0348 */
130
131	/* Interrupt, DAT-off and restartstack. */
132	__u64	async_stack;			/* 0x0350 */
133	__u64	nodat_stack;			/* 0x0358 */
134	__u64	restart_stack;			/* 0x0360 */
135	__u64	mcck_stack;			/* 0x0368 */
136	/* Restart function and parameter. */
137	__u64	restart_fn;			/* 0x0370 */
138	__u64	restart_data;			/* 0x0378 */
139	__u32	restart_source;			/* 0x0380 */
140	__u32	restart_flags;			/* 0x0384 */
141
142	/* Address space pointer. */
143	struct ctlreg kernel_asce;		/* 0x0388 */
144	struct ctlreg user_asce;		/* 0x0390 */
145
146	/*
147	 * The lpp and current_pid fields form a
148	 * 64-bit value that is set as program
149	 * parameter with the LPP instruction.
150	 */
151	__u32	lpp;				/* 0x0398 */
152	__u32	current_pid;			/* 0x039c */
153
154	/* SMP info area */
155	__u32	cpu_nr;				/* 0x03a0 */
156	__u32	softirq_pending;		/* 0x03a4 */
157	__s32	preempt_count;			/* 0x03a8 */
158	__u32	spinlock_lockval;		/* 0x03ac */
159	__u32	spinlock_index;			/* 0x03b0 */
160	__u8	pad_0x03b4[0x03b8-0x03b4];	/* 0x03b4 */
161	__u64	percpu_offset;			/* 0x03b8 */
162	__u8	pad_0x03c0[0x03c8-0x03c0];	/* 0x03c0 */
163	__u64	machine_flags;			/* 0x03c8 */
164	__u64	gmap;				/* 0x03d0 */
165	__u8	pad_0x03d8[0x0400-0x03d8];	/* 0x03d8 */
166
167	__u32	return_lpswe;			/* 0x0400 */
168	__u32	return_mcck_lpswe;		/* 0x0404 */
169	__u8	pad_0x040a[0x0e00-0x0408];	/* 0x0408 */
170
171	/*
172	 * 0xe00 contains the address of the IPL Parameter Information
173	 * block. Dump tools need IPIB for IPL after dump.
174	 * Note: do not change the position of any fields in 0x0e00-0x0f00
175	 */
176	__u64	ipib;				/* 0x0e00 */
177	__u32	ipib_checksum;			/* 0x0e08 */
178	__u64	vmcore_info;			/* 0x0e0c */
179	__u8	pad_0x0e14[0x0e18-0x0e14];	/* 0x0e14 */
180	__u64	os_info;			/* 0x0e18 */
181	__u8	pad_0x0e20[0x11b0-0x0e20];	/* 0x0e20 */
182
183	/* Pointer to the machine check extended save area */
184	__u64	mcesad;				/* 0x11b0 */
185
186	/* 64 bit extparam used for pfault/diag 250: defined by architecture */
187	__u64	ext_params2;			/* 0x11B8 */
188	__u8	pad_0x11c0[0x1200-0x11C0];	/* 0x11C0 */
189
190	/* CPU register save area: defined by architecture */
191	__u64	floating_pt_save_area[16];	/* 0x1200 */
192	__u64	gpregs_save_area[16];		/* 0x1280 */
193	psw_t	psw_save_area;			/* 0x1300 */
194	__u8	pad_0x1310[0x1318-0x1310];	/* 0x1310 */
195	__u32	prefixreg_save_area;		/* 0x1318 */
196	__u32	fpt_creg_save_area;		/* 0x131c */
197	__u8	pad_0x1320[0x1324-0x1320];	/* 0x1320 */
198	__u32	tod_progreg_save_area;		/* 0x1324 */
199	__u32	cpu_timer_save_area[2];		/* 0x1328 */
200	__u32	clock_comp_save_area[2];	/* 0x1330 */
201	__u64	last_break_save_area;		/* 0x1338 */
202	__u32	access_regs_save_area[16];	/* 0x1340 */
203	struct ctlreg cregs_save_area[16];	/* 0x1380 */
204	__u8	pad_0x1400[0x1500-0x1400];	/* 0x1400 */
205	/* Cryptography-counter designation */
206	__u64	ccd;				/* 0x1500 */
207	/* AI-extension counter designation */
208	__u64	aicd;				/* 0x1508 */
209	__u8	pad_0x1510[0x1800-0x1510];	/* 0x1510 */
210
211	/* Transaction abort diagnostic block */
212	struct pgm_tdb pgm_tdb;			/* 0x1800 */
213	__u8	pad_0x1900[0x2000-0x1900];	/* 0x1900 */
214} __packed __aligned(8192);
215
216#define S390_lowcore (*((struct lowcore *) 0))
217
218extern struct lowcore *lowcore_ptr[];
219
220static inline void set_prefix(__u32 address)
221{
222	asm volatile("spx %0" : : "Q" (address) : "memory");
223}
224
225#endif /* _ASM_S390_LOWCORE_H */
226