1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Performance event support - Freescale embedded specific definitions.
4 *
5 * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
6 * Copyright 2010 Freescale Semiconductor, Inc.
7 */
8
9#include <linux/types.h>
10#include <asm/hw_irq.h>
11
12#define MAX_HWEVENTS 6
13
14/* event flags */
15#define FSL_EMB_EVENT_VALID      1
16#define FSL_EMB_EVENT_RESTRICTED 2
17
18/* upper half of event flags is PMLCb */
19#define FSL_EMB_EVENT_THRESHMUL  0x0000070000000000ULL
20#define FSL_EMB_EVENT_THRESH     0x0000003f00000000ULL
21
22struct fsl_emb_pmu {
23	const char	*name;
24	int		n_counter; /* total number of counters */
25
26	/*
27	 * The number of contiguous counters starting at zero that
28	 * can hold restricted events, or zero if there are no
29	 * restricted events.
30	 *
31	 * This isn't a very flexible method of expressing constraints,
32	 * but it's very simple and is adequate for existing chips.
33	 */
34	int		n_restricted;
35
36	/* Returns event flags and PMLCb (FSL_EMB_EVENT_*) */
37	u64		(*xlate_event)(u64 event_id);
38
39	int		n_generic;
40	int		*generic_events;
41	int		(*cache_events)[PERF_COUNT_HW_CACHE_MAX]
42			       [PERF_COUNT_HW_CACHE_OP_MAX]
43			       [PERF_COUNT_HW_CACHE_RESULT_MAX];
44};
45
46int register_fsl_emb_pmu(struct fsl_emb_pmu *);
47