1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * arch/powerpc/boot/wii-head.S
4 *
5 * Nintendo Wii bootwrapper entry.
6 * Copyright (C) 2008-2009 The GameCube Linux Team
7 * Copyright (C) 2008,2009 Albert Herranz
8 */
9
10#include "ppc_asm.h"
11
12/*
13 * The entry code does no assumptions regarding:
14 * - if the data and instruction caches are enabled or not
15 * - if the MMU is enabled or not
16 * - if the high BATs are enabled or not
17 *
18 * We enable the high BATs, enable the caches if not already enabled,
19 * enable the MMU with an identity mapping scheme and jump to the start code.
20 */
21
22	.text
23
24	.globl _zimage_start
25_zimage_start:
26
27	/* turn the MMU off */
28	mfmsr	9
29	rlwinm	9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
30	bcl	20, 31, 1f
311:
32	mflr	8
33	clrlwi	8, 8, 3		/* convert to a real address */
34	addi	8, 8, _mmu_off - 1b
35	mtsrr0	8
36	mtsrr1	9
37	rfi
38_mmu_off:
39	/* MMU disabled */
40
41	/* setup BATs */
42	isync
43	li      8, 0
44	mtspr	0x210, 8	/* IBAT0U */
45	mtspr	0x212, 8	/* IBAT1U */
46	mtspr	0x214, 8	/* IBAT2U */
47	mtspr	0x216, 8	/* IBAT3U */
48	mtspr	0x218, 8	/* DBAT0U */
49	mtspr	0x21a, 8	/* DBAT1U */
50	mtspr	0x21c, 8	/* DBAT2U */
51	mtspr	0x21e, 8	/* DBAT3U */
52
53	mtspr	0x230, 8	/* IBAT4U */
54	mtspr	0x232, 8	/* IBAT5U */
55	mtspr	0x234, 8	/* IBAT6U */
56	mtspr	0x236, 8	/* IBAT7U */
57	mtspr	0x238, 8	/* DBAT4U */
58	mtspr	0x23a, 8	/* DBAT5U */
59	mtspr	0x23c, 8	/* DBAT6U */
60	mtspr	0x23e, 8	/* DBAT7U */
61
62	li	8, 0x01ff	/* first 16MiB */
63	li	9, 0x0002	/* rw */
64	mtspr	0x211, 9	/* IBAT0L */
65	mtspr	0x210, 8	/* IBAT0U */
66	mtspr	0x219, 9	/* DBAT0L */
67	mtspr	0x218, 8	/* DBAT0U */
68
69	lis	8, 0x0c00	/* I/O mem */
70	ori	8, 8, 0x3ff	/* 32MiB */
71	lis	9, 0x0c00
72	ori	9, 9, 0x002a	/* uncached, guarded, rw */
73	mtspr	0x21b, 9	/* DBAT1L */
74	mtspr	0x21a, 8	/* DBAT1U */
75
76	lis	8, 0x0100	/* next 8MiB */
77	ori	8, 8, 0x00ff	/* 8MiB */
78	lis	9, 0x0100
79	ori	9, 9, 0x0002	/* rw */
80	mtspr	0x215, 9	/* IBAT2L */
81	mtspr	0x214, 8	/* IBAT2U */
82	mtspr	0x21d, 9	/* DBAT2L */
83	mtspr	0x21c, 8	/* DBAT2U */
84
85	lis	8, 0x1000	/* MEM2 */
86	ori	8, 8, 0x07ff	/* 64MiB */
87	lis	9, 0x1000
88	ori	9, 9, 0x0002	/* rw */
89	mtspr	0x216, 8	/* IBAT3U */
90	mtspr	0x217, 9	/* IBAT3L */
91	mtspr	0x21e, 8	/* DBAT3U */
92	mtspr	0x21f, 9	/* DBAT3L */
93
94	/* enable the high BATs */
95	mfspr	8, 0x3f3	/* HID4 */
96	oris	8, 8, 0x0200
97	mtspr	0x3f3, 8	/* HID4 */
98
99	/* enable and invalidate the caches if not already enabled */
100	mfspr	8, 0x3f0	/* HID0 */
101	andi.	0, 8, (1<<15)		/* HID0_ICE */
102	bne	1f
103	ori	8, 8, (1<<15)|(1<<11)	/* HID0_ICE|HID0_ICFI*/
1041:
105	andi.	0, 8, (1<<14)		/* HID0_DCE */
106	bne	1f
107	ori	8, 8, (1<<14)|(1<<10)	/* HID0_DCE|HID0_DCFI*/
1081:
109	mtspr	0x3f0, 8	/* HID0 */
110	isync
111
112	/* initialize arguments */
113	li	3, 0
114	li	4, 0
115	li	5, 0
116
117	/* turn the MMU on */
118	bcl	20, 31, 1f
1191:
120	mflr	8
121	addi	8, 8, _mmu_on - 1b
122	mfmsr	9
123	ori	9, 9, (1<<4)|(1<<5) /* MSR_DR|MSR_IR */
124	mtsrr0	8
125	mtsrr1	9
126	sync
127	rfi
128_mmu_on:
129	/* turn on the front blue led (aka: yay! we got here!) */
130	lis	8, 0x0d00
131	ori	8, 8, 0x00c0
132	lwz	9, 0(8)
133	ori	9, 9, 0x20
134	stw	9, 0(8)
135
136	b _zimage_start_lib
137
138