1145519Sdarrenr// SPDX-License-Identifier: GPL-2.0 2145510Sdarrenr/ { 3145510Sdarrenr #address-cells = <1>; 4255332Scy #size-cells = <1>; 5145510Sdarrenr compatible = "lantiq,xway", "lantiq,danube"; 6145510Sdarrenr 7145510Sdarrenr cpus { 8255332Scy cpu@0 { 9145510Sdarrenr compatible = "mips,mips24Kc"; 10145510Sdarrenr }; 11145510Sdarrenr }; 12145510Sdarrenr 13145510Sdarrenr biu@1f800000 { 14145510Sdarrenr #address-cells = <1>; 15255332Scy #size-cells = <1>; 16255332Scy compatible = "lantiq,biu", "simple-bus"; 17255332Scy reg = <0x1f800000 0x800000>; 18145510Sdarrenr ranges = <0x0 0x1f800000 0x7fffff>; 19145510Sdarrenr 20145510Sdarrenr icu0: icu@80200 { 21145510Sdarrenr #interrupt-cells = <1>; 22145510Sdarrenr interrupt-controller; 23145510Sdarrenr compatible = "lantiq,icu"; 24145510Sdarrenr reg = <0x80200 0x120>; 25145510Sdarrenr }; 26145510Sdarrenr 27145510Sdarrenr watchdog@803f0 { 28145510Sdarrenr compatible = "lantiq,wdt"; 29145510Sdarrenr reg = <0x803f0 0x10>; 30145510Sdarrenr }; 31145510Sdarrenr }; 32145510Sdarrenr 33145510Sdarrenr sram@1f000000 { 34145510Sdarrenr #address-cells = <1>; 35145510Sdarrenr #size-cells = <1>; 36145510Sdarrenr compatible = "lantiq,sram"; 37145510Sdarrenr reg = <0x1f000000 0x800000>; 38145510Sdarrenr ranges = <0x0 0x1f000000 0x7fffff>; 39145510Sdarrenr 40145510Sdarrenr eiu0: eiu@101000 { 41145510Sdarrenr #interrupt-cells = <1>; 42145510Sdarrenr interrupt-controller; 43145510Sdarrenr compatible = "lantiq,eiu-xway"; 44145510Sdarrenr reg = <0x101000 0x1000>; 45145510Sdarrenr }; 46145510Sdarrenr 47145510Sdarrenr pmu0: pmu@102000 { 48145510Sdarrenr compatible = "lantiq,pmu-xway"; 49145510Sdarrenr reg = <0x102000 0x1000>; 50145510Sdarrenr }; 51145510Sdarrenr 52145510Sdarrenr cgu0: cgu@103000 { 53145510Sdarrenr compatible = "lantiq,cgu-xway"; 54145510Sdarrenr reg = <0x103000 0x1000>; 55145510Sdarrenr #clock-cells = <1>; 56145510Sdarrenr }; 57145510Sdarrenr 58145510Sdarrenr rcu0: rcu@203000 { 59145510Sdarrenr compatible = "lantiq,rcu-xway"; 60145510Sdarrenr reg = <0x203000 0x1000>; 61145510Sdarrenr }; 62145510Sdarrenr }; 63145510Sdarrenr 64145510Sdarrenr fpi@10000000 { 65145510Sdarrenr #address-cells = <1>; 66 #size-cells = <1>; 67 compatible = "lantiq,fpi", "simple-bus"; 68 ranges = <0x0 0x10000000 0xeefffff>; 69 reg = <0x10000000 0xef00000>; 70 71 gptu@e100a00 { 72 compatible = "lantiq,gptu-xway"; 73 reg = <0xe100a00 0x100>; 74 }; 75 76 serial@e100c00 { 77 compatible = "lantiq,asc"; 78 reg = <0xe100c00 0x400>; 79 interrupt-parent = <&icu0>; 80 interrupts = <112 113 114>; 81 }; 82 83 dma0: dma@e104100 { 84 compatible = "lantiq,dma-xway"; 85 reg = <0xe104100 0x800>; 86 }; 87 88 ebu0: ebu@e105300 { 89 compatible = "lantiq,ebu-xway"; 90 reg = <0xe105300 0x100>; 91 }; 92 93 pci0: pci@e105400 { 94 #address-cells = <3>; 95 #size-cells = <2>; 96 #interrupt-cells = <1>; 97 compatible = "lantiq,pci-xway"; 98 bus-range = <0x0 0x0>; 99 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */ 100 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */ 101 reg = <0x7000000 0x8000 /* config space */ 102 0xe105400 0x400>; /* pci bridge */ 103 }; 104 }; 105}; 106