1179100Syongari/* SPDX-License-Identifier: GPL-2.0-only */ 2179100Syongari/* 3179100Syongari * Page table support for the Hexagon architecture 4179100Syongari * 5179100Syongari * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. 6179100Syongari */ 7179100Syongari 8179100Syongari#ifndef _ASM_PGTABLE_H 9179100Syongari#define _ASM_PGTABLE_H 10179100Syongari 11179100Syongari/* 12179100Syongari * Page table definitions for Qualcomm Hexagon processor. 13179100Syongari */ 14179100Syongari#include <asm/page.h> 15179100Syongari#include <asm-generic/pgtable-nopmd.h> 16179100Syongari 17179100Syongari/* A handy thing to have if one has the RAM. Declared in head.S */ 18179100Syongariextern unsigned long empty_zero_page; 19179100Syongari 20179100Syongari/* 21179100Syongari * The PTE model described here is that of the Hexagon Virtual Machine, 22179100Syongari * which autonomously walks 2-level page tables. At a lower level, we 23179100Syongari * also describe the RISCish software-loaded TLB entry structure of 24179100Syongari * the underlying Hexagon processor. A kernel built to run on the 25179100Syongari * virtual machine has no need to know about the underlying hardware. 26179100Syongari */ 27179100Syongari#include <asm/vm_mmu.h> 28179100Syongari 29179100Syongari/* 30179100Syongari * To maximize the comfort level for the PTE manipulation macros, 31179100Syongari * define the "well known" architecture-specific bits. 32179100Syongari */ 33179100Syongari#define _PAGE_READ __HVM_PTE_R 34179100Syongari#define _PAGE_WRITE __HVM_PTE_W 35179100Syongari#define _PAGE_EXECUTE __HVM_PTE_X 36179100Syongari#define _PAGE_USER __HVM_PTE_U 37179100Syongari 38179100Syongari/* 39179100Syongari * We have a total of 4 "soft" bits available in the abstract PTE. 40179100Syongari * The two mandatory software bits are Dirty and Accessed. 41179100Syongari * To make nonlinear swap work according to the more recent 42179100Syongari * model, we want a low order "Present" bit to indicate whether 43179100Syongari * the PTE describes MMU programming or swap space. 44179100Syongari */ 45179100Syongari#define _PAGE_PRESENT (1<<0) 46179100Syongari#define _PAGE_DIRTY (1<<1) 47179100Syongari#define _PAGE_ACCESSED (1<<2) 48179100Syongari 49179100Syongari/* 50257176Sglebius * For now, let's say that Valid and Present are the same thing. 51179100Syongari * Alternatively, we could say that it's the "or" of R, W, and X 52179100Syongari * permissions. 53179100Syongari */ 54179100Syongari#define _PAGE_VALID _PAGE_PRESENT 55179100Syongari 56179100Syongari/* 57179100Syongari * We're not defining _PAGE_GLOBAL here, since there's no concept 58179100Syongari * of global pages or ASIDs exposed to the Hexagon Virtual Machine, 59179100Syongari * and we want to use the same page table structures and macros in 60179100Syongari * the native kernel as we do in the virtual machine kernel. 61179100Syongari * So we'll put up with a bit of inefficiency for now... 62179100Syongari */ 63179100Syongari 64179100Syongari/* We borrow bit 6 to store the exclusive marker in swap PTEs. */ 65179100Syongari#define _PAGE_SWP_EXCLUSIVE (1<<6) 66179100Syongari 67179100Syongari/* 68179100Syongari * Top "FOURTH" level (pgd), which for the Hexagon VM is really 69179100Syongari * only the second from the bottom, pgd and pud both being collapsed. 70179100Syongari * Each entry represents 4MB of virtual address space, 4K of table 71179100Syongari * thus maps the full 4GB. 72179100Syongari */ 73179100Syongari#define PGDIR_SHIFT 22 74179100Syongari#define PTRS_PER_PGD 1024 75179100Syongari 76179100Syongari#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 77179100Syongari#define PGDIR_MASK (~(PGDIR_SIZE-1)) 78179100Syongari 79179100Syongari#ifdef CONFIG_PAGE_SIZE_4KB 80179100Syongari#define PTRS_PER_PTE 1024 81179100Syongari#endif 82179100Syongari 83179100Syongari#ifdef CONFIG_PAGE_SIZE_16KB 84179100Syongari#define PTRS_PER_PTE 256 85179100Syongari#endif 86179100Syongari 87179100Syongari#ifdef CONFIG_PAGE_SIZE_64KB 88179100Syongari#define PTRS_PER_PTE 64 89179100Syongari#endif 90179100Syongari 91179100Syongari#ifdef CONFIG_PAGE_SIZE_256KB 92179100Syongari#define PTRS_PER_PTE 16 93179100Syongari#endif 94179100Syongari 95179100Syongari#ifdef CONFIG_PAGE_SIZE_1MB 96179100Syongari#define PTRS_PER_PTE 4 97179100Syongari#endif 98179100Syongari 99179100Syongari/* Any bigger and the PTE disappears. */ 100179100Syongari#define pgd_ERROR(e) \ 101179100Syongari printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__,\ 102179100Syongari pgd_val(e)) 103179100Syongari 104179100Syongari/* 105179100Syongari * Page Protection Constants. Includes (in this variant) cache attributes. 106179100Syongari */ 107179100Syongariextern unsigned long _dflt_cache_att; 108179100Syongari 109179100Syongari#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_USER | \ 110179100Syongari _dflt_cache_att) 111179100Syongari#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \ 112179100Syongari _PAGE_READ | _PAGE_EXECUTE | _dflt_cache_att) 113179100Syongari#define PAGE_COPY PAGE_READONLY 114179100Syongari#define PAGE_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ 115179100Syongari _PAGE_READ | _PAGE_EXECUTE | _dflt_cache_att) 116179100Syongari#define PAGE_COPY_EXEC PAGE_EXEC 117179100Syongari#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | \ 118179100Syongari _PAGE_EXECUTE | _PAGE_WRITE | _dflt_cache_att) 119179100Syongari#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_READ | \ 120179100Syongari _PAGE_WRITE | _PAGE_EXECUTE | _dflt_cache_att) 121179100Syongari 122179100Syongari 123216925Sjhb/* 124179100Syongari * Aliases for mapping mmap() protection bits to page protections. 125179100Syongari * These get used for static initialization, so using the _dflt_cache_att 126179100Syongari * variable for the default cache attribute isn't workable. If the 127179100Syongari * default gets changed at boot time, the boot option code has to 128179100Syongari * update data structures like the protaction_map[] array. 129179100Syongari */ 130179100Syongari#define CACHEDEF (CACHE_DEFAULT << 6) 131179100Syongari 132179100Syongariextern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* located in head.S */ 133179100Syongari 134179100Syongari/* HUGETLB not working currently */ 135179100Syongari#ifdef CONFIG_HUGETLB_PAGE 136179100Syongari#define pte_mkhuge(pte) __pte((pte_val(pte) & ~0x3) | HVM_HUGEPAGE_SIZE) 137179100Syongari#endif 138179100Syongari 139179100Syongari/* 140179100Syongari * For now, assume that higher-level code will do TLB/MMU invalidations 141179100Syongari * and don't insert that overhead into this low-level function. 142179100Syongari */ 143179100Syongariextern void sync_icache_dcache(pte_t pte); 144179100Syongari 145179100Syongari#define pte_present_exec_user(pte) \ 146246341Syongari ((pte_val(pte) & (_PAGE_EXECUTE | _PAGE_USER)) == \ 147246341Syongari (_PAGE_EXECUTE | _PAGE_USER)) 148246341Syongari 149179100Syongaristatic inline void set_pte(pte_t *ptep, pte_t pteval) 150179100Syongari{ 151179100Syongari /* should really be using pte_exec, if it weren't declared later. */ 152179100Syongari if (pte_present_exec_user(pteval)) 153179100Syongari sync_icache_dcache(pteval); 154179100Syongari 155179100Syongari *ptep = pteval; 156179100Syongari} 157179100Syongari 158179100Syongari/* 159179100Syongari * For the Hexagon Virtual Machine MMU (or its emulation), a null/invalid 160179100Syongari * L1 PTE (PMD/PGD) has 7 in the least significant bits. For the L2 PTE 161179100Syongari * (Linux PTE), the key is to have bits 11..9 all zero. We'd use 0x7 162179100Syongari * as a universal null entry, but some of those least significant bits 163179100Syongari * are interpreted by software. 164179100Syongari */ 165179100Syongari#define _NULL_PMD 0x7 166179100Syongari#define _NULL_PTE 0x0 167179100Syongari 168179100Syongaristatic inline void pmd_clear(pmd_t *pmd_entry_ptr) 169179100Syongari{ 170179100Syongari pmd_val(*pmd_entry_ptr) = _NULL_PMD; 171179100Syongari} 172179100Syongari 173179100Syongari/* 174179100Syongari * Conveniently, a null PTE value is invalid. 175179100Syongari */ 176179100Syongaristatic inline void pte_clear(struct mm_struct *mm, unsigned long addr, 177179100Syongari pte_t *ptep) 178179100Syongari{ 179179100Syongari pte_val(*ptep) = _NULL_PTE; 180179100Syongari} 181179100Syongari 182179100Syongari/** 183179100Syongari * pmd_none - check if pmd_entry is mapped 184179100Syongari * @pmd_entry: pmd entry 185179100Syongari * 186179100Syongari * MIPS checks it against that "invalid pte table" thing. 187179100Syongari */ 188179100Syongaristatic inline int pmd_none(pmd_t pmd) 189179100Syongari{ 190179100Syongari return pmd_val(pmd) == _NULL_PMD; 191179100Syongari} 192179100Syongari 193179100Syongari/** 194179100Syongari * pmd_present - is there a page table behind this? 195179100Syongari * Essentially the inverse of pmd_none. We maybe 196179100Syongari * save an inline instruction by defining it this 197179100Syongari * way, instead of simply "!pmd_none". 198179100Syongari */ 199179100Syongaristatic inline int pmd_present(pmd_t pmd) 200179100Syongari{ 201179100Syongari return pmd_val(pmd) != (unsigned long)_NULL_PMD; 202179100Syongari} 203179100Syongari 204179100Syongari/** 205179100Syongari * pmd_bad - check if a PMD entry is "bad". That might mean swapped out. 206179100Syongari * As we have no known cause of badness, it's null, as it is for many 207179100Syongari * architectures. 208179100Syongari */ 209179100Syongaristatic inline int pmd_bad(pmd_t pmd) 210179100Syongari{ 211179100Syongari return 0; 212179100Syongari} 213179100Syongari 214179100Syongari/* 215179100Syongari * pmd_pfn - converts a PMD entry to a page frame number 216179100Syongari */ 217179100Syongari#define pmd_pfn(pmd) (pmd_val(pmd) >> PAGE_SHIFT) 218179100Syongari 219179100Syongari/* 220179100Syongari * pmd_page - converts a PMD entry to a page pointer 221179100Syongari */ 222179100Syongari#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)) 223179100Syongari 224179100Syongari/** 225179100Syongari * pte_none - check if pte is mapped 226179100Syongari * @pte: pte_t entry 227179100Syongari */ 228179100Syongaristatic inline int pte_none(pte_t pte) 229179100Syongari{ 230179100Syongari return pte_val(pte) == _NULL_PTE; 231179100Syongari}; 232179100Syongari 233179100Syongari/* 234179100Syongari * pte_present - check if page is present 235179100Syongari */ 236179100Syongaristatic inline int pte_present(pte_t pte) 237179100Syongari{ 238179100Syongari return pte_val(pte) & _PAGE_PRESENT; 239179100Syongari} 240179100Syongari 241179100Syongari/* mk_pte - make a PTE out of a page pointer and protection bits */ 242179100Syongari#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 243179100Syongari 244179100Syongari/* pte_page - returns a page (frame pointer/descriptor?) based on a PTE */ 245179100Syongari#define pte_page(x) pfn_to_page(pte_pfn(x)) 246179100Syongari 247179100Syongari/* pte_mkold - mark PTE as not recently accessed */ 248179100Syongaristatic inline pte_t pte_mkold(pte_t pte) 249179100Syongari{ 250179100Syongari pte_val(pte) &= ~_PAGE_ACCESSED; 251179100Syongari return pte; 252179100Syongari} 253179100Syongari 254179100Syongari/* pte_mkyoung - mark PTE as recently accessed */ 255179100Syongaristatic inline pte_t pte_mkyoung(pte_t pte) 256179100Syongari{ 257179100Syongari pte_val(pte) |= _PAGE_ACCESSED; 258179100Syongari return pte; 259179100Syongari} 260179100Syongari 261179100Syongari/* pte_mkclean - mark page as in sync with backing store */ 262179100Syongaristatic inline pte_t pte_mkclean(pte_t pte) 263179100Syongari{ 264179100Syongari pte_val(pte) &= ~_PAGE_DIRTY; 265179100Syongari return pte; 266179100Syongari} 267179100Syongari 268179100Syongari/* pte_mkdirty - mark page as modified */ 269179100Syongaristatic inline pte_t pte_mkdirty(pte_t pte) 270179100Syongari{ 271179100Syongari pte_val(pte) |= _PAGE_DIRTY; 272179100Syongari return pte; 273179100Syongari} 274179100Syongari 275179100Syongari/* pte_young - "is PTE marked as accessed"? */ 276179100Syongaristatic inline int pte_young(pte_t pte) 277179100Syongari{ 278179100Syongari return pte_val(pte) & _PAGE_ACCESSED; 279179100Syongari} 280179100Syongari 281179100Syongari/* pte_dirty - "is PTE dirty?" */ 282179100Syongaristatic inline int pte_dirty(pte_t pte) 283179100Syongari{ 284179100Syongari return pte_val(pte) & _PAGE_DIRTY; 285179100Syongari} 286179100Syongari 287179100Syongari/* pte_modify - set protection bits on PTE */ 288179100Syongaristatic inline pte_t pte_modify(pte_t pte, pgprot_t prot) 289179100Syongari{ 290179100Syongari pte_val(pte) &= PAGE_MASK; 291226478Syongari pte_val(pte) |= pgprot_val(prot); 292179100Syongari return pte; 293179100Syongari} 294179100Syongari 295179100Syongari/* pte_wrprotect - mark page as not writable */ 296179100Syongaristatic inline pte_t pte_wrprotect(pte_t pte) 297179100Syongari{ 298179100Syongari pte_val(pte) &= ~_PAGE_WRITE; 299179100Syongari return pte; 300179100Syongari} 301179100Syongari 302179100Syongari/* pte_mkwrite - mark page as writable */ 303179100Syongaristatic inline pte_t pte_mkwrite_novma(pte_t pte) 304179100Syongari{ 305179100Syongari pte_val(pte) |= _PAGE_WRITE; 306179100Syongari return pte; 307179100Syongari} 308221407Smarius 309221407Smarius/* pte_mkexec - mark PTE as executable */ 310179100Syongaristatic inline pte_t pte_mkexec(pte_t pte) 311179100Syongari{ 312179100Syongari pte_val(pte) |= _PAGE_EXECUTE; 313179100Syongari return pte; 314179100Syongari} 315179100Syongari 316179100Syongari/* pte_read - "is PTE marked as readable?" */ 317179100Syongaristatic inline int pte_read(pte_t pte) 318179100Syongari{ 319179100Syongari return pte_val(pte) & _PAGE_READ; 320179100Syongari} 321179100Syongari 322179100Syongari/* pte_write - "is PTE marked as writable?" */ 323179100Syongaristatic inline int pte_write(pte_t pte) 324179100Syongari{ 325179100Syongari return pte_val(pte) & _PAGE_WRITE; 326298307Spfg} 327179100Syongari 328179100Syongari 329179100Syongari/* pte_exec - "is PTE marked as executable?" */ 330179100Syongaristatic inline int pte_exec(pte_t pte) 331179100Syongari{ 332179100Syongari return pte_val(pte) & _PAGE_EXECUTE; 333179100Syongari} 334179100Syongari 335179100Syongari/* __pte_to_swp_entry - extract swap entry from PTE */ 336179100Syongari#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 337179100Syongari 338179100Syongari/* __swp_entry_to_pte - extract PTE from swap entry */ 339179100Syongari#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 340190499Syongari 341190499Syongari#define PFN_PTE_SHIFT PAGE_SHIFT 342179100Syongari/* pfn_pte - convert page number and protection value to page table entry */ 343179100Syongari#define pfn_pte(pfn, pgprot) __pte((pfn << PAGE_SHIFT) | pgprot_val(pgprot)) 344179100Syongari 345179100Syongari/* pte_pfn - convert pte to page frame number */ 346179100Syongari#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) 347179100Syongari#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval)) 348179100Syongari 349179100Syongaristatic inline unsigned long pmd_page_vaddr(pmd_t pmd) 350219902Sjhb{ 351179100Syongari return (unsigned long)__va(pmd_val(pmd) & PAGE_MASK); 352190499Syongari} 353190499Syongari 354179100Syongari/* ZERO_PAGE - returns the globally shared zero page */ 355190499Syongari#define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page)) 356190499Syongari 357190499Syongari/* 358190499Syongari * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that 359190499Syongari * are !pte_none() && !pte_present(). 360190499Syongari * 361179100Syongari * Swap/file PTE definitions. If _PAGE_PRESENT is zero, the rest of the PTE is 362179100Syongari * interpreted as swap information. The remaining free bits are interpreted as 363190499Syongari * listed below. Rather than have the TLB fill handler test 364190499Syongari * _PAGE_PRESENT, we're going to reserve the permissions bits and set them to 365190499Syongari * all zeros for swap entries, which speeds up the miss handler at the cost of 366179100Syongari * 3 bits of offset. That trade-off can be revisited if necessary, but Hexagon 367184743Syongari * processor architecture and target applications suggest a lot of TLB misses 368179100Syongari * and not much swap space. 369179100Syongari * 370179100Syongari * Format of swap PTE: 371179100Syongari * bit 0: Present (zero) 372190499Syongari * bits 1-5: swap type (arch independent layer uses 5 bits max) 373190499Syongari * bit 6: exclusive marker 374190499Syongari * bits 7-9: bits 2:0 of offset 375190499Syongari * bits 10-12: effectively _PAGE_PROTNONE (all zero) 376190499Syongari * bits 13-31: bits 21:3 of swap offset 377190499Syongari * 378190499Syongari * The split offset makes some of the following macros a little gnarly, 379190499Syongari * but there's plenty of precedent for this sort of thing. 380179100Syongari */ 381179100Syongari 382179100Syongari/* Used for swap PTEs */ 383179100Syongari#define __swp_type(swp_pte) (((swp_pte).val >> 1) & 0x1f) 384179100Syongari 385190499Syongari#define __swp_offset(swp_pte) \ 386190499Syongari ((((swp_pte).val >> 7) & 0x7) | (((swp_pte).val >> 10) & 0x3ffff8)) 387179100Syongari 388179100Syongari#define __swp_entry(type, offset) \ 389179100Syongari ((swp_entry_t) { \ 390190499Syongari (((type & 0x1f) << 1) | \ 391179100Syongari ((offset & 0x3ffff8) << 10) | ((offset & 0x7) << 7)) }) 392190499Syongari 393190499Syongaristatic inline int pte_swp_exclusive(pte_t pte) 394190499Syongari{ 395190499Syongari return pte_val(pte) & _PAGE_SWP_EXCLUSIVE; 396190499Syongari} 397190499Syongari 398190499Syongaristatic inline pte_t pte_swp_mkexclusive(pte_t pte) 399190499Syongari{ 400190499Syongari pte_val(pte) |= _PAGE_SWP_EXCLUSIVE; 401190499Syongari return pte; 402190499Syongari} 403190499Syongari 404190499Syongaristatic inline pte_t pte_swp_clear_exclusive(pte_t pte) 405190499Syongari{ 406190499Syongari pte_val(pte) &= ~_PAGE_SWP_EXCLUSIVE; 407190499Syongari return pte; 408190499Syongari} 409190499Syongari 410190499Syongari#endif 411190499Syongari