1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2020-2021, Linaro Limited
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9#include "sm8350.dtsi"
10#include "pm8350.dtsi"
11#include "pm8350b.dtsi"
12#include "pm8350c.dtsi"
13#include "pmk8350.dtsi"
14#include "pmr735a.dtsi"
15#include "pmr735b.dtsi"
16
17/ {
18	model = "Qualcomm Technologies, Inc. SM8350 HDK";
19	compatible = "qcom,sm8350-hdk", "qcom,sm8350";
20	chassis-type = "embedded";
21
22	aliases {
23		serial0 = &uart2;
24	};
25
26	chosen {
27		stdout-path = "serial0:115200n8";
28	};
29
30	hdmi-connector {
31		compatible = "hdmi-connector";
32		type = "a";
33
34		port {
35			hdmi_con: endpoint {
36				remote-endpoint = <&lt9611_out>;
37			};
38		};
39	};
40
41	pmic-glink {
42		compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink";
43		#address-cells = <1>;
44		#size-cells = <0>;
45		orientation-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
46
47		connector@0 {
48			compatible = "usb-c-connector";
49			reg = <0>;
50			power-role = "dual";
51			data-role = "dual";
52
53			ports {
54				#address-cells = <1>;
55				#size-cells = <0>;
56
57				port@0 {
58					reg = <0>;
59
60					pmic_glink_hs_in: endpoint {
61						remote-endpoint = <&usb_1_dwc3_hs>;
62					};
63				};
64
65				port@1 {
66					reg = <1>;
67
68					pmic_glink_ss_in: endpoint {
69						remote-endpoint = <&usb_1_qmpphy_out>;
70					};
71				};
72
73				port@2 {
74					reg = <2>;
75
76					pmic_glink_sbu: endpoint {
77						remote-endpoint = <&fsa4480_sbu_mux>;
78					};
79				};
80			};
81		};
82	};
83
84	vph_pwr: vph-pwr-regulator {
85		compatible = "regulator-fixed";
86		regulator-name = "vph_pwr";
87		regulator-min-microvolt = <3700000>;
88		regulator-max-microvolt = <3700000>;
89
90		regulator-always-on;
91		regulator-boot-on;
92	};
93
94	lt9611_1v2: lt9611-1v2-regulator {
95		compatible = "regulator-fixed";
96		regulator-name = "LT9611_1V2";
97
98		vin-supply = <&vph_pwr>;
99		regulator-min-microvolt = <1200000>;
100		regulator-max-microvolt = <1200000>;
101		gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>;
102		enable-active-high;
103		regulator-boot-on;
104	};
105
106	lt9611_3v3: lt9611-3v3-regulator {
107		compatible = "regulator-fixed";
108		regulator-name = "LT9611_3V3";
109
110		vin-supply = <&vreg_bob>;
111		gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>;
112		regulator-min-microvolt = <3300000>;
113		regulator-max-microvolt = <3300000>;
114		enable-active-high;
115		regulator-boot-on;
116		regulator-always-on;
117	};
118};
119
120&adsp {
121	status = "okay";
122	firmware-name = "qcom/sm8350/adsp.mbn";
123};
124
125&apps_rsc {
126	regulators-0 {
127		compatible = "qcom,pm8350-rpmh-regulators";
128		qcom,pmic-id = "b";
129
130		vdd-s1-supply = <&vph_pwr>;
131		vdd-s2-supply = <&vph_pwr>;
132		vdd-s3-supply = <&vph_pwr>;
133		vdd-s4-supply = <&vph_pwr>;
134		vdd-s5-supply = <&vph_pwr>;
135		vdd-s6-supply = <&vph_pwr>;
136		vdd-s7-supply = <&vph_pwr>;
137		vdd-s8-supply = <&vph_pwr>;
138		vdd-s9-supply = <&vph_pwr>;
139		vdd-s10-supply = <&vph_pwr>;
140		vdd-s11-supply = <&vph_pwr>;
141		vdd-s12-supply = <&vph_pwr>;
142
143		vdd-l1-l4-supply = <&vreg_s11b_0p95>;
144		vdd-l2-l7-supply = <&vreg_bob>;
145		vdd-l3-l5-supply = <&vreg_bob>;
146		vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>;
147
148		vreg_s10b_1p8: smps10 {
149			regulator-name = "vreg_s10b_1p8";
150			regulator-min-microvolt = <1800000>;
151			regulator-max-microvolt = <1800000>;
152			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
153		};
154
155		vreg_s11b_0p95: smps11 {
156			regulator-name = "vreg_s11b_0p95";
157			regulator-min-microvolt = <952000>;
158			regulator-max-microvolt = <952000>;
159			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
160		};
161
162		vreg_s12b_1p25: smps12 {
163			regulator-name = "vreg_s12b_1p25";
164			regulator-min-microvolt = <1256000>;
165			regulator-max-microvolt = <1256000>;
166			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
167		};
168
169		vreg_l1b_0p88: ldo1 {
170			regulator-name = "vreg_l1b_0p88";
171			regulator-min-microvolt = <912000>;
172			regulator-max-microvolt = <920000>;
173			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
174		};
175
176		vreg_l2b_3p07: ldo2 {
177			regulator-name = "vreg_l2b_3p07";
178			regulator-min-microvolt = <3072000>;
179			regulator-max-microvolt = <3072000>;
180			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
181		};
182
183		vreg_l3b_0p9: ldo3 {
184			regulator-name = "vreg_l3b_0p9";
185			regulator-min-microvolt = <904000>;
186			regulator-max-microvolt = <904000>;
187			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
188		};
189
190		vreg_l5b_0p88: ldo5 {
191			regulator-name = "vreg_l5b_0p88";
192			regulator-min-microvolt = <880000>;
193			regulator-max-microvolt = <888000>;
194			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
195			regulator-allow-set-load;
196			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
197						   RPMH_REGULATOR_MODE_HPM>;
198		};
199
200		vreg_l6b_1p2: ldo6 {
201			regulator-name = "vreg_l6b_1p2";
202			regulator-min-microvolt = <1200000>;
203			regulator-max-microvolt = <1208000>;
204			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
205			regulator-allow-set-load;
206			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
207						   RPMH_REGULATOR_MODE_HPM>;
208		};
209
210		vreg_l7b_2p96: ldo7 {
211			regulator-name = "vreg_l7b_2p96";
212			regulator-min-microvolt = <2504000>;
213			regulator-max-microvolt = <2504000>;
214			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
215			regulator-allow-set-load;
216			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
217						   RPMH_REGULATOR_MODE_HPM>;
218		};
219
220		vreg_l9b_1p2: ldo9 {
221			regulator-name = "vreg_l9b_1p2";
222			regulator-min-microvolt = <1200000>;
223			regulator-max-microvolt = <1200000>;
224			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225			regulator-allow-set-load;
226			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
227						   RPMH_REGULATOR_MODE_HPM>;
228		};
229	};
230
231	regulators-1 {
232		compatible = "qcom,pm8350c-rpmh-regulators";
233		qcom,pmic-id = "c";
234
235		vdd-s1-supply = <&vph_pwr>;
236		vdd-s2-supply = <&vph_pwr>;
237		vdd-s3-supply = <&vph_pwr>;
238		vdd-s4-supply = <&vph_pwr>;
239		vdd-s5-supply = <&vph_pwr>;
240		vdd-s6-supply = <&vph_pwr>;
241		vdd-s7-supply = <&vph_pwr>;
242		vdd-s8-supply = <&vph_pwr>;
243		vdd-s9-supply = <&vph_pwr>;
244		vdd-s10-supply = <&vph_pwr>;
245
246		vdd-l1-l12-supply = <&vreg_s1c_1p86>;
247		vdd-l2-l8-supply = <&vreg_s1c_1p86>;
248		vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>;
249		vdd-l6-l9-l11-supply = <&vreg_bob>;
250		vdd-l10-supply = <&vreg_s12b_1p25>;
251
252		vdd-bob-supply = <&vph_pwr>;
253
254		vreg_s1c_1p86: smps1 {
255			regulator-name = "vreg_s1c_1p86";
256			regulator-min-microvolt = <1856000>;
257			regulator-max-microvolt = <1880000>;
258			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259		};
260
261		vreg_bob: bob {
262			regulator-name = "vreg_bob";
263			regulator-min-microvolt = <3008000>;
264			regulator-max-microvolt = <3960000>;
265			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
266		};
267
268		vreg_l1c_1p8: ldo1 {
269			regulator-name = "vreg_l1c_1p8";
270			regulator-min-microvolt = <1800000>;
271			regulator-max-microvolt = <1800000>;
272			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
273		};
274
275		vreg_l2c_1p8: ldo2 {
276			regulator-name = "vreg_l2c_1p8";
277			regulator-min-microvolt = <1800000>;
278			regulator-max-microvolt = <1800000>;
279			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
280		};
281
282		vreg_l6c_1p8: ldo6 {
283			regulator-name = "vreg_l6c_1p8";
284			regulator-min-microvolt = <1800000>;
285			regulator-max-microvolt = <2960000>;
286			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287		};
288
289		vreg_l9c_2p96: ldo9 {
290			regulator-name = "vreg_l9c_2p96";
291			regulator-min-microvolt = <2960000>;
292			regulator-max-microvolt = <3008000>;
293			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
294		};
295
296		vreg_l10c_1p2: ldo10 {
297			regulator-name = "vreg_l10c_1p2";
298			regulator-min-microvolt = <1200000>;
299			regulator-max-microvolt = <1200000>;
300			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
301		};
302	};
303
304	regulators-2 {
305		compatible = "qcom,pmr735a-rpmh-regulators";
306		qcom,pmic-id = "e";
307
308		vdd-s1-supply = <&vph_pwr>;
309		vdd-s2-supply = <&vph_pwr>;
310		vdd-s3-supply = <&vph_pwr>;
311
312		vdd-l1-l2-supply = <&vreg_s2e_0p85>;
313		vdd-l3-supply = <&vreg_s1e_1p25>;
314		vdd-l4-supply = <&vreg_s1c_1p86>;
315		vdd-l5-l6-supply = <&vreg_s1c_1p86>;
316		vdd-l7-bob-supply = <&vreg_bob>;
317
318		vreg_s1e_1p25: smps1 {
319			regulator-name = "vreg_s1e_1p25";
320			regulator-min-microvolt = <1200000>;
321			regulator-max-microvolt = <1280000>;
322		};
323
324		vreg_s2e_0p85: smps2 {
325			regulator-name = "vreg_s2e_0p85";
326			regulator-min-microvolt = <950000>;
327			regulator-max-microvolt = <976000>;
328		};
329
330		vreg_s3e_2p20: smps3 {
331			regulator-name = "vreg_s3e_2p20";
332			regulator-min-microvolt = <2200000>;
333			regulator-max-microvolt = <2352000>;
334		};
335
336		vreg_l1e_0p9: ldo1 {
337			regulator-name = "vreg_l1e_0p9";
338			regulator-min-microvolt = <912000>;
339			regulator-max-microvolt = <912000>;
340		};
341
342		vreg_l2e_1p2: ldo2 {
343			regulator-name = "vreg_l2e_0p8";
344			regulator-min-microvolt = <1200000>;
345			regulator-max-microvolt = <1200000>;
346		};
347
348		vreg_l3e_1p2: ldo3 {
349			regulator-name = "vreg_l3e_1p2";
350			regulator-min-microvolt = <1200000>;
351			regulator-max-microvolt = <1200000>;
352		};
353
354		vreg_l4e_1p7: ldo4 {
355			regulator-name = "vreg_l4e_1p7";
356			regulator-min-microvolt = <1776000>;
357			regulator-max-microvolt = <1872000>;
358		};
359
360		vreg_l5e_0p8: ldo5 {
361			regulator-name = "vreg_l5e_0p8";
362			regulator-min-microvolt = <800000>;
363			regulator-max-microvolt = <800000>;
364		};
365
366		vreg_l6e_0p8: ldo6 {
367			regulator-name = "vreg_l6e_0p8";
368			regulator-min-microvolt = <480000>;
369			regulator-max-microvolt = <904000>;
370		};
371
372		vreg_l7e_2p8: ldo7 {
373			regulator-name = "vreg_l7e_2p8";
374			regulator-min-microvolt = <2800000>;
375			regulator-max-microvolt = <2800000>;
376		};
377	};
378};
379
380&cdsp {
381	status = "okay";
382	firmware-name = "qcom/sm8350/cdsp.mbn";
383};
384
385&dispcc {
386	status = "okay";
387};
388
389&mdss_dsi0 {
390	vdda-supply = <&vreg_l6b_1p2>;
391	status = "okay";
392
393	ports {
394		port@1 {
395			endpoint {
396				remote-endpoint = <&lt9611_a>;
397				data-lanes = <0 1 2 3>;
398			};
399		};
400	};
401};
402
403&mdss_dsi0_phy  {
404	vdds-supply = <&vreg_l5b_0p88>;
405	status = "okay";
406};
407
408&gpi_dma1 {
409	status = "okay";
410};
411
412&gpu {
413	status = "okay";
414
415	zap-shader {
416		firmware-name = "qcom/sm8350/a660_zap.mbn";
417	};
418};
419
420&i2c13 {
421	clock-frequency = <100000>;
422
423	status = "okay";
424
425	typec-mux@42 {
426		compatible = "fcs,fsa4480";
427		reg = <0x42>;
428
429		interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
430
431		vcc-supply = <&vreg_bob>;
432		mode-switch;
433		orientation-switch;
434
435		port {
436			fsa4480_sbu_mux: endpoint {
437				remote-endpoint = <&pmic_glink_sbu>;
438			};
439		};
440	};
441};
442
443&i2c15 {
444	clock-frequency = <400000>;
445	status = "okay";
446
447	lt9611_codec: hdmi-bridge@2b {
448		compatible = "lontium,lt9611uxc";
449		reg = <0x2b>;
450
451		interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>;
452		reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
453
454		vdd-supply = <&lt9611_1v2>;
455		vcc-supply = <&lt9611_3v3>;
456
457		pinctrl-names = "default";
458		pinctrl-0 = <&lt9611_state>;
459
460		ports {
461			#address-cells = <1>;
462			#size-cells = <0>;
463
464			port@0 {
465				reg = <0>;
466
467				lt9611_a: endpoint {
468					remote-endpoint = <&mdss_dsi0_out>;
469				};
470			};
471
472			port@2 {
473				reg = <2>;
474
475				lt9611_out: endpoint {
476					remote-endpoint = <&hdmi_con>;
477				};
478			};
479		};
480	};
481};
482
483&mdss {
484	status = "okay";
485};
486
487&mdss_dp {
488	status = "okay";
489
490	ports {
491		port@1 {
492			reg = <1>;
493
494			mdss_dp0_out: endpoint {
495				data-lanes = <0 1>;
496				remote-endpoint = <&usb_1_qmpphy_dp_in>;
497			};
498		};
499	};
500};
501
502&mpss {
503	status = "okay";
504	firmware-name = "qcom/sm8350/modem.mbn";
505};
506
507&pcie0 {
508	pinctrl-names = "default";
509	pinctrl-0 = <&pcie0_default_state>;
510
511	perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
512	wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
513
514	status = "okay";
515};
516
517&pcie0_phy {
518	vdda-phy-supply = <&vreg_l5b_0p88>;
519	vdda-pll-supply = <&vreg_l6b_1p2>;
520
521	status = "okay";
522};
523
524&pcie1 {
525	perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
526	wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
527
528	pinctrl-names = "default";
529	pinctrl-0 = <&pcie1_default_state>;
530
531	status = "okay";
532};
533
534&pcie1_phy {
535	status = "okay";
536	vdda-phy-supply = <&vreg_l5b_0p88>;
537	vdda-pll-supply = <&vreg_l6b_1p2>;
538};
539
540&qupv3_id_0 {
541	status = "okay";
542};
543
544&qupv3_id_1 {
545	status = "okay";
546};
547
548&qupv3_id_2 {
549	status = "okay";
550};
551
552&sdhc_2 {
553	cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
554	pinctrl-names = "default", "sleep";
555	pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
556	pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>;
557	vmmc-supply = <&vreg_l9c_2p96>;
558	vqmmc-supply = <&vreg_l6c_1p8>;
559	no-sdio;
560	no-mmc;
561	status = "okay";
562};
563
564&slpi {
565	status = "okay";
566	firmware-name = "qcom/sm8350/slpi.mbn";
567};
568
569&tlmm {
570	gpio-reserved-ranges = <52 8>;
571
572	gpio-line-names =
573		"APPS_I2C_SDA", /* GPIO_0 */
574		"APPS_I2C_SCL",
575		"FSA_INT_N",
576		"USER_LED3_EN",
577		"SMBUS_SDA_1P8",
578		"SMBUS_SCL_1P8",
579		"2M2_3P3_EN",
580		"ALERT_DUAL_M2_N",
581		"EXP_UART_CTS",
582		"EXP_UART_RFR",
583		"EXP_UART_TX", /* GPIO_10 */
584		"EXP_UART_RX",
585		"NC",
586		"NC",
587		"RCM_MARKER1",
588		"WSA0_EN",
589		"CAM1_RESET_N",
590		"CAM0_RESET_N",
591		"DEBUG_UART_TX",
592		"DEBUG_UART_RX",
593		"TS_I2C_SDA", /* GPIO_20 */
594		"TS_I2C_SCL",
595		"TS_RESET_N",
596		"TS_INT_N",
597		"DISP0_RESET_N",
598		"DISP1_RESET_N",
599		"ETH_RESET",
600		"RCM_MARKER2",
601		"CAM_DC_MIPI_MUX_EN",
602		"CAM_DC_MIPI_MUX_SEL",
603		"AFC_PHY_TA_D_PLUS", /* GPIO_30 */
604		"AFC_PHY_TA_D_MINUS",
605		"PM8008_1_IRQ",
606		"PM8008_1_RESET_N",
607		"PM8008_2_IRQ",
608		"PM8008_2_RESET_N",
609		"CAM_DC_I3C_SDA",
610		"CAM_DC_I3C_SCL",
611		"FP_INT_N",
612		"FP_WUHB_INT_N",
613		"SMB_SPMI_DATA", /* GPIO_40 */
614		"SMB_SPMI_CLK",
615		"USB_HUB_RESET",
616		"FORCE_USB_BOOT",
617		"LRF_IRQ",
618		"NC",
619		"IMU2_INT",
620		"HDMI_3P3_EN",
621		"HDMI_RSTN",
622		"HDMI_1P2_EN",
623		"HDMI_INT", /* GPIO_50 */
624		"USB1_ID",
625		"FP_SPI_MISO",
626		"FP_SPI_MOSI",
627		"FP_SPI_CLK",
628		"FP_SPI_CS_N",
629		"NFC_ESE_SPI_MISO",
630		"NFC_ESE_SPI_MOSI",
631		"NFC_ESE_SPI_CLK",
632		"NFC_ESE_SPI_CS",
633		"NFC_I2C_SDA", /* GPIO_60 */
634		"NFC_I2C_SCLC",
635		"NFC_EN",
636		"NFC_CLK_REQ",
637		"HST_WLAN_EN",
638		"HST_BT_EN",
639		"HST_SW_CTRL",
640		"NC",
641		"HST_BT_UART_CTS",
642		"HST_BT_UART_RFR",
643		"HST_BT_UART_TX", /* GPIO_70 */
644		"HST_BT_UART_RX",
645		"CAM_DC_SPI0_MISO",
646		"CAM_DC_SPI0_MOSI",
647		"CAM_DC_SPI0_CLK",
648		"CAM_DC_SPI0_CS_N",
649		"CAM_DC_SPI1_MISO",
650		"CAM_DC_SPI1_MOSI",
651		"CAM_DC_SPI1_CLK",
652		"CAM_DC_SPI1_CS_N",
653		"HALL_INT_N", /* GPIO_80 */
654		"USB_PHY_PS",
655		"MDP_VSYNC_P",
656		"MDP_VSYNC_S",
657		"ETH_3P3_EN",
658		"RADAR_INT",
659		"NFC_DWL_REQ",
660		"SM_GPIO_87",
661		"WCD_RESET_N",
662		"ALSP_INT_N",
663		"PRESS_INT", /* GPIO_90 */
664		"SAR_INT_N",
665		"SD_CARD_DET_N",
666		"NC",
667		"PCIE0_RESET_N",
668		"PCIE0_CLK_REQ_N",
669		"PCIE0_WAKE_N",
670		"PCIE1_RESET_N",
671		"PCIE1_CLK_REQ_N",
672		"PCIE1_WAKE_N",
673		"CAM_MCLK0", /* GPIO_100 */
674		"CAM_MCLK1",
675		"CAM_MCLK2",
676		"CAM_MCLK3",
677		"CAM_MCLK4",
678		"CAM_MCLK5",
679		"CAM2_RESET_N",
680		"CCI_I2C0_SDA",
681		"CCI_I2C0_SCL",
682		"CCI_I2C1_SDA",
683		"CCI_I2C1_SCL", /* GPIO_110 */
684		"CCI_I2C2_SDA",
685		"CCI_I2C2_SCL",
686		"CCI_I2C3_SDA",
687		"CCI_I2C3_SCL",
688		"CAM5_RESET_N",
689		"CAM4_RESET_N",
690		"CAM3_RESET_N",
691		"IMU1_INT",
692		"MAG_INT_N",
693		"MI2S2_I2S_SCK", /* GPIO_120 */
694		"MI2S2_I2S_DAT0",
695		"MI2S2_I2S_WS",
696		"HIFI_DAC_I2S_MCLK",
697		"MI2S2_I2S_DAT1",
698		"HIFI_DAC_I2S_SCK",
699		"HIFI_DAC_I2S_DAT0",
700		"NC",
701		"HIFI_DAC_I2S_WS",
702		"HST_BT_WLAN_SLIMBUS_CLK",
703		"HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */
704		"BT_LED_EN",
705		"WLAN_LED_EN",
706		"NC",
707		"NC",
708		"NC",
709		"UIM2_PRESENT",
710		"NC",
711		"NC",
712		"NC",
713		"UIM1_PRESENT", /* GPIO_140 */
714		"NC",
715		"SM_RFFE0_DATA",
716		"NC",
717		"SM_RFFE1_DATA",
718		"SM_MSS_GRFC4",
719		"SM_MSS_GRFC5",
720		"SM_MSS_GRFC6",
721		"SM_MSS_GRFC7",
722		"SM_RFFE4_CLK",
723		"SM_RFFE4_DATA", /* GPIO_150 */
724		"WLAN_COEX_UART1_RX",
725		"WLAN_COEX_UART1_TX",
726		"HST_SW_CTRL",
727		"DSI0_STATUS",
728		"DSI1_STATUS",
729		"APPS_PBL_BOOT_SPEED_1",
730		"APPS_BOOT_FROM_ROM",
731		"APPS_PBL_BOOT_SPEED_0",
732		"QLINK0_REQ",
733		"QLINK0_EN", /* GPIO_160 */
734		"QLINK0_WMSS_RESET_N",
735		"NC",
736		"NC",
737		"NC",
738		"NC",
739		"NC",
740		"NC",
741		"WCD_SWR_TX_CLK",
742		"WCD_SWR_TX_DATA0",
743		"WCD_SWR_TX_DATA1", /* GPIO_170 */
744		"WCD_SWR_RX_CLK",
745		"WCD_SWR_RX_DATA0",
746		"WCD_SWR_RX_DATA1",
747		"DMIC01_CLK",
748		"DMIC01_DATA",
749		"DMIC23_CLK",
750		"DMIC23_DATA",
751		"WSA_SWR_CLK",
752		"WSA_SWR_DATA",
753		"DMIC45_CLK", /* GPIO_180 */
754		"DMIC45_DATA",
755		"WCD_SWR_TX_DATA2",
756		"SENSOR_I3C_SDA",
757		"SENSOR_I3C_SCL",
758		"CAM_OIS0_I3C_SDA",
759		"CAM_OIS0_I3C_SCL",
760		"IMU_SPI_MISO",
761		"IMU_SPI_MOSI",
762		"IMU_SPI_CLK",
763		"IMU_SPI_CS_N", /* GPIO_190 */
764		"MAG_I2C_SDA",
765		"MAG_I2C_SCL",
766		"SENSOR_I2C_SDA",
767		"SENSOR_I2C_SCL",
768		"RADAR_SPI_MISO",
769		"RADAR_SPI_MOSI",
770		"RADAR_SPI_CLK",
771		"RADAR_SPI_CS_N",
772		"HST_BLE_UART_TX",
773		"HST_BLE_UART_RX", /* GPIO_200 */
774		"HST_WLAN_UART_TX",
775		"HST_WLAN_UART_RX";
776
777	pcie0_default_state: pcie0-default-state {
778		perst-pins {
779			pins = "gpio94";
780			function = "gpio";
781			drive-strength = <2>;
782			bias-pull-down;
783		};
784
785		clkreq-pins {
786			pins = "gpio95";
787			function = "pcie0_clkreqn";
788			drive-strength = <2>;
789			bias-pull-up;
790		};
791
792		wake-pins {
793			pins = "gpio96";
794			function = "gpio";
795			drive-strength = <2>;
796			bias-pull-up;
797		};
798	};
799
800	pcie1_default_state: pcie1-default-state {
801		perst-pins {
802			pins = "gpio97";
803			function = "gpio";
804			drive-strength = <2>;
805			bias-pull-down;
806		};
807
808		clkreq-pins {
809			pins = "gpio98";
810			function = "pcie1_clkreqn";
811			drive-strength = <2>;
812			bias-pull-up;
813		};
814
815		wake-pins {
816			pins = "gpio99";
817			function = "gpio";
818			drive-strength = <2>;
819			bias-pull-up;
820		};
821	};
822
823	sdc2_card_det_n: sd-card-det-n-state {
824		pins = "gpio92";
825		function = "gpio";
826		drive-strength = <2>;
827		bias-pull-up;
828	};
829};
830
831&uart2 {
832	status = "okay";
833};
834
835&ufs_mem_hc {
836	status = "okay";
837
838	reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>;
839
840	vcc-supply = <&vreg_l7b_2p96>;
841	vcc-max-microamp = <800000>;
842	vccq-supply = <&vreg_l9b_1p2>;
843	vccq-max-microamp = <900000>;
844	vdd-hba-supply = <&vreg_l9b_1p2>;
845};
846
847&ufs_mem_phy {
848	status = "okay";
849
850	vdda-phy-supply = <&vreg_l5b_0p88>;
851	vdda-pll-supply = <&vreg_l6b_1p2>;
852};
853
854&usb_1 {
855	status = "okay";
856};
857
858&usb_1_dwc3 {
859	dr_mode = "otg";
860	usb-role-switch;
861};
862
863&usb_1_dwc3_hs {
864	remote-endpoint = <&pmic_glink_hs_in>;
865};
866
867&usb_1_dwc3_ss {
868	remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
869};
870
871&usb_1_hsphy {
872	status = "okay";
873
874	vdda-pll-supply = <&vreg_l5b_0p88>;
875	vdda18-supply = <&vreg_l1c_1p8>;
876	vdda33-supply = <&vreg_l2b_3p07>;
877};
878
879&usb_1_qmpphy {
880	status = "okay";
881
882	vdda-phy-supply = <&vreg_l6b_1p2>;
883	vdda-pll-supply = <&vreg_l1b_0p88>;
884
885	orientation-switch;
886};
887
888&usb_1_qmpphy_dp_in {
889	remote-endpoint = <&mdss_dp0_out>;
890};
891
892&usb_1_qmpphy_out {
893	remote-endpoint = <&pmic_glink_ss_in>;
894};
895
896&usb_1_qmpphy_usb_ss_in {
897	remote-endpoint = <&usb_1_dwc3_ss>;
898};
899
900&usb_2 {
901	status = "okay";
902};
903
904&usb_2_dwc3 {
905	dr_mode = "host";
906
907	pinctrl-names = "default";
908	pinctrl-0 = <&usb_hub_enabled_state>;
909};
910
911&usb_2_hsphy {
912	status = "okay";
913
914	vdda-pll-supply = <&vreg_l5b_0p88>;
915	vdda18-supply = <&vreg_l1c_1p8>;
916	vdda33-supply = <&vreg_l2b_3p07>;
917};
918
919&usb_2_qmpphy {
920	status = "okay";
921
922	vdda-phy-supply = <&vreg_l6b_1p2>;
923	vdda-pll-supply = <&vreg_l5b_0p88>;
924};
925
926/* PINCTRL - additions to nodes defined in sm8350.dtsi */
927
928&tlmm {
929	usb_hub_enabled_state: usb-hub-enabled-state {
930		pins = "gpio42";
931		function = "gpio";
932
933		drive-strength = <2>;
934		output-low;
935	};
936
937	lt9611_state: lt9611-state {
938		rst-pins {
939			pins = "gpio48";
940			function = "gpio";
941
942			output-high;
943			input-disable;
944		};
945
946		irq-pins {
947			pins = "gpio50";
948			function = "gpio";
949			bias-disable;
950		};
951	};
952};
953