1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2021 MediaTek Inc. 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/spmi/spmi.h> 8#include "mt8195.dtsi" 9#include "mt6359.dtsi" 10 11/ { 12 aliases { 13 i2c0 = &i2c0; 14 i2c1 = &i2c1; 15 i2c2 = &i2c2; 16 i2c3 = &i2c3; 17 i2c4 = &i2c4; 18 i2c5 = &i2c5; 19 i2c7 = &i2c7; 20 mmc0 = &mmc0; 21 mmc1 = &mmc1; 22 serial0 = &uart0; 23 }; 24 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-level = <576>; 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>; 30 num-interpolated-steps = <1023>; 31 pwms = <&disp_pwm0 0 500000>; 32 power-supply = <&ppvar_sys>; 33 }; 34 35 chosen { 36 stdout-path = "serial0:115200n8"; 37 }; 38 39 dmic-codec { 40 compatible = "dmic-codec"; 41 num-channels = <2>; 42 wakeup-delay-ms = <50>; 43 }; 44 45 memory@40000000 { 46 device_type = "memory"; 47 reg = <0 0x40000000 0 0x80000000>; 48 }; 49 50 pp3300_disp_x: regulator-pp3300-disp-x { 51 compatible = "regulator-fixed"; 52 regulator-name = "pp3300_disp_x"; 53 regulator-min-microvolt = <3300000>; 54 regulator-max-microvolt = <3300000>; 55 regulator-enable-ramp-delay = <2500>; 56 enable-active-high; 57 gpio = <&pio 55 GPIO_ACTIVE_HIGH>; 58 pinctrl-names = "default"; 59 pinctrl-0 = <&panel_fixed_pins>; 60 vin-supply = <&pp3300_z2>; 61 }; 62 63 /* system wide LDO 3.3V power rail */ 64 pp3300_z5: regulator-pp3300-ldo-z5 { 65 compatible = "regulator-fixed"; 66 regulator-name = "pp3300_ldo_z5"; 67 regulator-always-on; 68 regulator-boot-on; 69 regulator-min-microvolt = <3300000>; 70 regulator-max-microvolt = <3300000>; 71 vin-supply = <&ppvar_sys>; 72 }; 73 74 /* separately switched 3.3V power rail */ 75 pp3300_s3: regulator-pp3300-s3 { 76 compatible = "regulator-fixed"; 77 regulator-name = "pp3300_s3"; 78 /* automatically sequenced by PMIC EXT_PMIC_EN2 */ 79 regulator-always-on; 80 regulator-boot-on; 81 regulator-min-microvolt = <3300000>; 82 regulator-max-microvolt = <3300000>; 83 vin-supply = <&pp3300_z2>; 84 }; 85 86 /* system wide 3.3V power rail */ 87 pp3300_z2: regulator-pp3300-z2 { 88 compatible = "regulator-fixed"; 89 regulator-name = "pp3300_z2"; 90 /* EN pin tied to pp4200_z2, which is controlled by EC */ 91 regulator-always-on; 92 regulator-boot-on; 93 regulator-min-microvolt = <3300000>; 94 regulator-max-microvolt = <3300000>; 95 vin-supply = <&ppvar_sys>; 96 }; 97 98 /* system wide 4.2V power rail */ 99 pp4200_z2: regulator-pp4200-z2 { 100 compatible = "regulator-fixed"; 101 regulator-name = "pp4200_z2"; 102 /* controlled by EC */ 103 regulator-always-on; 104 regulator-boot-on; 105 regulator-min-microvolt = <4200000>; 106 regulator-max-microvolt = <4200000>; 107 vin-supply = <&ppvar_sys>; 108 }; 109 110 /* system wide switching 5.0V power rail */ 111 pp5000_s5: regulator-pp5000-s5 { 112 compatible = "regulator-fixed"; 113 regulator-name = "pp5000_s5"; 114 /* controlled by EC */ 115 regulator-always-on; 116 regulator-boot-on; 117 regulator-min-microvolt = <5000000>; 118 regulator-max-microvolt = <5000000>; 119 vin-supply = <&ppvar_sys>; 120 }; 121 122 /* system wide semi-regulated power rail from battery or USB */ 123 ppvar_sys: regulator-ppvar-sys { 124 compatible = "regulator-fixed"; 125 regulator-name = "ppvar_sys"; 126 regulator-always-on; 127 regulator-boot-on; 128 }; 129 130 /* Murata NCP03WF104F05RL */ 131 tboard_thermistor1: thermal-sensor-t1 { 132 compatible = "generic-adc-thermal"; 133 #thermal-sensor-cells = <0>; 134 io-channels = <&auxadc 0>; 135 io-channel-names = "sensor-channel"; 136 temperature-lookup-table = < (-10000) 1553 137 (-5000) 1485 138 0 1406 139 5000 1317 140 10000 1219 141 15000 1115 142 20000 1007 143 25000 900 144 30000 796 145 35000 697 146 40000 605 147 45000 523 148 50000 449 149 55000 384 150 60000 327 151 65000 279 152 70000 237 153 75000 202 154 80000 172 155 85000 147 156 90000 125 157 95000 107 158 100000 92 159 105000 79 160 110000 68 161 115000 59 162 120000 51 163 125000 44>; 164 }; 165 166 tboard_thermistor2: thermal-sensor-t2 { 167 compatible = "generic-adc-thermal"; 168 #thermal-sensor-cells = <0>; 169 io-channels = <&auxadc 1>; 170 io-channel-names = "sensor-channel"; 171 temperature-lookup-table = < (-10000) 1553 172 (-5000) 1485 173 0 1406 174 5000 1317 175 10000 1219 176 15000 1115 177 20000 1007 178 25000 900 179 30000 796 180 35000 697 181 40000 605 182 45000 523 183 50000 449 184 55000 384 185 60000 327 186 65000 279 187 70000 237 188 75000 202 189 80000 172 190 85000 147 191 90000 125 192 95000 107 193 100000 92 194 105000 79 195 110000 68 196 115000 59 197 120000 51 198 125000 44>; 199 }; 200 201 usb_vbus: regulator-5v0-usb-vbus { 202 compatible = "regulator-fixed"; 203 regulator-name = "usb-vbus"; 204 regulator-min-microvolt = <5000000>; 205 regulator-max-microvolt = <5000000>; 206 enable-active-high; 207 regulator-always-on; 208 }; 209 210 reserved_memory: reserved-memory { 211 #address-cells = <2>; 212 #size-cells = <2>; 213 ranges; 214 215 scp_mem: memory@50000000 { 216 compatible = "shared-dma-pool"; 217 reg = <0 0x50000000 0 0x2900000>; 218 no-map; 219 }; 220 221 adsp_mem: memory@60000000 { 222 compatible = "shared-dma-pool"; 223 reg = <0 0x60000000 0 0xd80000>; 224 no-map; 225 }; 226 227 afe_mem: memory@60d80000 { 228 compatible = "shared-dma-pool"; 229 reg = <0 0x60d80000 0 0x100000>; 230 no-map; 231 }; 232 233 adsp_device_mem: memory@60e80000 { 234 compatible = "shared-dma-pool"; 235 reg = <0 0x60e80000 0 0x280000>; 236 no-map; 237 }; 238 }; 239 240 spk_amplifier: rt1019p { 241 compatible = "realtek,rt1019p"; 242 label = "rt1019p"; 243 pinctrl-names = "default"; 244 pinctrl-0 = <&rt1019p_pins_default>; 245 sdb-gpios = <&pio 100 GPIO_ACTIVE_HIGH>; 246 }; 247}; 248 249&adsp { 250 status = "okay"; 251 252 memory-region = <&adsp_device_mem>, <&adsp_mem>; 253}; 254 255&afe { 256 status = "okay"; 257 258 mediatek,etdm-in2-cowork-source = <2>; 259 mediatek,etdm-out2-cowork-source = <0>; 260 memory-region = <&afe_mem>; 261}; 262 263&auxadc { 264 status = "okay"; 265}; 266 267&cpu0 { 268 cpu-supply = <&mt6359_vcore_buck_reg>; 269}; 270 271&cpu1 { 272 cpu-supply = <&mt6359_vcore_buck_reg>; 273}; 274 275&cpu2 { 276 cpu-supply = <&mt6359_vcore_buck_reg>; 277}; 278 279&cpu3 { 280 cpu-supply = <&mt6359_vcore_buck_reg>; 281}; 282 283&cpu4 { 284 cpu-supply = <&mt6315_6_vbuck1>; 285}; 286 287&cpu5 { 288 cpu-supply = <&mt6315_6_vbuck1>; 289}; 290 291&cpu6 { 292 cpu-supply = <&mt6315_6_vbuck1>; 293}; 294 295&cpu7 { 296 cpu-supply = <&mt6315_6_vbuck1>; 297}; 298 299&dp_intf0 { 300 status = "okay"; 301 302 port { 303 dp_intf0_out: endpoint { 304 remote-endpoint = <&edp_in>; 305 }; 306 }; 307}; 308 309&dp_intf1 { 310 status = "okay"; 311 312 port { 313 dp_intf1_out: endpoint { 314 remote-endpoint = <&dptx_in>; 315 }; 316 }; 317}; 318 319&edp_tx { 320 status = "okay"; 321 322 pinctrl-names = "default"; 323 pinctrl-0 = <&edptx_pins_default>; 324 325 ports { 326 #address-cells = <1>; 327 #size-cells = <0>; 328 329 port@0 { 330 reg = <0>; 331 edp_in: endpoint { 332 remote-endpoint = <&dp_intf0_out>; 333 }; 334 }; 335 336 port@1 { 337 reg = <1>; 338 edp_out: endpoint { 339 data-lanes = <0 1 2 3>; 340 remote-endpoint = <&panel_in>; 341 }; 342 }; 343 }; 344 345 aux-bus { 346 panel { 347 compatible = "edp-panel"; 348 power-supply = <&pp3300_disp_x>; 349 backlight = <&backlight_lcd0>; 350 port { 351 panel_in: endpoint { 352 remote-endpoint = <&edp_out>; 353 }; 354 }; 355 }; 356 }; 357}; 358 359&disp_pwm0 { 360 status = "okay"; 361 362 pinctrl-names = "default"; 363 pinctrl-0 = <&disp_pwm0_pin_default>; 364}; 365 366&dp_tx { 367 status = "okay"; 368 369 pinctrl-names = "default"; 370 pinctrl-0 = <&dptx_pin>; 371 372 ports { 373 #address-cells = <1>; 374 #size-cells = <0>; 375 376 port@0 { 377 reg = <0>; 378 dptx_in: endpoint { 379 remote-endpoint = <&dp_intf1_out>; 380 }; 381 }; 382 383 port@1 { 384 reg = <1>; 385 dptx_out: endpoint { 386 data-lanes = <0 1 2 3>; 387 }; 388 }; 389 }; 390}; 391 392&gic { 393 mediatek,broken-save-restore-fw; 394}; 395 396&gpu { 397 status = "okay"; 398 mali-supply = <&mt6315_7_vbuck1>; 399}; 400 401&i2c0 { 402 status = "okay"; 403 404 clock-frequency = <400000>; 405 pinctrl-names = "default"; 406 pinctrl-0 = <&i2c0_pins>; 407}; 408 409&i2c1 { 410 status = "okay"; 411 412 clock-frequency = <400000>; 413 i2c-scl-internal-delay-ns = <12500>; 414 pinctrl-names = "default"; 415 pinctrl-0 = <&i2c1_pins>; 416 417 trackpad@15 { 418 compatible = "elan,ekth3000"; 419 reg = <0x15>; 420 interrupts-extended = <&pio 6 IRQ_TYPE_LEVEL_LOW>; 421 pinctrl-names = "default"; 422 pinctrl-0 = <&trackpad_pins>; 423 vcc-supply = <&pp3300_s3>; 424 wakeup-source; 425 }; 426}; 427 428&i2c2 { 429 status = "okay"; 430 431 clock-frequency = <400000>; 432 pinctrl-names = "default"; 433 pinctrl-0 = <&i2c2_pins>; 434 435 audio_codec: codec@1a { 436 /* Realtek RT5682i or RT5682s, sharing the same configuration */ 437 reg = <0x1a>; 438 interrupts-extended = <&pio 89 IRQ_TYPE_EDGE_BOTH>; 439 realtek,jd-src = <1>; 440 441 AVDD-supply = <&mt6359_vio18_ldo_reg>; 442 MICVDD-supply = <&pp3300_z2>; 443 VBAT-supply = <&pp3300_z5>; 444 }; 445}; 446 447&i2c3 { 448 status = "okay"; 449 450 clock-frequency = <400000>; 451 pinctrl-names = "default"; 452 pinctrl-0 = <&i2c3_pins>; 453 454 tpm@50 { 455 compatible = "google,cr50"; 456 reg = <0x50>; 457 interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>; 458 pinctrl-names = "default"; 459 pinctrl-0 = <&cr50_int>; 460 }; 461}; 462 463&i2c4 { 464 status = "okay"; 465 466 clock-frequency = <400000>; 467 pinctrl-names = "default"; 468 pinctrl-0 = <&i2c4_pins>; 469 470 ts_10: touchscreen@10 { 471 compatible = "hid-over-i2c"; 472 reg = <0x10>; 473 hid-descr-addr = <0x0001>; 474 interrupts-extended = <&pio 92 IRQ_TYPE_LEVEL_LOW>; 475 pinctrl-names = "default"; 476 pinctrl-0 = <&touchscreen_pins>; 477 post-power-on-delay-ms = <10>; 478 vdd-supply = <&pp3300_s3>; 479 status = "disabled"; 480 }; 481}; 482 483&i2c5 { 484 status = "okay"; 485 486 clock-frequency = <400000>; 487 pinctrl-names = "default"; 488 pinctrl-0 = <&i2c5_pins>; 489}; 490 491&i2c7 { 492 status = "okay"; 493 494 clock-frequency = <400000>; 495 pinctrl-names = "default"; 496 pinctrl-0 = <&i2c7_pins>; 497 498 pmic@34 { 499 #interrupt-cells = <2>; 500 compatible = "mediatek,mt6360"; 501 reg = <0x34>; 502 interrupt-controller; 503 interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>; 504 interrupt-names = "IRQB"; 505 pinctrl-names = "default"; 506 pinctrl-0 = <&subpmic_default>; 507 wakeup-source; 508 }; 509}; 510 511&mfg0 { 512 domain-supply = <&mt6315_7_vbuck1>; 513}; 514 515&mfg1 { 516 domain-supply = <&mt6359_vsram_others_ldo_reg>; 517}; 518 519&mmc0 { 520 status = "okay"; 521 522 bus-width = <8>; 523 cap-mmc-highspeed; 524 cap-mmc-hw-reset; 525 hs400-ds-delay = <0x14c11>; 526 max-frequency = <200000000>; 527 mmc-hs200-1_8v; 528 mmc-hs400-1_8v; 529 no-sdio; 530 no-sd; 531 non-removable; 532 pinctrl-names = "default", "state_uhs"; 533 pinctrl-0 = <&mmc0_pins_default>; 534 pinctrl-1 = <&mmc0_pins_uhs>; 535 vmmc-supply = <&mt6359_vemc_1_ldo_reg>; 536 vqmmc-supply = <&mt6359_vufs_ldo_reg>; 537}; 538 539&mmc1 { 540 status = "okay"; 541 542 bus-width = <4>; 543 cap-sd-highspeed; 544 cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>; 545 max-frequency = <200000000>; 546 no-mmc; 547 no-sdio; 548 pinctrl-names = "default", "state_uhs"; 549 pinctrl-0 = <&mmc1_pins_default>, <&mmc1_pins_detect>; 550 pinctrl-1 = <&mmc1_pins_default>; 551 sd-uhs-sdr50; 552 sd-uhs-sdr104; 553 vmmc-supply = <&mt_pmic_vmch_ldo_reg>; 554 vqmmc-supply = <&mt_pmic_vmc_ldo_reg>; 555}; 556 557&mt6359codec { 558 mediatek,dmic-mode = <1>; /* one-wire */ 559 mediatek,mic-type-0 = <2>; /* DMIC */ 560}; 561 562/* for CPU-L */ 563&mt6359_vcore_buck_reg { 564 regulator-always-on; 565}; 566 567/* for CORE */ 568&mt6359_vgpu11_buck_reg { 569 regulator-always-on; 570}; 571 572&mt6359_vgpu11_sshub_buck_reg { 573 regulator-always-on; 574 regulator-min-microvolt = <550000>; 575 regulator-max-microvolt = <550000>; 576}; 577 578/* for CORE SRAM */ 579&mt6359_vpu_buck_reg { 580 regulator-always-on; 581}; 582 583&mt6359_vrf12_ldo_reg { 584 regulator-always-on; 585}; 586 587/* for GPU SRAM */ 588&mt6359_vsram_others_ldo_reg { 589 regulator-min-microvolt = <750000>; 590 regulator-max-microvolt = <750000>; 591}; 592 593&mt6359_vufs_ldo_reg { 594 regulator-always-on; 595}; 596 597&nor_flash { 598 status = "okay"; 599 600 pinctrl-names = "default"; 601 pinctrl-0 = <&nor_pins_default>; 602 603 flash@0 { 604 compatible = "jedec,spi-nor"; 605 reg = <0>; 606 spi-max-frequency = <52000000>; 607 spi-rx-bus-width = <2>; 608 spi-tx-bus-width = <2>; 609 }; 610}; 611 612&pcie1 { 613 status = "okay"; 614 615 pinctrl-names = "default"; 616 pinctrl-0 = <&pcie1_pins_default>; 617}; 618 619&pio { 620 mediatek,rsel-resistance-in-si-unit; 621 pinctrl-names = "default"; 622 pinctrl-0 = <&pio_default>; 623 624 /* 144 lines */ 625 gpio-line-names = 626 "I2S_SPKR_MCLK", 627 "I2S_SPKR_DATAIN", 628 "I2S_SPKR_LRCK", 629 "I2S_SPKR_BCLK", 630 "EC_AP_INT_ODL", 631 /* 632 * AP_FLASH_WP_L is crossystem ABI. Schematics 633 * call it AP_FLASH_WP_ODL. 634 */ 635 "AP_FLASH_WP_L", 636 "TCHPAD_INT_ODL", 637 "EDP_HPD_1V8", 638 "AP_I2C_CAM_SDA", 639 "AP_I2C_CAM_SCL", 640 "AP_I2C_TCHPAD_SDA_1V8", 641 "AP_I2C_TCHPAD_SCL_1V8", 642 "AP_I2C_AUD_SDA", 643 "AP_I2C_AUD_SCL", 644 "AP_I2C_TPM_SDA_1V8", 645 "AP_I2C_TPM_SCL_1V8", 646 "AP_I2C_TCHSCR_SDA_1V8", 647 "AP_I2C_TCHSCR_SCL_1V8", 648 "EC_AP_HPD_OD", 649 "", 650 "PCIE_NVME_RST_L", 651 "PCIE_NVME_CLKREQ_ODL", 652 "PCIE_RST_1V8_L", 653 "PCIE_CLKREQ_1V8_ODL", 654 "PCIE_WAKE_1V8_ODL", 655 "CLK_24M_CAM0", 656 "CAM1_SEN_EN", 657 "AP_I2C_PWR_SCL_1V8", 658 "AP_I2C_PWR_SDA_1V8", 659 "AP_I2C_MISC_SCL", 660 "AP_I2C_MISC_SDA", 661 "EN_PP5000_HDMI_X", 662 "AP_HDMITX_HTPLG", 663 "", 664 "AP_HDMITX_SCL_1V8", 665 "AP_HDMITX_SDA_1V8", 666 "AP_RTC_CLK32K", 667 "AP_EC_WATCHDOG_L", 668 "SRCLKENA0", 669 "SRCLKENA1", 670 "PWRAP_SPI0_CS_L", 671 "PWRAP_SPI0_CK", 672 "PWRAP_SPI0_MOSI", 673 "PWRAP_SPI0_MISO", 674 "SPMI_SCL", 675 "SPMI_SDA", 676 "", 677 "", 678 "", 679 "I2S_HP_DATAIN", 680 "I2S_HP_MCLK", 681 "I2S_HP_BCK", 682 "I2S_HP_LRCK", 683 "I2S_HP_DATAOUT", 684 "SD_CD_ODL", 685 "EN_PP3300_DISP_X", 686 "TCHSCR_RST_1V8_L", 687 "TCHSCR_REPORT_DISABLE", 688 "EN_PP3300_WLAN_X", 689 "BT_KILL_1V8_L", 690 "I2S_SPKR_DATAOUT", 691 "WIFI_KILL_1V8_L", 692 "BEEP_ON", 693 "SCP_I2C_SENSOR_SCL_1V8", 694 "SCP_I2C_SENSOR_SDA_1V8", 695 "", 696 "", 697 "", 698 "", 699 "AUD_CLK_MOSI", 700 "AUD_SYNC_MOSI", 701 "AUD_DAT_MOSI0", 702 "AUD_DAT_MOSI1", 703 "AUD_DAT_MISO0", 704 "AUD_DAT_MISO1", 705 "AUD_DAT_MISO2", 706 "SCP_VREQ_VAO", 707 "AP_SPI_GSC_TPM_CLK", 708 "AP_SPI_GSC_TPM_MOSI", 709 "AP_SPI_GSC_TPM_CS_L", 710 "AP_SPI_GSC_TPM_MISO", 711 "EN_PP1000_CAM_X", 712 "AP_EDP_BKLTEN", 713 "", 714 "USB3_HUB_RST_L", 715 "", 716 "WLAN_ALERT_ODL", 717 "EC_IN_RW_ODL", 718 "GSC_AP_INT_ODL", 719 "HP_INT_ODL", 720 "CAM0_RST_L", 721 "CAM1_RST_L", 722 "TCHSCR_INT_1V8_L", 723 "CAM1_DET_L", 724 "RST_ALC1011_L", 725 "", 726 "", 727 "BL_PWM_1V8", 728 "UART_AP_TX_DBG_RX", 729 "UART_DBG_TX_AP_RX", 730 "EN_SPKR", 731 "AP_EC_WARM_RST_REQ", 732 "UART_SCP_TX_DBGCON_RX", 733 "UART_DBGCON_TX_SCP_RX", 734 "", 735 "", 736 "KPCOL0", 737 "", 738 "MT6315_GPU_INT", 739 "MT6315_PROC_BC_INT", 740 "SD_CMD", 741 "SD_CLK", 742 "SD_DAT0", 743 "SD_DAT1", 744 "SD_DAT2", 745 "SD_DAT3", 746 "EMMC_DAT7", 747 "EMMC_DAT6", 748 "EMMC_DAT5", 749 "EMMC_DAT4", 750 "EMMC_RSTB", 751 "EMMC_CMD", 752 "EMMC_CLK", 753 "EMMC_DAT3", 754 "EMMC_DAT2", 755 "EMMC_DAT1", 756 "EMMC_DAT0", 757 "EMMC_DSL", 758 "", 759 "", 760 "MT6360_INT_ODL", 761 "SCP_JTAG0_TRSTN", 762 "AP_SPI_EC_CS_L", 763 "AP_SPI_EC_CLK", 764 "AP_SPI_EC_MOSI", 765 "AP_SPI_EC_MISO", 766 "SCP_JTAG0_TMS", 767 "SCP_JTAG0_TCK", 768 "SCP_JTAG0_TDO", 769 "SCP_JTAG0_TDI", 770 "AP_SPI_FLASH_CS_L", 771 "AP_SPI_FLASH_CLK", 772 "AP_SPI_FLASH_MOSI", 773 "AP_SPI_FLASH_MISO"; 774 775 aud_pins_default: audio-default-pins { 776 pins-cmd-dat { 777 pinmux = <PINMUX_GPIO69__FUNC_AUD_CLK_MOSI>, 778 <PINMUX_GPIO70__FUNC_AUD_SYNC_MOSI>, 779 <PINMUX_GPIO71__FUNC_AUD_DAT_MOSI0>, 780 <PINMUX_GPIO72__FUNC_AUD_DAT_MOSI1>, 781 <PINMUX_GPIO73__FUNC_AUD_DAT_MISO0>, 782 <PINMUX_GPIO74__FUNC_AUD_DAT_MISO1>, 783 <PINMUX_GPIO75__FUNC_AUD_DAT_MISO2>, 784 <PINMUX_GPIO0__FUNC_TDMIN_MCK>, 785 <PINMUX_GPIO1__FUNC_TDMIN_DI>, 786 <PINMUX_GPIO2__FUNC_TDMIN_LRCK>, 787 <PINMUX_GPIO3__FUNC_TDMIN_BCK>, 788 <PINMUX_GPIO60__FUNC_I2SO2_D0>, 789 <PINMUX_GPIO49__FUNC_I2SIN_D0>, 790 <PINMUX_GPIO50__FUNC_I2SO1_MCK>, 791 <PINMUX_GPIO51__FUNC_I2SO1_BCK>, 792 <PINMUX_GPIO52__FUNC_I2SO1_WS>, 793 <PINMUX_GPIO53__FUNC_I2SO1_D0>; 794 }; 795 796 pins-hp-jack-int-odl { 797 pinmux = <PINMUX_GPIO89__FUNC_GPIO89>; 798 input-enable; 799 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 800 }; 801 }; 802 803 cr50_int: cr50-irq-default-pins { 804 pins-gsc-ap-int-odl { 805 pinmux = <PINMUX_GPIO88__FUNC_GPIO88>; 806 input-enable; 807 }; 808 }; 809 810 cros_ec_int: cros-ec-irq-default-pins { 811 pins-ec-ap-int-odl { 812 pinmux = <PINMUX_GPIO4__FUNC_GPIO4>; 813 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 814 input-enable; 815 }; 816 }; 817 818 edptx_pins_default: edptx-default-pins { 819 pins-cmd-dat { 820 pinmux = <PINMUX_GPIO7__FUNC_EDP_TX_HPD>; 821 bias-pull-up; 822 }; 823 }; 824 825 disp_pwm0_pin_default: disp-pwm0-default-pins { 826 pins-disp-pwm { 827 pinmux = <PINMUX_GPIO82__FUNC_GPIO82>, 828 <PINMUX_GPIO97__FUNC_DISP_PWM0>; 829 }; 830 }; 831 832 dptx_pin: dptx-default-pins { 833 pins-cmd-dat { 834 pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>; 835 bias-pull-up; 836 }; 837 }; 838 839 i2c0_pins: i2c0-default-pins { 840 pins-bus { 841 pinmux = <PINMUX_GPIO8__FUNC_SDA0>, 842 <PINMUX_GPIO9__FUNC_SCL0>; 843 bias-disable; 844 drive-strength-microamp = <1000>; 845 }; 846 }; 847 848 i2c1_pins: i2c1-default-pins { 849 pins-bus { 850 pinmux = <PINMUX_GPIO10__FUNC_SDA1>, 851 <PINMUX_GPIO11__FUNC_SCL1>; 852 bias-pull-up = <1000>; 853 drive-strength-microamp = <1000>; 854 }; 855 }; 856 857 i2c2_pins: i2c2-default-pins { 858 pins-bus { 859 pinmux = <PINMUX_GPIO12__FUNC_SDA2>, 860 <PINMUX_GPIO13__FUNC_SCL2>; 861 bias-disable; 862 drive-strength-microamp = <1000>; 863 }; 864 }; 865 866 i2c3_pins: i2c3-default-pins { 867 pins-bus { 868 pinmux = <PINMUX_GPIO14__FUNC_SDA3>, 869 <PINMUX_GPIO15__FUNC_SCL3>; 870 bias-pull-up = <1000>; 871 drive-strength-microamp = <1000>; 872 }; 873 }; 874 875 i2c4_pins: i2c4-default-pins { 876 pins-bus { 877 pinmux = <PINMUX_GPIO16__FUNC_SDA4>, 878 <PINMUX_GPIO17__FUNC_SCL4>; 879 bias-pull-up = <1000>; 880 drive-strength = <4>; 881 }; 882 }; 883 884 i2c5_pins: i2c5-default-pins { 885 pins-bus { 886 pinmux = <PINMUX_GPIO29__FUNC_SCL5>, 887 <PINMUX_GPIO30__FUNC_SDA5>; 888 bias-disable; 889 drive-strength-microamp = <1000>; 890 }; 891 }; 892 893 i2c7_pins: i2c7-default-pins { 894 pins-bus { 895 pinmux = <PINMUX_GPIO27__FUNC_SCL7>, 896 <PINMUX_GPIO28__FUNC_SDA7>; 897 bias-disable; 898 }; 899 }; 900 901 mmc0_pins_default: mmc0-default-pins { 902 pins-cmd-dat { 903 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>, 904 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>, 905 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>, 906 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>, 907 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>, 908 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>, 909 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>, 910 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>, 911 <PINMUX_GPIO121__FUNC_MSDC0_CMD>; 912 input-enable; 913 drive-strength = <6>; 914 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 915 }; 916 917 pins-clk { 918 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>; 919 drive-strength = <6>; 920 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 921 }; 922 923 pins-rst { 924 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>; 925 drive-strength = <6>; 926 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 927 }; 928 }; 929 930 mmc0_pins_uhs: mmc0-uhs-pins { 931 pins-cmd-dat { 932 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>, 933 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>, 934 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>, 935 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>, 936 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>, 937 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>, 938 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>, 939 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>, 940 <PINMUX_GPIO121__FUNC_MSDC0_CMD>; 941 input-enable; 942 drive-strength = <8>; 943 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 944 }; 945 946 pins-clk { 947 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>; 948 drive-strength = <8>; 949 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 950 }; 951 952 pins-ds { 953 pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>; 954 drive-strength = <8>; 955 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 956 }; 957 958 pins-rst { 959 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>; 960 drive-strength = <8>; 961 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 962 }; 963 }; 964 965 mmc1_pins_detect: mmc1-detect-pins { 966 pins-insert { 967 pinmux = <PINMUX_GPIO54__FUNC_GPIO54>; 968 bias-pull-up; 969 }; 970 }; 971 972 mmc1_pins_default: mmc1-default-pins { 973 pins-cmd-dat { 974 pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>, 975 <PINMUX_GPIO112__FUNC_MSDC1_DAT0>, 976 <PINMUX_GPIO113__FUNC_MSDC1_DAT1>, 977 <PINMUX_GPIO114__FUNC_MSDC1_DAT2>, 978 <PINMUX_GPIO115__FUNC_MSDC1_DAT3>; 979 input-enable; 980 drive-strength = <8>; 981 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 982 }; 983 984 pins-clk { 985 pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>; 986 drive-strength = <8>; 987 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 988 }; 989 }; 990 991 nor_pins_default: nor-default-pins { 992 pins-ck-io { 993 pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>, 994 <PINMUX_GPIO141__FUNC_SPINOR_CK>, 995 <PINMUX_GPIO143__FUNC_SPINOR_IO1>; 996 drive-strength = <6>; 997 bias-pull-down; 998 }; 999 1000 pins-cs { 1001 pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>; 1002 drive-strength = <6>; 1003 bias-pull-up; 1004 }; 1005 }; 1006 1007 pcie0_pins_default: pcie0-default-pins { 1008 pins-bus { 1009 pinmux = <PINMUX_GPIO19__FUNC_WAKEN>, 1010 <PINMUX_GPIO20__FUNC_PERSTN>, 1011 <PINMUX_GPIO21__FUNC_CLKREQN>; 1012 bias-pull-up; 1013 }; 1014 }; 1015 1016 pcie1_pins_default: pcie1-default-pins { 1017 pins-bus { 1018 pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>, 1019 <PINMUX_GPIO23__FUNC_CLKREQN_1>, 1020 <PINMUX_GPIO24__FUNC_WAKEN_1>; 1021 bias-pull-up; 1022 }; 1023 }; 1024 1025 panel_fixed_pins: panel-pwr-default-pins { 1026 pins-vreg-en { 1027 pinmux = <PINMUX_GPIO55__FUNC_GPIO55>; 1028 }; 1029 }; 1030 1031 pio_default: pio-default-pins { 1032 pins-wifi-enable { 1033 pinmux = <PINMUX_GPIO58__FUNC_GPIO58>; 1034 output-high; 1035 drive-strength = <14>; 1036 }; 1037 1038 pins-low-power-pd { 1039 pinmux = <PINMUX_GPIO25__FUNC_GPIO25>, 1040 <PINMUX_GPIO26__FUNC_GPIO26>, 1041 <PINMUX_GPIO46__FUNC_GPIO46>, 1042 <PINMUX_GPIO47__FUNC_GPIO47>, 1043 <PINMUX_GPIO48__FUNC_GPIO48>, 1044 <PINMUX_GPIO65__FUNC_GPIO65>, 1045 <PINMUX_GPIO66__FUNC_GPIO66>, 1046 <PINMUX_GPIO67__FUNC_GPIO67>, 1047 <PINMUX_GPIO68__FUNC_GPIO68>, 1048 <PINMUX_GPIO128__FUNC_GPIO128>, 1049 <PINMUX_GPIO129__FUNC_GPIO129>; 1050 input-enable; 1051 bias-pull-down; 1052 }; 1053 1054 pins-low-power-pupd { 1055 pinmux = <PINMUX_GPIO77__FUNC_GPIO77>, 1056 <PINMUX_GPIO78__FUNC_GPIO78>, 1057 <PINMUX_GPIO79__FUNC_GPIO79>, 1058 <PINMUX_GPIO80__FUNC_GPIO80>, 1059 <PINMUX_GPIO83__FUNC_GPIO83>, 1060 <PINMUX_GPIO85__FUNC_GPIO85>, 1061 <PINMUX_GPIO90__FUNC_GPIO90>, 1062 <PINMUX_GPIO91__FUNC_GPIO91>, 1063 <PINMUX_GPIO93__FUNC_GPIO93>, 1064 <PINMUX_GPIO94__FUNC_GPIO94>, 1065 <PINMUX_GPIO95__FUNC_GPIO95>, 1066 <PINMUX_GPIO96__FUNC_GPIO96>, 1067 <PINMUX_GPIO104__FUNC_GPIO104>, 1068 <PINMUX_GPIO105__FUNC_GPIO105>, 1069 <PINMUX_GPIO107__FUNC_GPIO107>; 1070 input-enable; 1071 bias-pull-down = <MTK_PUPD_SET_R1R0_01>; 1072 }; 1073 }; 1074 1075 rt1019p_pins_default: rt1019p-default-pins { 1076 pins-amp-sdb { 1077 pinmux = <PINMUX_GPIO100__FUNC_GPIO100>; 1078 output-low; 1079 }; 1080 }; 1081 1082 scp_pins: scp-default-pins { 1083 pins-vreq { 1084 pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>; 1085 bias-disable; 1086 input-enable; 1087 }; 1088 }; 1089 1090 spi0_pins: spi0-default-pins { 1091 pins-cs-mosi-clk { 1092 pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>, 1093 <PINMUX_GPIO134__FUNC_SPIM0_MO>, 1094 <PINMUX_GPIO133__FUNC_SPIM0_CLK>; 1095 bias-disable; 1096 }; 1097 1098 pins-miso { 1099 pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>; 1100 bias-pull-down; 1101 }; 1102 }; 1103 1104 subpmic_default: subpmic-default-pins { 1105 subpmic_pin_irq: pins-subpmic-int-n { 1106 pinmux = <PINMUX_GPIO130__FUNC_GPIO130>; 1107 input-enable; 1108 bias-pull-up; 1109 }; 1110 }; 1111 1112 trackpad_pins: trackpad-default-pins { 1113 pins-int-n { 1114 pinmux = <PINMUX_GPIO6__FUNC_GPIO6>; 1115 input-enable; 1116 bias-pull-up; 1117 }; 1118 }; 1119 1120 touchscreen_pins: touchscreen-default-pins { 1121 pins-int-n { 1122 pinmux = <PINMUX_GPIO92__FUNC_GPIO92>; 1123 input-enable; 1124 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1125 }; 1126 pins-rst { 1127 pinmux = <PINMUX_GPIO56__FUNC_GPIO56>; 1128 output-high; 1129 }; 1130 pins-report-sw { 1131 pinmux = <PINMUX_GPIO57__FUNC_GPIO57>; 1132 output-low; 1133 }; 1134 }; 1135}; 1136 1137&pmic { 1138 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; 1139}; 1140 1141&scp { 1142 status = "okay"; 1143 1144 firmware-name = "mediatek/mt8195/scp.img"; 1145 memory-region = <&scp_mem>; 1146 pinctrl-names = "default"; 1147 pinctrl-0 = <&scp_pins>; 1148 1149 cros-ec-rpmsg { 1150 compatible = "google,cros-ec-rpmsg"; 1151 mediatek,rpmsg-name = "cros-ec-rpmsg"; 1152 }; 1153}; 1154 1155&sound { 1156 status = "okay"; 1157 1158 mediatek,adsp = <&adsp>; 1159 mediatek,dai-link = 1160 "DL10_FE", "DPTX_BE", "ETDM1_IN_BE", "ETDM2_IN_BE", 1161 "ETDM1_OUT_BE", "ETDM2_OUT_BE","UL_SRC1_BE", 1162 "AFE_SOF_DL2", "AFE_SOF_DL3", "AFE_SOF_UL4", "AFE_SOF_UL5"; 1163 pinctrl-names = "default"; 1164 pinctrl-0 = <&aud_pins_default>; 1165}; 1166 1167&spi0 { 1168 status = "okay"; 1169 1170 pinctrl-names = "default"; 1171 pinctrl-0 = <&spi0_pins>; 1172 mediatek,pad-select = <0>; 1173 1174 cros_ec: ec@0 { 1175 #address-cells = <1>; 1176 #size-cells = <0>; 1177 1178 compatible = "google,cros-ec-spi"; 1179 reg = <0>; 1180 interrupts-extended = <&pio 4 IRQ_TYPE_LEVEL_LOW>; 1181 pinctrl-names = "default"; 1182 pinctrl-0 = <&cros_ec_int>; 1183 spi-max-frequency = <3000000>; 1184 wakeup-source; 1185 1186 keyboard-backlight { 1187 compatible = "google,cros-kbd-led-backlight"; 1188 }; 1189 1190 i2c_tunnel: i2c-tunnel { 1191 compatible = "google,cros-ec-i2c-tunnel"; 1192 google,remote-bus = <0>; 1193 #address-cells = <1>; 1194 #size-cells = <0>; 1195 }; 1196 1197 mt_pmic_vmc_ldo_reg: regulator@0 { 1198 compatible = "google,cros-ec-regulator"; 1199 reg = <0>; 1200 regulator-name = "mt_pmic_vmc_ldo"; 1201 regulator-min-microvolt = <1200000>; 1202 regulator-max-microvolt = <3600000>; 1203 }; 1204 1205 mt_pmic_vmch_ldo_reg: regulator@1 { 1206 compatible = "google,cros-ec-regulator"; 1207 reg = <1>; 1208 regulator-name = "mt_pmic_vmch_ldo"; 1209 regulator-min-microvolt = <2700000>; 1210 regulator-max-microvolt = <3600000>; 1211 }; 1212 1213 typec { 1214 compatible = "google,cros-ec-typec"; 1215 #address-cells = <1>; 1216 #size-cells = <0>; 1217 1218 usb_c0: connector@0 { 1219 compatible = "usb-c-connector"; 1220 reg = <0>; 1221 power-role = "dual"; 1222 data-role = "host"; 1223 try-power-role = "source"; 1224 }; 1225 1226 usb_c1: connector@1 { 1227 compatible = "usb-c-connector"; 1228 reg = <1>; 1229 power-role = "dual"; 1230 data-role = "host"; 1231 try-power-role = "source"; 1232 }; 1233 }; 1234 }; 1235}; 1236 1237&spmi { 1238 #address-cells = <2>; 1239 #size-cells = <0>; 1240 1241 mt6315@6 { 1242 compatible = "mediatek,mt6315-regulator"; 1243 reg = <0x6 SPMI_USID>; 1244 1245 regulators { 1246 mt6315_6_vbuck1: vbuck1 { 1247 regulator-compatible = "vbuck1"; 1248 regulator-name = "Vbcpu"; 1249 regulator-min-microvolt = <400000>; 1250 regulator-max-microvolt = <1193750>; 1251 regulator-enable-ramp-delay = <256>; 1252 regulator-ramp-delay = <6250>; 1253 regulator-allowed-modes = <0 1 2>; 1254 regulator-always-on; 1255 }; 1256 }; 1257 }; 1258 1259 mt6315@7 { 1260 compatible = "mediatek,mt6315-regulator"; 1261 reg = <0x7 SPMI_USID>; 1262 1263 regulators { 1264 mt6315_7_vbuck1: vbuck1 { 1265 regulator-compatible = "vbuck1"; 1266 regulator-name = "Vgpu"; 1267 regulator-min-microvolt = <400000>; 1268 regulator-max-microvolt = <1193750>; 1269 regulator-enable-ramp-delay = <256>; 1270 regulator-ramp-delay = <6250>; 1271 regulator-allowed-modes = <0 1 2>; 1272 }; 1273 }; 1274 }; 1275}; 1276 1277&thermal_zones { 1278 soc-area-thermal { 1279 polling-delay = <1000>; 1280 polling-delay-passive = <250>; 1281 thermal-sensors = <&tboard_thermistor1>; 1282 1283 trips { 1284 trip-crit { 1285 temperature = <84000>; 1286 hysteresis = <1000>; 1287 type = "critical"; 1288 }; 1289 }; 1290 }; 1291 1292 pmic-area-thermal { 1293 polling-delay = <1000>; 1294 polling-delay-passive = <0>; 1295 thermal-sensors = <&tboard_thermistor2>; 1296 1297 trips { 1298 trip-crit { 1299 temperature = <84000>; 1300 hysteresis = <1000>; 1301 type = "critical"; 1302 }; 1303 }; 1304 }; 1305}; 1306 1307&u3phy0 { 1308 status = "okay"; 1309}; 1310 1311&u3phy1 { 1312 status = "okay"; 1313}; 1314 1315&u3phy2 { 1316 status = "okay"; 1317}; 1318 1319&u3phy3 { 1320 status = "okay"; 1321}; 1322 1323&uart0 { 1324 status = "okay"; 1325}; 1326 1327/* 1328 * For the USB Type-C ports the role and alternate modes switching is 1329 * done by the EC so we set dr_mode to host to avoid interfering. 1330 */ 1331&ssusb0 { 1332 dr_mode = "host"; 1333 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1334 status = "okay"; 1335}; 1336 1337&ssusb2 { 1338 dr_mode = "host"; 1339 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1340 status = "okay"; 1341}; 1342 1343&ssusb3 { 1344 dr_mode = "host"; 1345 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1346 status = "okay"; 1347}; 1348 1349&xhci0 { 1350 status = "okay"; 1351 1352 rx-fifo-depth = <3072>; 1353 vbus-supply = <&usb_vbus>; 1354}; 1355 1356&xhci1 { 1357 status = "okay"; 1358 1359 rx-fifo-depth = <3072>; 1360 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1361 vbus-supply = <&usb_vbus>; 1362}; 1363 1364&xhci2 { 1365 status = "okay"; 1366 vbus-supply = <&usb_vbus>; 1367}; 1368 1369&xhci3 { 1370 status = "okay"; 1371 1372 /* MT7921's USB Bluetooth has issues with USB2 LPM */ 1373 usb2-lpm-disable; 1374 vbus-supply = <&usb_vbus>; 1375}; 1376 1377#include <arm/cros-ec-keyboard.dtsi> 1378#include <arm/cros-ec-sbs.dtsi> 1379 1380&keyboard_controller { 1381 function-row-physmap = < 1382 MATRIX_KEY(0x00, 0x02, 0) /* T1 */ 1383 MATRIX_KEY(0x03, 0x02, 0) /* T2 */ 1384 MATRIX_KEY(0x02, 0x02, 0) /* T3 */ 1385 MATRIX_KEY(0x01, 0x02, 0) /* T4 */ 1386 MATRIX_KEY(0x03, 0x04, 0) /* T5 */ 1387 MATRIX_KEY(0x02, 0x04, 0) /* T6 */ 1388 MATRIX_KEY(0x01, 0x04, 0) /* T7 */ 1389 MATRIX_KEY(0x02, 0x09, 0) /* T8 */ 1390 MATRIX_KEY(0x01, 0x09, 0) /* T9 */ 1391 MATRIX_KEY(0x00, 0x04, 0) /* T10 */ 1392 >; 1393 1394 linux,keymap = < 1395 MATRIX_KEY(0x00, 0x02, KEY_BACK) 1396 MATRIX_KEY(0x03, 0x02, KEY_REFRESH) 1397 MATRIX_KEY(0x02, 0x02, KEY_ZOOM) 1398 MATRIX_KEY(0x01, 0x02, KEY_SCALE) 1399 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ) 1400 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) 1401 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) 1402 MATRIX_KEY(0x02, 0x09, KEY_MUTE) 1403 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) 1404 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) 1405 1406 CROS_STD_MAIN_KEYMAP 1407 >; 1408}; 1409