1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Device Tree support for Rockchip SoCs
4 *
5 * Copyright (c) 2013 MundoReader S.L.
6 * Author: Heiko Stuebner <heiko@sntech.de>
7 */
8
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/of.h>
13#include <linux/of_clk.h>
14#include <linux/clocksource.h>
15#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17#include "core.h"
18#include "pm.h"
19
20#define RK3288_TIMER6_7_PHYS 0xff810000
21
22static void __init rockchip_timer_init(void)
23{
24	if (of_machine_is_compatible("rockchip,rk3288")) {
25		void __iomem *reg_base;
26
27		/*
28		 * Most/all uboot versions for rk3288 don't enable timer7
29		 * which is needed for the architected timer to work.
30		 * So make sure it is running during early boot.
31		 */
32		reg_base = ioremap(RK3288_TIMER6_7_PHYS, SZ_16K);
33		if (reg_base) {
34			writel(0, reg_base + 0x30);
35			writel(0xffffffff, reg_base + 0x20);
36			writel(0xffffffff, reg_base + 0x24);
37			writel(1, reg_base + 0x30);
38			dsb();
39			iounmap(reg_base);
40		} else {
41			pr_err("rockchip: could not map timer7 registers\n");
42		}
43	}
44
45	of_clk_init(NULL);
46	timer_probe();
47}
48
49static void __init rockchip_dt_init(void)
50{
51	rockchip_suspend_init();
52}
53
54static const char * const rockchip_board_dt_compat[] = {
55	"rockchip,rk2928",
56	"rockchip,rk3066a",
57	"rockchip,rk3066b",
58	"rockchip,rk3188",
59	"rockchip,rk3228",
60	"rockchip,rk3288",
61	"rockchip,rv1108",
62	NULL,
63};
64
65DT_MACHINE_START(ROCKCHIP_DT, "Rockchip (Device Tree)")
66	.l2c_aux_val	= 0,
67	.l2c_aux_mask	= ~0,
68	.init_time	= rockchip_timer_init,
69	.dt_compat	= rockchip_board_dt_compat,
70	.init_machine	= rockchip_dt_init,
71MACHINE_END
72