1189251Ssam// SPDX-License-Identifier: GPL-2.0 2214734Srpaulo/* 3214734Srpaulo * Samsung Exynos5260 SoC device tree source 4189251Ssam * 5189251Ssam * Copyright (c) 2013 Samsung Electronics Co., Ltd. 6189251Ssam * http://www.samsung.com 7189251Ssam */ 8189251Ssam 9189251Ssam#include <dt-bindings/clock/exynos5260-clk.h> 10189251Ssam#include <dt-bindings/interrupt-controller/arm-gic.h> 11189251Ssam#include <dt-bindings/interrupt-controller/irq.h> 12189251Ssam 13189251Ssam/ { 14189251Ssam compatible = "samsung,exynos5260", "samsung,exynos5"; 15189251Ssam interrupt-parent = <&gic>; 16189251Ssam #address-cells = <1>; 17189251Ssam #size-cells = <1>; 18189251Ssam 19189251Ssam aliases { 20189251Ssam i2c0 = &hsi2c_0; 21189251Ssam i2c1 = &hsi2c_1; 22189251Ssam i2c2 = &hsi2c_2; 23189251Ssam i2c3 = &hsi2c_3; 24189251Ssam pinctrl0 = &pinctrl_0; 25189251Ssam pinctrl1 = &pinctrl_1; 26189251Ssam pinctrl2 = &pinctrl_2; 27189251Ssam serial0 = &uart0; 28189251Ssam serial1 = &uart1; 29189251Ssam serial2 = &uart2; 30189251Ssam serial3 = &uart3; 31189251Ssam }; 32189251Ssam 33189251Ssam cpus { 34189251Ssam #address-cells = <1>; 35189251Ssam #size-cells = <0>; 36189251Ssam 37189251Ssam cpu-map { 38189251Ssam cluster0 { 39189251Ssam core0 { 40189251Ssam cpu = <&cpu0>; 41189251Ssam }; 42189251Ssam core1 { 43189251Ssam cpu = <&cpu1>; 44189251Ssam }; 45189251Ssam }; 46189251Ssam 47189251Ssam cluster1 { 48189251Ssam core0 { 49189251Ssam cpu = <&cpu2>; 50189251Ssam }; 51189251Ssam core1 { 52189251Ssam cpu = <&cpu3>; 53189251Ssam }; 54189251Ssam core2 { 55189251Ssam cpu = <&cpu4>; 56189251Ssam }; 57189251Ssam core3 { 58189251Ssam cpu = <&cpu5>; 59189251Ssam }; 60189251Ssam }; 61189251Ssam }; 62189251Ssam 63189251Ssam cpu0: cpu@0 { 64189251Ssam device_type = "cpu"; 65189251Ssam compatible = "arm,cortex-a15"; 66189251Ssam reg = <0x0>; 67189251Ssam cci-control-port = <&cci_control1>; 68189251Ssam }; 69189251Ssam 70189251Ssam cpu1: cpu@1 { 71189251Ssam device_type = "cpu"; 72189251Ssam compatible = "arm,cortex-a15"; 73189251Ssam reg = <0x1>; 74189251Ssam cci-control-port = <&cci_control1>; 75189251Ssam }; 76189251Ssam 77189251Ssam cpu2: cpu@100 { 78189251Ssam device_type = "cpu"; 79189251Ssam compatible = "arm,cortex-a7"; 80189251Ssam reg = <0x100>; 81189251Ssam cci-control-port = <&cci_control0>; 82189251Ssam }; 83189251Ssam 84189251Ssam cpu3: cpu@101 { 85189251Ssam device_type = "cpu"; 86189251Ssam compatible = "arm,cortex-a7"; 87189251Ssam reg = <0x101>; 88189251Ssam cci-control-port = <&cci_control0>; 89189251Ssam }; 90189251Ssam 91189251Ssam cpu4: cpu@102 { 92189251Ssam device_type = "cpu"; 93189251Ssam compatible = "arm,cortex-a7"; 94189251Ssam reg = <0x102>; 95189251Ssam cci-control-port = <&cci_control0>; 96189251Ssam }; 97189251Ssam 98189251Ssam cpu5: cpu@103 { 99189251Ssam device_type = "cpu"; 100189251Ssam compatible = "arm,cortex-a7"; 101189251Ssam reg = <0x103>; 102189251Ssam cci-control-port = <&cci_control0>; 103189251Ssam }; 104189251Ssam }; 105189251Ssam 106189251Ssam soc: soc { 107189251Ssam compatible = "simple-bus"; 108189251Ssam #address-cells = <1>; 109189251Ssam #size-cells = <1>; 110189251Ssam ranges; 111189251Ssam 112189251Ssam clock_top: clock-controller@10010000 { 113189251Ssam compatible = "samsung,exynos5260-clock-top"; 114189251Ssam reg = <0x10010000 0x10000>; 115189251Ssam #clock-cells = <1>; 116189251Ssam clocks = <&fin_pll>, 117189251Ssam <&clock_mif MIF_DOUT_MEM_PLL>, 118189251Ssam <&clock_mif MIF_DOUT_BUS_PLL>, 119189251Ssam <&clock_mif MIF_DOUT_MEDIA_PLL>; 120189251Ssam clock-names = "fin_pll", 121189251Ssam "dout_mem_pll", 122189251Ssam "dout_bus_pll", 123189251Ssam "dout_media_pll"; 124189251Ssam }; 125189251Ssam 126189251Ssam clock_peri: clock-controller@10200000 { 127189251Ssam compatible = "samsung,exynos5260-clock-peri"; 128189251Ssam reg = <0x10200000 0x10000>; 129189251Ssam #clock-cells = <1>; 130189251Ssam clocks = <&fin_pll>, 131189251Ssam <&ioclk_pcm>, 132189251Ssam <&ioclk_i2s>, 133189251Ssam <&ioclk_spdif>, 134189251Ssam <&fin_pll>, 135189251Ssam <&clock_top TOP_DOUT_ACLK_PERI_66>, 136189251Ssam <&clock_top TOP_DOUT_SCLK_PERI_UART0>, 137189251Ssam <&clock_top TOP_DOUT_SCLK_PERI_UART1>, 138189251Ssam <&clock_top TOP_DOUT_SCLK_PERI_UART2>, 139189251Ssam <&clock_top TOP_DOUT_SCLK_PERI_SPI0_B>, 140189251Ssam <&clock_top TOP_DOUT_SCLK_PERI_SPI1_B>, 141189251Ssam <&clock_top TOP_DOUT_SCLK_PERI_SPI2_B>, 142189251Ssam <&clock_top TOP_DOUT_ACLK_PERI_AUD>; 143189251Ssam clock-names = "fin_pll", 144189251Ssam "ioclk_pcm_extclk", 145189251Ssam "ioclk_i2s_cdclk", 146189251Ssam "ioclk_spdif_extclk", 147189251Ssam "phyclk_hdmi_phy_ref_cko", 148189251Ssam "dout_aclk_peri_66", 149189251Ssam "dout_sclk_peri_uart0", 150189251Ssam "dout_sclk_peri_uart1", 151189251Ssam "dout_sclk_peri_uart2", 152189251Ssam "dout_sclk_peri_spi0_b", 153189251Ssam "dout_sclk_peri_spi1_b", 154189251Ssam "dout_sclk_peri_spi2_b", 155189251Ssam "dout_aclk_peri_aud"; 156189251Ssam }; 157189251Ssam 158189251Ssam clock_egl: clock-controller@10600000 { 159189251Ssam compatible = "samsung,exynos5260-clock-egl"; 160189251Ssam reg = <0x10600000 0x10000>; 161189251Ssam #clock-cells = <1>; 162189251Ssam clocks = <&fin_pll>, 163189251Ssam <&clock_mif MIF_DOUT_BUS_PLL>; 164189251Ssam clock-names = "fin_pll", 165189251Ssam "dout_bus_pll"; 166189251Ssam }; 167189251Ssam 168189251Ssam clock_kfc: clock-controller@10700000 { 169189251Ssam compatible = "samsung,exynos5260-clock-kfc"; 170189251Ssam reg = <0x10700000 0x10000>; 171189251Ssam #clock-cells = <1>; 172189251Ssam clocks = <&fin_pll>, 173189251Ssam <&clock_mif MIF_DOUT_MEDIA_PLL>; 174189251Ssam clock-names = "fin_pll", 175189251Ssam "dout_media_pll"; 176189251Ssam }; 177189251Ssam 178189251Ssam clock_g2d: clock-controller@10a00000 { 179189251Ssam compatible = "samsung,exynos5260-clock-g2d"; 180189251Ssam reg = <0x10a00000 0x10000>; 181189251Ssam #clock-cells = <1>; 182189251Ssam clocks = <&fin_pll>, 183189251Ssam <&clock_top TOP_DOUT_ACLK_G2D_333>; 184189251Ssam clock-names = "fin_pll", 185189251Ssam "dout_aclk_g2d_333"; 186189251Ssam }; 187189251Ssam 188189251Ssam clock_mif: clock-controller@10ce0000 { 189189251Ssam compatible = "samsung,exynos5260-clock-mif"; 190189251Ssam reg = <0x10ce0000 0x10000>; 191189251Ssam #clock-cells = <1>; 192189251Ssam clocks = <&fin_pll>; 193189251Ssam clock-names = "fin_pll"; 194189251Ssam }; 195189251Ssam 196189251Ssam clock_mfc: clock-controller@11090000 { 197189251Ssam compatible = "samsung,exynos5260-clock-mfc"; 198189251Ssam reg = <0x11090000 0x10000>; 199189251Ssam #clock-cells = <1>; 200189251Ssam clocks = <&fin_pll>, 201189251Ssam <&clock_top TOP_DOUT_ACLK_MFC_333>; 202189251Ssam clock-names = "fin_pll", 203189251Ssam "dout_aclk_mfc_333"; 204189251Ssam }; 205189251Ssam 206189251Ssam clock_g3d: clock-controller@11830000 { 207189251Ssam compatible = "samsung,exynos5260-clock-g3d"; 208189251Ssam reg = <0x11830000 0x10000>; 209189251Ssam #clock-cells = <1>; 210189251Ssam clocks = <&fin_pll>; 211189251Ssam clock-names = "fin_pll"; 212189251Ssam }; 213189251Ssam 214189251Ssam clock_fsys: clock-controller@122e0000 { 215189251Ssam compatible = "samsung,exynos5260-clock-fsys"; 216189251Ssam reg = <0x122e0000 0x10000>; 217189251Ssam #clock-cells = <1>; 218189251Ssam clocks = <&fin_pll>, 219189251Ssam <&fin_pll>, 220189251Ssam <&fin_pll>, 221189251Ssam <&fin_pll>, 222189251Ssam <&fin_pll>, 223189251Ssam <&fin_pll>, 224189251Ssam <&clock_top TOP_DOUT_ACLK_FSYS_200>; 225189251Ssam clock-names = "fin_pll", 226189251Ssam "phyclk_usbhost20_phy_phyclock", 227189251Ssam "phyclk_usbhost20_phy_freeclk", 228189251Ssam "phyclk_usbhost20_phy_clk48mohci", 229189251Ssam "phyclk_usbdrd30_udrd30_pipe_pclk", 230189251Ssam "phyclk_usbdrd30_udrd30_phyclock", 231189251Ssam "dout_aclk_fsys_200"; 232189251Ssam }; 233189251Ssam 234189251Ssam clock_aud: clock-controller@128c0000 { 235189251Ssam compatible = "samsung,exynos5260-clock-aud"; 236189251Ssam reg = <0x128c0000 0x10000>; 237189251Ssam #clock-cells = <1>; 238189251Ssam clocks = <&fin_pll>, 239189251Ssam <&clock_top TOP_FOUT_AUD_PLL>, 240189251Ssam <&ioclk_i2s>, 241189251Ssam <&ioclk_pcm>; 242189251Ssam clock-names = "fin_pll", 243189251Ssam "fout_aud_pll", 244189251Ssam "ioclk_i2s_cdclk", 245189251Ssam "ioclk_pcm_extclk"; 246189251Ssam }; 247189251Ssam 248189251Ssam clock_isp: clock-controller@133c0000 { 249189251Ssam compatible = "samsung,exynos5260-clock-isp"; 250189251Ssam reg = <0x133c0000 0x10000>; 251189251Ssam #clock-cells = <1>; 252189251Ssam clocks = <&fin_pll>, 253189251Ssam <&clock_top TOP_DOUT_ACLK_ISP1_266>, 254189251Ssam <&clock_top TOP_DOUT_ACLK_ISP1_400>, 255189251Ssam <&clock_top TOP_MOUT_ACLK_ISP1_266>; 256189251Ssam clock-names = "fin_pll", 257189251Ssam "dout_aclk_isp1_266", 258189251Ssam "dout_aclk_isp1_400", 259189251Ssam "mout_aclk_isp1_266"; 260189251Ssam }; 261189251Ssam 262189251Ssam clock_gscl: clock-controller@13f00000 { 263189251Ssam compatible = "samsung,exynos5260-clock-gscl"; 264189251Ssam reg = <0x13f00000 0x10000>; 265189251Ssam #clock-cells = <1>; 266189251Ssam clocks = <&fin_pll>, 267189251Ssam <&clock_top TOP_DOUT_ACLK_GSCL_400>, 268189251Ssam <&clock_top TOP_DOUT_ACLK_GSCL_333>; 269189251Ssam clock-names = "fin_pll", 270189251Ssam "dout_aclk_gscl_400", 271189251Ssam "dout_aclk_gscl_333"; 272189251Ssam }; 273189251Ssam 274189251Ssam clock_disp: clock-controller@14550000 { 275189251Ssam compatible = "samsung,exynos5260-clock-disp"; 276189251Ssam reg = <0x14550000 0x10000>; 277189251Ssam #clock-cells = <1>; 278189251Ssam clocks = <&fin_pll>, 279189251Ssam <&fin_pll>, 280189251Ssam <&fin_pll>, 281189251Ssam <&fin_pll>, 282189251Ssam <&fin_pll>, 283189251Ssam <&fin_pll>, 284189251Ssam <&fin_pll>, 285189251Ssam <&fin_pll>, 286189251Ssam <&fin_pll>, 287189251Ssam <&fin_pll>, 288189251Ssam <&fin_pll>, 289189251Ssam <&fin_pll>, 290189251Ssam <&fin_pll>, 291189251Ssam <&fin_pll>, 292189251Ssam <&ioclk_spdif>, 293189251Ssam <&clock_top TOP_DOUT_ACLK_PERI_AUD>, 294189251Ssam <&clock_top TOP_DOUT_ACLK_DISP_222>, 295189251Ssam <&clock_top TOP_DOUT_SCLK_DISP_PIXEL>, 296189251Ssam <&clock_top TOP_DOUT_ACLK_DISP_333>; 297189251Ssam clock-names = "fin_pll", 298189251Ssam "phyclk_dptx_phy_ch3_txd_clk", 299189251Ssam "phyclk_dptx_phy_ch2_txd_clk", 300189251Ssam "phyclk_dptx_phy_ch1_txd_clk", 301189251Ssam "phyclk_dptx_phy_ch0_txd_clk", 302189251Ssam "phyclk_hdmi_phy_tmds_clko", 303189251Ssam "phyclk_hdmi_phy_ref_clko", 304189251Ssam "phyclk_hdmi_phy_pixel_clko", 305189251Ssam "phyclk_hdmi_link_o_tmds_clkhi", 306189251Ssam "phyclk_mipi_dphy_4l_m_txbyte_clkhs", 307189251Ssam "phyclk_dptx_phy_o_ref_clk_24m", 308189251Ssam "phyclk_dptx_phy_clk_div2", 309189251Ssam "phyclk_mipi_dphy_4l_m_rxclkesc0", 310189251Ssam "phyclk_hdmi_phy_ref_cko", 311189251Ssam "ioclk_spdif_extclk", 312189251Ssam "dout_aclk_peri_aud", 313189251Ssam "dout_aclk_disp_222", 314189251Ssam "dout_sclk_disp_pixel", 315189251Ssam "dout_aclk_disp_333"; 316189251Ssam }; 317189251Ssam 318189251Ssam gic: interrupt-controller@10481000 { 319189251Ssam compatible = "arm,gic-400", "arm,cortex-a15-gic"; 320189251Ssam #interrupt-cells = <3>; 321189251Ssam interrupt-controller; 322189251Ssam reg = <0x10481000 0x1000>, 323189251Ssam <0x10482000 0x2000>, 324189251Ssam <0x10484000 0x2000>, 325189251Ssam <0x10486000 0x2000>; 326189251Ssam interrupts = <GIC_PPI 9 327189251Ssam (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 328189251Ssam }; 329189251Ssam 330189251Ssam chipid: chipid@10000000 { 331189251Ssam compatible = "samsung,exynos4210-chipid"; 332189251Ssam reg = <0x10000000 0x100>; 333189251Ssam }; 334189251Ssam 335189251Ssam mct: timer@100b0000 { 336189251Ssam compatible = "samsung,exynos5260-mct", 337189251Ssam "samsung,exynos4210-mct"; 338189251Ssam reg = <0x100b0000 0x1000>; 339189251Ssam clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>; 340189251Ssam clock-names = "fin_pll", "mct"; 341189251Ssam interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 342189251Ssam <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 343189251Ssam <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 344189251Ssam <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 345189251Ssam <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 346189251Ssam <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 347189251Ssam <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 348189251Ssam <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 349189251Ssam <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 350189251Ssam <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, 351189251Ssam <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 352189251Ssam <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; 353189251Ssam }; 354189251Ssam 355189251Ssam cci: cci@10f00000 { 356189251Ssam compatible = "arm,cci-400"; 357189251Ssam #address-cells = <1>; 358189251Ssam #size-cells = <1>; 359189251Ssam reg = <0x10f00000 0x1000>; 360189251Ssam ranges = <0x0 0x10f00000 0x6000>; 361189251Ssam 362189251Ssam cci_control0: slave-if@4000 { 363189251Ssam compatible = "arm,cci-400-ctrl-if"; 364189251Ssam interface-type = "ace"; 365189251Ssam reg = <0x4000 0x1000>; 366189251Ssam }; 367189251Ssam 368189251Ssam cci_control1: slave-if@5000 { 369189251Ssam compatible = "arm,cci-400-ctrl-if"; 370189251Ssam interface-type = "ace"; 371189251Ssam reg = <0x5000 0x1000>; 372189251Ssam }; 373189251Ssam }; 374189251Ssam 375189251Ssam pinctrl_0: pinctrl@11600000 { 376189251Ssam compatible = "samsung,exynos5260-pinctrl"; 377189251Ssam reg = <0x11600000 0x1000>; 378189251Ssam interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 379189251Ssam 380189251Ssam wakeup-interrupt-controller { 381189251Ssam compatible = "samsung,exynos4210-wakeup-eint"; 382214734Srpaulo interrupt-parent = <&gic>; 383214734Srpaulo interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 384214734Srpaulo }; 385214734Srpaulo }; 386214734Srpaulo 387214734Srpaulo pinctrl_1: pinctrl@12290000 { 388189251Ssam compatible = "samsung,exynos5260-pinctrl"; 389189251Ssam reg = <0x12290000 0x1000>; 390189251Ssam interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 391189251Ssam }; 392189251Ssam 393189251Ssam pinctrl_2: pinctrl@128b0000 { 394189251Ssam compatible = "samsung,exynos5260-pinctrl"; 395189251Ssam reg = <0x128b0000 0x1000>; 396189251Ssam interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 397214734Srpaulo }; 398214734Srpaulo 399214734Srpaulo pmu_system_controller: system-controller@10d50000 { 400214734Srpaulo compatible = "samsung,exynos5260-pmu", "syscon"; 401214734Srpaulo reg = <0x10d50000 0x10000>; 402214734Srpaulo }; 403214734Srpaulo 404214734Srpaulo uart0: serial@12c00000 { 405189251Ssam compatible = "samsung,exynos4210-uart"; 406189251Ssam reg = <0x12c00000 0x100>; 407189251Ssam interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 408189251Ssam clocks = <&clock_peri PERI_CLK_UART0>, <&clock_peri PERI_SCLK_UART0>; 409189251Ssam clock-names = "uart", "clk_uart_baud0"; 410189251Ssam status = "disabled"; 411189251Ssam }; 412189251Ssam 413189251Ssam uart1: serial@12c10000 { 414189251Ssam compatible = "samsung,exynos4210-uart"; 415189251Ssam reg = <0x12c10000 0x100>; 416189251Ssam interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 417189251Ssam clocks = <&clock_peri PERI_CLK_UART1>, <&clock_peri PERI_SCLK_UART1>; 418189251Ssam clock-names = "uart", "clk_uart_baud0"; 419189251Ssam status = "disabled"; 420189251Ssam }; 421189251Ssam 422189251Ssam uart2: serial@12c20000 { 423189251Ssam compatible = "samsung,exynos4210-uart"; 424189251Ssam reg = <0x12c20000 0x100>; 425189251Ssam interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 426189251Ssam clocks = <&clock_peri PERI_CLK_UART2>, <&clock_peri PERI_SCLK_UART2>; 427189251Ssam clock-names = "uart", "clk_uart_baud0"; 428189251Ssam status = "disabled"; 429189251Ssam }; 430189251Ssam 431189251Ssam uart3: serial@12860000 { 432189251Ssam compatible = "samsung,exynos4210-uart"; 433189251Ssam reg = <0x12860000 0x100>; 434189251Ssam interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 435189251Ssam clocks = <&clock_aud AUD_CLK_AUD_UART>, <&clock_aud AUD_SCLK_AUD_UART>; 436189251Ssam clock-names = "uart", "clk_uart_baud0"; 437189251Ssam status = "disabled"; 438189251Ssam }; 439189251Ssam 440189251Ssam mmc_0: mmc@12140000 { 441189251Ssam compatible = "samsung,exynos5250-dw-mshc"; 442189251Ssam reg = <0x12140000 0x2000>; 443189251Ssam interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 444189251Ssam #address-cells = <1>; 445189251Ssam #size-cells = <0>; 446189251Ssam clocks = <&clock_fsys FSYS_CLK_MMC0>, <&clock_top TOP_SCLK_MMC0>; 447189251Ssam clock-names = "biu", "ciu"; 448189251Ssam assigned-clocks = 449189251Ssam <&clock_top TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_A>, 450189251Ssam <&clock_top TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_B>, 451189251Ssam <&clock_top TOP_SCLK_MMC0>; 452189251Ssam assigned-clock-parents = 453189251Ssam <&clock_top TOP_MOUT_BUSTOP_PLL_USER>, 454189251Ssam <&clock_top TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_A>; 455189251Ssam assigned-clock-rates = <0>, <0>, <800000000>; 456189251Ssam fifo-depth = <64>; 457189251Ssam status = "disabled"; 458189251Ssam }; 459189251Ssam 460189251Ssam mmc_1: mmc@12150000 { 461189251Ssam compatible = "samsung,exynos5250-dw-mshc"; 462189251Ssam reg = <0x12150000 0x2000>; 463189251Ssam interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 464189251Ssam #address-cells = <1>; 465189251Ssam #size-cells = <0>; 466189251Ssam clocks = <&clock_fsys FSYS_CLK_MMC1>, <&clock_top TOP_SCLK_MMC1>; 467189251Ssam clock-names = "biu", "ciu"; 468189251Ssam assigned-clocks = 469189251Ssam <&clock_top TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_A>, 470189251Ssam <&clock_top TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_B>, 471189251Ssam <&clock_top TOP_SCLK_MMC1>; 472189251Ssam assigned-clock-parents = 473189251Ssam <&clock_top TOP_MOUT_BUSTOP_PLL_USER>, 474189251Ssam <&clock_top TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_A>; 475189251Ssam assigned-clock-rates = <0>, <0>, <800000000>; 476189251Ssam fifo-depth = <64>; 477189251Ssam status = "disabled"; 478189251Ssam }; 479189251Ssam 480189251Ssam mmc_2: mmc@12160000 { 481189251Ssam compatible = "samsung,exynos5250-dw-mshc"; 482189251Ssam reg = <0x12160000 0x2000>; 483189251Ssam interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 484189251Ssam #address-cells = <1>; 485189251Ssam #size-cells = <0>; 486189251Ssam clocks = <&clock_fsys FSYS_CLK_MMC2>, <&clock_top TOP_SCLK_MMC2>; 487189251Ssam clock-names = "biu", "ciu"; 488189251Ssam assigned-clocks = 489189251Ssam <&clock_top TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_A>, 490189251Ssam <&clock_top TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_B>, 491189251Ssam <&clock_top TOP_SCLK_MMC2>; 492189251Ssam assigned-clock-parents = 493189251Ssam <&clock_top TOP_MOUT_BUSTOP_PLL_USER>, 494189251Ssam <&clock_top TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_A>; 495189251Ssam assigned-clock-rates = <0>, <0>, <800000000>; 496189251Ssam fifo-depth = <64>; 497189251Ssam status = "disabled"; 498189251Ssam }; 499189251Ssam 500189251Ssam hsi2c_0: i2c@12da0000 { 501189251Ssam compatible = "samsung,exynos5260-hsi2c"; 502189251Ssam reg = <0x12da0000 0x1000>; 503189251Ssam interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 504189251Ssam #address-cells = <1>; 505189251Ssam #size-cells = <0>; 506189251Ssam pinctrl-names = "default"; 507189251Ssam pinctrl-0 = <&i2c0_hs_bus>; 508189251Ssam clocks = <&clock_peri PERI_CLK_HSIC0>; 509 clock-names = "hsi2c"; 510 status = "disabled"; 511 }; 512 513 hsi2c_1: i2c@12db0000 { 514 compatible = "samsung,exynos5260-hsi2c"; 515 reg = <0x12db0000 0x1000>; 516 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 517 #address-cells = <1>; 518 #size-cells = <0>; 519 pinctrl-names = "default"; 520 pinctrl-0 = <&i2c1_hs_bus>; 521 clocks = <&clock_peri PERI_CLK_HSIC1>; 522 clock-names = "hsi2c"; 523 status = "disabled"; 524 }; 525 526 hsi2c_2: i2c@12dc0000 { 527 compatible = "samsung,exynos5260-hsi2c"; 528 reg = <0x12dc0000 0x1000>; 529 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 530 #address-cells = <1>; 531 #size-cells = <0>; 532 pinctrl-names = "default"; 533 pinctrl-0 = <&i2c2_hs_bus>; 534 clocks = <&clock_peri PERI_CLK_HSIC2>; 535 clock-names = "hsi2c"; 536 status = "disabled"; 537 }; 538 539 hsi2c_3: i2c@12dd0000 { 540 compatible = "samsung,exynos5260-hsi2c"; 541 reg = <0x12dd0000 0x1000>; 542 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 543 #address-cells = <1>; 544 #size-cells = <0>; 545 pinctrl-names = "default"; 546 pinctrl-0 = <&i2c3_hs_bus>; 547 clocks = <&clock_peri PERI_CLK_HSIC3>; 548 clock-names = "hsi2c"; 549 status = "disabled"; 550 }; 551 }; 552}; 553 554#include "exynos5260-pinctrl.dtsi" 555