1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
4 * device tree source
5 */
6
7#include <dt-bindings/sound/samsung-i2s.h>
8#include <dt-bindings/input/input.h>
9#include <dt-bindings/clock/maxim,max77686.h>
10#include "exynos4412.dtsi"
11#include "exynos4412-ppmu-common.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include "exynos-mfc-reserved-memory.dtsi"
14
15/ {
16	aliases {
17		mmc0 = &mshc_0;
18		mmc2 = &sdhci_2;
19	};
20
21	chosen {
22		stdout-path = &serial_1;
23	};
24
25	firmware@204f000 {
26		compatible = "samsung,secure-firmware";
27		reg = <0x0204f000 0x1000>;
28	};
29
30	gpio_keys: gpio-keys {
31		compatible = "gpio-keys";
32		pinctrl-names = "default";
33		pinctrl-0 = <&gpio_power_key>;
34
35		power-key {
36			gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
37			linux,code = <KEY_POWER>;
38			label = "power key";
39			debounce-interval = <10>;
40			wakeup-source;
41		};
42	};
43
44	sound: sound {
45		compatible = "hardkernel,odroid-xu4-audio";
46
47		cpu {
48			sound-dai = <&i2s0 0>;
49		};
50
51		codec {
52			sound-dai = <&hdmi>, <&max98090>;
53		};
54	};
55
56	emmc_pwrseq: pwrseq {
57		pinctrl-0 = <&emmc_rstn>;
58		pinctrl-names = "default";
59		compatible = "mmc-pwrseq-emmc";
60		reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
61	};
62
63	fixed-rate-clocks {
64		xxti {
65			compatible = "samsung,clock-xxti";
66			clock-frequency = <0>;
67		};
68
69		xusbxti {
70			compatible = "samsung,clock-xusbxti";
71			clock-frequency = <24000000>;
72		};
73	};
74};
75
76&bus_dmc {
77	devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
78	vdd-supply = <&buck1_reg>;
79	status = "okay";
80};
81
82&bus_acp {
83	devfreq = <&bus_dmc>;
84	status = "okay";
85};
86
87&bus_c2c {
88	devfreq = <&bus_dmc>;
89	status = "okay";
90};
91
92&bus_leftbus {
93	devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
94	vdd-supply = <&buck3_reg>;
95	status = "okay";
96};
97
98&bus_rightbus {
99	devfreq = <&bus_leftbus>;
100	status = "okay";
101};
102
103&bus_display {
104	devfreq = <&bus_leftbus>;
105	status = "okay";
106};
107
108&bus_fsys {
109	devfreq = <&bus_leftbus>;
110	status = "okay";
111};
112
113&bus_peri {
114	devfreq = <&bus_leftbus>;
115	status = "okay";
116};
117
118&bus_mfc {
119	devfreq = <&bus_leftbus>;
120	status = "okay";
121};
122
123&camera {
124	status = "okay";
125};
126
127&clock {
128	clocks = <&clock CLK_XUSBXTI>;
129	assigned-clocks = <&clock CLK_FOUT_EPLL>;
130	assigned-clock-rates = <45158401>;
131};
132
133&clock_audss {
134	assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
135			<&clock_audss EXYNOS_MOUT_I2S>,
136			<&clock_audss EXYNOS_DOUT_SRP>,
137			<&clock_audss EXYNOS_DOUT_AUD_BUS>,
138			<&clock_audss EXYNOS_DOUT_I2S>;
139
140	assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
141			  <&clock_audss EXYNOS_MOUT_AUDSS>;
142
143	assigned-clock-rates = <0>, <0>,
144			<196608001>,
145			<(196608001 / 2)>,
146			<(196608001 / 8)>;
147};
148
149&cpu0 {
150	cpu0-supply = <&buck2_reg>;
151};
152
153&cpu0_opp_table {
154	opp-1000000000 {
155		opp-suspend;
156	};
157	opp-800000000 {
158		/delete-property/opp-suspend;
159	};
160};
161
162&cpu_thermal {
163	cooling-maps {
164		cooling_map0: map0 {
165			/* Corresponds to 800MHz at freq_table */
166			cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
167					 <&cpu2 7 7>, <&cpu3 7 7>;
168		};
169		cooling_map1: map1 {
170			/* Corresponds to 200MHz at freq_table */
171			cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
172					 <&cpu2 13 13>, <&cpu3 13 13>;
173		};
174	};
175};
176
177&pinctrl_1 {
178	gpio_power_key: power-key-pins {
179		samsung,pins = "gpx1-3";
180		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
181	};
182
183	max77686_irq: max77686-irq-pins {
184		samsung,pins = "gpx3-2";
185		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
186		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
187		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
188	};
189
190	hdmi_hpd: hdmi-hpd-pins {
191		samsung,pins = "gpx3-7";
192		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
193	};
194
195	emmc_rstn: emmc-rstn-pins {
196		samsung,pins = "gpk1-2";
197		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
198	};
199};
200
201&ehci {
202	status = "okay";
203};
204
205&exynos_usbphy {
206	status = "okay";
207};
208
209&fimc_0 {
210	status = "okay";
211	assigned-clocks = <&clock CLK_MOUT_FIMC0>,
212			<&clock CLK_SCLK_FIMC0>;
213	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
214	assigned-clock-rates = <0>, <176000000>;
215};
216
217&fimc_1 {
218	status = "okay";
219	assigned-clocks = <&clock CLK_MOUT_FIMC1>,
220			<&clock CLK_SCLK_FIMC1>;
221	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
222	assigned-clock-rates = <0>, <176000000>;
223};
224
225&fimc_2 {
226	status = "okay";
227	assigned-clocks = <&clock CLK_MOUT_FIMC2>,
228			<&clock CLK_SCLK_FIMC2>;
229	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
230	assigned-clock-rates = <0>, <176000000>;
231};
232
233&fimc_3 {
234	status = "okay";
235	assigned-clocks = <&clock CLK_MOUT_FIMC3>,
236			<&clock CLK_SCLK_FIMC3>;
237	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
238	assigned-clock-rates = <0>, <176000000>;
239};
240
241&gpu {
242	mali-supply = <&buck4_reg>;
243	status = "okay";
244};
245
246&hdmi {
247	hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
248	pinctrl-names = "default";
249	pinctrl-0 = <&hdmi_hpd>;
250	vdd-supply = <&ldo8_reg>;
251	vdd_osc-supply = <&ldo10_reg>;
252	vdd_pll-supply = <&ldo8_reg>;
253	ddc = <&i2c_2>;
254	status = "okay";
255};
256
257&hdmicec {
258	status = "okay";
259};
260
261&hsotg {
262	status = "okay";
263	vusb_d-supply = <&ldo15_reg>;
264	vusb_a-supply = <&ldo12_reg>;
265};
266
267&i2c_0 {
268	samsung,i2c-sda-delay = <100>;
269	samsung,i2c-max-bus-freq = <400000>;
270	status = "okay";
271
272	usb3503: usb-hub@8 {
273		compatible = "smsc,usb3503";
274		reg = <0x08>;
275
276		intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
277		connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
278		reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
279		initial-mode = <1>;
280	};
281
282	max77686: pmic@9 {
283		compatible = "maxim,max77686";
284		interrupt-parent = <&gpx3>;
285		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
286		pinctrl-names = "default";
287		pinctrl-0 = <&max77686_irq>;
288		wakeup-source;
289		reg = <0x09>;
290		#clock-cells = <1>;
291
292		voltage-regulators {
293			ldo1_reg: LDO1 {
294				regulator-name = "VDD_ALIVE_1.0V";
295				regulator-min-microvolt = <1000000>;
296				regulator-max-microvolt = <1000000>;
297				regulator-always-on;
298			};
299
300			ldo2_reg: LDO2 {
301				regulator-name = "VDDQ_M1_2_1.8V";
302				regulator-min-microvolt = <1800000>;
303				regulator-max-microvolt = <1800000>;
304				regulator-always-on;
305			};
306
307			ldo3_reg: LDO3 {
308				regulator-name = "VDDQ_EXT_1.8V";
309				regulator-min-microvolt = <1800000>;
310				regulator-max-microvolt = <1800000>;
311				regulator-always-on;
312			};
313
314			ldo4_reg: LDO4 {
315				regulator-name = "VDDQ_MMC2_2.8V";
316				regulator-min-microvolt = <2800000>;
317				regulator-max-microvolt = <2800000>;
318				regulator-boot-on;
319			};
320
321			ldo5_reg: LDO5 {
322				regulator-name = "VDDQ_MMC1_3_1.8V";
323				regulator-min-microvolt = <1800000>;
324				regulator-max-microvolt = <1800000>;
325				regulator-always-on;
326				regulator-boot-on;
327			};
328
329			ldo6_reg: LDO6 {
330				regulator-name = "VDD10_MPLL_1.0V";
331				regulator-min-microvolt = <1000000>;
332				regulator-max-microvolt = <1000000>;
333				regulator-always-on;
334			};
335
336			ldo7_reg: LDO7 {
337				regulator-name = "VDD10_XPLL_1.0V";
338				regulator-min-microvolt = <1000000>;
339				regulator-max-microvolt = <1000000>;
340				regulator-always-on;
341			};
342
343			ldo8_reg: LDO8 {
344				regulator-name = "VDD10_HDMI_1.0V";
345				regulator-min-microvolt = <1000000>;
346				regulator-max-microvolt = <1000000>;
347			};
348
349			ldo10_reg: LDO10 {
350				regulator-name = "VDDQ_MIPIHSI_1.8V";
351				regulator-min-microvolt = <1800000>;
352				regulator-max-microvolt = <1800000>;
353			};
354
355			ldo11_reg: LDO11 {
356				regulator-name = "VDD18_ABB1_1.8V";
357				regulator-min-microvolt = <1800000>;
358				regulator-max-microvolt = <1800000>;
359				regulator-always-on;
360			};
361
362			ldo12_reg: LDO12 {
363				regulator-name = "VDD33_USB_3.3V";
364				regulator-min-microvolt = <3300000>;
365				regulator-max-microvolt = <3300000>;
366				regulator-always-on;
367				regulator-boot-on;
368			};
369
370			ldo13_reg: LDO13 {
371				regulator-name = "VDDQ_C2C_W_1.8V";
372				regulator-min-microvolt = <1800000>;
373				regulator-max-microvolt = <1800000>;
374				regulator-always-on;
375				regulator-boot-on;
376			};
377
378			ldo14_reg: LDO14 {
379				regulator-name = "VDD18_ABB0_2_1.8V";
380				regulator-min-microvolt = <1800000>;
381				regulator-max-microvolt = <1800000>;
382				regulator-always-on;
383				regulator-boot-on;
384			};
385
386			ldo15_reg: LDO15 {
387				regulator-name = "VDD10_HSIC_1.0V";
388				regulator-min-microvolt = <1000000>;
389				regulator-max-microvolt = <1000000>;
390				regulator-always-on;
391				regulator-boot-on;
392			};
393
394			ldo16_reg: LDO16 {
395				regulator-name = "VDD18_HSIC_1.8V";
396				regulator-min-microvolt = <1800000>;
397				regulator-max-microvolt = <1800000>;
398				regulator-always-on;
399				regulator-boot-on;
400			};
401
402			ldo20_reg: LDO20 {
403				regulator-name = "LDO20_1.8V";
404				regulator-min-microvolt = <1800000>;
405				regulator-max-microvolt = <1800000>;
406			};
407
408			ldo21_reg: LDO21 {
409				regulator-name = "TFLASH_2.8V";
410				regulator-min-microvolt = <2800000>;
411				regulator-max-microvolt = <2800000>;
412				regulator-boot-on;
413			};
414
415			ldo22_reg: LDO22 {
416				/*
417				 * Only U3 uses it, so let it define the
418				 * constraints
419				 */
420				regulator-name = "LDO22";
421				regulator-boot-on;
422			};
423
424			ldo25_reg: LDO25 {
425				regulator-name = "VDDQ_LCD_1.8V";
426				regulator-min-microvolt = <1800000>;
427				regulator-max-microvolt = <1800000>;
428				regulator-always-on;
429				regulator-boot-on;
430			};
431
432			buck1_reg: BUCK1 {
433				regulator-name = "VDD_MIF";
434				regulator-min-microvolt = <900000>;
435				regulator-max-microvolt = <1100000>;
436				regulator-always-on;
437				regulator-boot-on;
438			};
439
440			buck2_reg: BUCK2 {
441				regulator-name = "VDD_ARM";
442				regulator-min-microvolt = <900000>;
443				regulator-max-microvolt = <1350000>;
444				regulator-always-on;
445				regulator-boot-on;
446			};
447
448			buck3_reg: BUCK3 {
449				regulator-name = "VDD_INT";
450				regulator-min-microvolt = <900000>;
451				regulator-max-microvolt = <1050000>;
452				regulator-always-on;
453				regulator-boot-on;
454			};
455
456			buck4_reg: BUCK4 {
457				regulator-name = "VDD_G3D";
458				regulator-min-microvolt = <900000>;
459				regulator-max-microvolt = <1100000>;
460				regulator-microvolt-offset = <50000>;
461			};
462
463			buck5_reg: BUCK5 {
464				regulator-name = "VDDQ_CKEM1_2_1.2V";
465				regulator-min-microvolt = <1200000>;
466				regulator-max-microvolt = <1200000>;
467				regulator-always-on;
468				regulator-boot-on;
469			};
470
471			buck6_reg: BUCK6 {
472				regulator-name = "BUCK6_1.35V";
473				regulator-min-microvolt = <1350000>;
474				regulator-max-microvolt = <1350000>;
475				regulator-always-on;
476				regulator-boot-on;
477			};
478
479			buck7_reg: BUCK7 {
480				regulator-name = "BUCK7_2.0V";
481				regulator-min-microvolt = <2000000>;
482				regulator-max-microvolt = <2000000>;
483				regulator-always-on;
484			};
485
486			buck8_reg: BUCK8 {
487				/*
488				 * Constraints set by specific board: X,
489				 * X2 and U3.
490				 */
491				regulator-name = "BUCK8_2.8V";
492			};
493		};
494	};
495};
496
497&i2c_1 {
498	status = "okay";
499	max98090: audio-codec@10 {
500		compatible = "maxim,max98090";
501		reg = <0x10>;
502		interrupt-parent = <&gpx0>;
503		interrupts = <0 IRQ_TYPE_NONE>;
504		clocks = <&i2s0 CLK_I2S_CDCLK>;
505		clock-names = "mclk";
506		#sound-dai-cells = <0>;
507	};
508};
509
510&i2c_2 {
511	status = "okay";
512};
513
514&i2c_8 {
515	status = "okay";
516};
517
518&i2s0 {
519	pinctrl-0 = <&i2s0_bus>;
520	pinctrl-names = "default";
521	status = "okay";
522	assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
523	assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
524};
525
526&mixer {
527	status = "okay";
528};
529
530&mshc_0 {
531	pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
532	pinctrl-names = "default";
533	vmmc-supply = <&ldo20_reg>;
534	mmc-pwrseq = <&emmc_pwrseq>;
535	status = "okay";
536
537	broken-cd;
538	card-detect-delay = <200>;
539	mmc-ddr-1_8v;
540	samsung,dw-mshc-ciu-div = <3>;
541	samsung,dw-mshc-sdr-timing = <2 3>;
542	samsung,dw-mshc-ddr-timing = <1 2>;
543	bus-width = <8>;
544	cap-mmc-highspeed;
545};
546
547&rtc {
548	status = "okay";
549	clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
550	clock-names = "rtc", "rtc_src";
551};
552
553&sdhci_2 {
554	bus-width = <4>;
555	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
556	pinctrl-names = "default";
557	vmmc-supply = <&ldo21_reg>;
558	vqmmc-supply = <&ldo4_reg>;
559	cd-gpios = <&gpk2 2 GPIO_ACTIVE_LOW>;
560	status = "okay";
561};
562
563&serial_0 {
564	status = "okay";
565};
566
567&serial_1 {
568	status = "okay";
569};
570
571&tmu {
572	vtmu-supply = <&ldo10_reg>;
573	status = "okay";
574};
575