1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
4 *
5 *  Copyright (c) 2017, Microchip Technology Inc.
6 *                2017 Cristian Birsan <cristian.birsan@microchip.com>
7 *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
8 */
9#include "sama5d2.dtsi"
10#include "sama5d2-pinfunc.h"
11#include <dt-bindings/gpio/gpio.h>
12
13/ {
14	model = "Atmel SAMA5D27 SoM1";
15	compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
16
17	aliases {
18		i2c0 = &i2c0;
19	};
20
21	clocks {
22		slow_xtal {
23			clock-frequency = <32768>;
24		};
25
26		main_xtal {
27			clock-frequency = <24000000>;
28		};
29	};
30
31	ahb {
32		sdmmc0: sdio-host@a0000000 {
33			microchip,sdcal-inverted;
34		};
35
36		apb {
37			qspi1: spi@f0024000 {
38				pinctrl-names = "default";
39				pinctrl-0 = <&pinctrl_qspi1_default>;
40
41				flash@0 {
42					#address-cells = <1>;
43					#size-cells = <1>;
44					compatible = "jedec,spi-nor";
45					reg = <0>;
46					spi-max-frequency = <104000000>;
47					spi-cs-setup-ns = <7>;
48					spi-tx-bus-width = <4>;
49					spi-rx-bus-width = <4>;
50					m25p,fast-read;
51
52					at91bootstrap@0 {
53						label = "at91bootstrap";
54						reg = <0x00000000 0x00040000>;
55					};
56
57					bootloader@40000 {
58						label = "bootloader";
59						reg = <0x00040000 0x000c0000>;
60					};
61
62					bootloaderenvred@100000 {
63						label = "bootloader env redundant";
64						reg = <0x00100000 0x00040000>;
65					};
66
67					bootloaderenv@140000 {
68						label = "bootloader env";
69						reg = <0x00140000 0x00040000>;
70					};
71
72					dtb@180000 {
73						label = "device tree";
74						reg = <0x00180000 0x00080000>;
75					};
76
77					kernel@200000 {
78						label = "kernel";
79						reg = <0x00200000 0x00600000>;
80					};
81				};
82			};
83
84			macb0: ethernet@f8008000 {
85				pinctrl-names = "default";
86				pinctrl-0 = <&pinctrl_macb0_default>;
87				#address-cells = <1>;
88				#size-cells = <0>;
89				phy-mode = "rmii";
90
91				ethernet-phy@7 {
92					reg = <0x7>;
93					interrupt-parent = <&pioA>;
94					interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
95					pinctrl-names = "default";
96					pinctrl-0 = <&pinctrl_macb0_phy_irq>;
97				};
98			};
99
100			i2c0: i2c@f8028000 {
101				dmas = <0>, <0>;
102				pinctrl-names = "default", "gpio";
103				pinctrl-0 = <&pinctrl_i2c0_default>;
104				pinctrl-1 = <&pinctrl_i2c0_gpio>;
105				sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
106				scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
107				status = "okay";
108
109				at24@50 {
110					compatible = "atmel,24c02";
111					reg = <0x50>;
112					pagesize = <8>;
113				};
114			};
115
116			pinctrl@fc038000 {
117				pinctrl_i2c0_default: i2c0_default {
118					pinmux = <PIN_PD21__TWD0>,
119						 <PIN_PD22__TWCK0>;
120					bias-disable;
121				};
122
123				pinctrl_i2c0_gpio: i2c0_gpio {
124					pinmux = <PIN_PD21__GPIO>,
125						 <PIN_PD22__GPIO>;
126					bias-disable;
127				};
128
129				pinctrl_qspi1_default: qspi1_default {
130					sck_cs {
131						pinmux = <PIN_PB5__QSPI1_SCK>,
132							 <PIN_PB6__QSPI1_CS>;
133						bias-disable;
134					};
135
136					data {
137						pinmux = <PIN_PB7__QSPI1_IO0>,
138							 <PIN_PB8__QSPI1_IO1>,
139							 <PIN_PB9__QSPI1_IO2>,
140							 <PIN_PB10__QSPI1_IO3>;
141						bias-pull-up;
142					};
143				};
144
145				pinctrl_macb0_default: macb0_default {
146					pinmux = <PIN_PD9__GTXCK>,
147						 <PIN_PD10__GTXEN>,
148						 <PIN_PD11__GRXDV>,
149						 <PIN_PD12__GRXER>,
150						 <PIN_PD13__GRX0>,
151						 <PIN_PD14__GRX1>,
152						 <PIN_PD15__GTX0>,
153						 <PIN_PD16__GTX1>,
154						 <PIN_PD17__GMDC>,
155						 <PIN_PD18__GMDIO>;
156					bias-disable;
157				};
158
159				pinctrl_macb0_phy_irq: macb0_phy_irq {
160					pinmux = <PIN_PD31__GPIO>;
161					bias-disable;
162				};
163			};
164		};
165	};
166};
167