1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QMP PHY controller (USB, SC8280XP)
8
9maintainers:
10  - Vinod Koul <vkoul@kernel.org>
11
12description:
13  The QMP PHY controller supports physical layer functionality for a number of
14  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
15
16properties:
17  compatible:
18    enum:
19      - qcom,ipq6018-qmp-usb3-phy
20      - qcom,ipq8074-qmp-usb3-phy
21      - qcom,ipq9574-qmp-usb3-phy
22      - qcom,msm8996-qmp-usb3-phy
23      - qcom,sa8775p-qmp-usb3-uni-phy
24      - qcom,sc8280xp-qmp-usb3-uni-phy
25      - qcom,sdm845-qmp-usb3-uni-phy
26      - qcom,sdx55-qmp-usb3-uni-phy
27      - qcom,sdx65-qmp-usb3-uni-phy
28      - qcom,sdx75-qmp-usb3-uni-phy
29      - qcom,sm8150-qmp-usb3-uni-phy
30      - qcom,sm8250-qmp-usb3-uni-phy
31      - qcom,sm8350-qmp-usb3-uni-phy
32      - qcom,x1e80100-qmp-usb3-uni-phy
33
34
35  reg:
36    maxItems: 1
37
38  clocks:
39    minItems: 4
40    maxItems: 5
41
42  clock-names:
43    minItems: 4
44    maxItems: 5
45
46  power-domains:
47    maxItems: 1
48
49  resets:
50    maxItems: 2
51
52  reset-names:
53    items:
54      - const: phy
55      - const: phy_phy
56
57  vdda-phy-supply: true
58
59  vdda-pll-supply: true
60
61  "#clock-cells":
62    const: 0
63
64  clock-output-names:
65    maxItems: 1
66
67  "#phy-cells":
68    const: 0
69
70required:
71  - compatible
72  - reg
73  - clocks
74  - clock-names
75  - resets
76  - reset-names
77  - vdda-phy-supply
78  - vdda-pll-supply
79  - "#clock-cells"
80  - clock-output-names
81  - "#phy-cells"
82
83allOf:
84  - if:
85      properties:
86        compatible:
87          contains:
88            enum:
89              - qcom,ipq6018-qmp-usb3-phy
90              - qcom,ipq8074-qmp-usb3-phy
91              - qcom,ipq9574-qmp-usb3-phy
92              - qcom,msm8996-qmp-usb3-phy
93              - qcom,sdx55-qmp-usb3-uni-phy
94              - qcom,sdx65-qmp-usb3-uni-phy
95              - qcom,sdx75-qmp-usb3-uni-phy
96    then:
97      properties:
98        clocks:
99          maxItems: 4
100        clock-names:
101          items:
102            - const: aux
103            - const: ref
104            - const: cfg_ahb
105            - const: pipe
106
107  - if:
108      properties:
109        compatible:
110          contains:
111            enum:
112              - qcom,sa8775p-qmp-usb3-uni-phy
113              - qcom,sc8280xp-qmp-usb3-uni-phy
114              - qcom,sm8150-qmp-usb3-uni-phy
115              - qcom,sm8250-qmp-usb3-uni-phy
116              - qcom,sm8350-qmp-usb3-uni-phy
117              - qcom,x1e80100-qmp-usb3-uni-phy
118    then:
119      properties:
120        clocks:
121          maxItems: 4
122        clock-names:
123          items:
124            - const: aux
125            - const: ref
126            - const: com_aux
127            - const: pipe
128
129  - if:
130      properties:
131        compatible:
132          contains:
133            enum:
134              - qcom,sdm845-qmp-usb3-uni-phy
135    then:
136      properties:
137        clocks:
138          maxItems: 5
139        clock-names:
140          items:
141            - const: aux
142            - const: cfg_ahb
143            - const: ref
144            - const: com_aux
145            - const: pipe
146
147  - if:
148      properties:
149        compatible:
150          contains:
151            enum:
152              - qcom,sa8775p-qmp-usb3-uni-phy
153              - qcom,sc8280xp-qmp-usb3-uni-phy
154              - qcom,x1e80100-qmp-usb3-uni-phy
155    then:
156      required:
157        - power-domains
158
159additionalProperties: false
160
161examples:
162  - |
163    #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
164    #include <dt-bindings/clock/qcom,rpmh.h>
165
166    phy@88ef000 {
167      compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";
168      reg = <0x088ef000 0x2000>;
169
170      clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
171               <&gcc GCC_USB3_MP0_CLKREF_CLK>,
172               <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
173               <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>;
174      clock-names = "aux", "ref", "com_aux", "pipe";
175
176      power-domains = <&gcc USB30_MP_GDSC>;
177
178      resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>,
179               <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>;
180      reset-names = "phy", "phy_phy";
181
182      vdda-phy-supply = <&vreg_l3a>;
183      vdda-pll-supply = <&vreg_l5a>;
184
185      #clock-cells = <0>;
186      clock-output-names = "usb2_phy0_pipe_clk";
187
188      #phy-cells = <0>;
189    };
190