1# SPDX-License-Identifier: GPL-2.0-only
2# Copyright (C) 2020 Renesas Electronics Corp.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/media/renesas,vin.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Renesas R-Car Video Input (VIN)
9
10maintainers:
11  - Niklas S��derlund <niklas.soderlund@ragnatech.se>
12
13description:
14  The R-Car Video Input (VIN) device provides video input capabilities for the
15  Renesas R-Car family of devices.
16
17  Each VIN instance has a single parallel input that supports RGB and YUV video,
18  with both external synchronization and BT.656 synchronization for the latter.
19  Depending on the instance the VIN input is connected to external SoC pins, or
20  on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
21
22properties:
23  compatible:
24    oneOf:
25      - items:
26          - enum:
27              - renesas,vin-r8a7742  # RZ/G1H
28              - renesas,vin-r8a7743  # RZ/G1M
29              - renesas,vin-r8a7744  # RZ/G1N
30              - renesas,vin-r8a7745  # RZ/G1E
31              - renesas,vin-r8a77470 # RZ/G1C
32              - renesas,vin-r8a7790  # R-Car H2
33              - renesas,vin-r8a7791  # R-Car M2-W
34              - renesas,vin-r8a7792  # R-Car V2H
35              - renesas,vin-r8a7793  # R-Car M2-N
36              - renesas,vin-r8a7794  # R-Car E2
37          - const: renesas,rcar-gen2-vin # Generic R-Car Gen2 or RZ/G1
38
39      - items:
40          - enum:
41              - renesas,vin-r8a774a1 # RZ/G2M
42              - renesas,vin-r8a774b1 # RZ/G2N
43              - renesas,vin-r8a774c0 # RZ/G2E
44              - renesas,vin-r8a774e1 # RZ/G2H
45              - renesas,vin-r8a7778  # R-Car M1
46              - renesas,vin-r8a7779  # R-Car H1
47              - renesas,vin-r8a7795  # R-Car H3
48              - renesas,vin-r8a7796  # R-Car M3-W
49              - renesas,vin-r8a77961 # R-Car M3-W+
50              - renesas,vin-r8a77965 # R-Car M3-N
51              - renesas,vin-r8a77970 # R-Car V3M
52              - renesas,vin-r8a77980 # R-Car V3H
53              - renesas,vin-r8a77990 # R-Car E3
54              - renesas,vin-r8a77995 # R-Car D3
55              - renesas,vin-r8a779a0 # R-Car V3U
56              - renesas,vin-r8a779g0 # R-Car V4H
57
58  reg:
59    maxItems: 1
60
61  interrupts:
62    maxItems: 1
63
64  clocks:
65    maxItems: 1
66
67  power-domains:
68    maxItems: 1
69
70  resets:
71    maxItems: 1
72
73  # The per-board settings for Gen2 and RZ/G1 platforms:
74  port:
75    $ref: /schemas/graph.yaml#/$defs/port-base
76    unevaluatedProperties: false
77    description:
78      A node containing a parallel input
79
80    properties:
81      endpoint:
82        $ref: video-interfaces.yaml#
83        unevaluatedProperties: false
84
85        properties:
86          hsync-active:
87            description:
88              If both HSYNC and VSYNC polarities are not specified, embedded
89              synchronization is selected.
90            default: 1
91
92          vsync-active:
93            description:
94              If both HSYNC and VSYNC polarities are not specified, embedded
95              synchronization is selected.
96            default: 1
97
98          field-even-active: true
99
100          bus-width: true
101
102          data-shift: true
103
104          data-enable-active:
105            description: Polarity of CLKENB signal
106            default: 1
107
108          pclk-sample: true
109
110          data-active: true
111
112  # The per-board settings for Gen3 and RZ/G2 platforms:
113  renesas,id:
114    description: VIN channel number
115    $ref: /schemas/types.yaml#/definitions/uint32
116    minimum: 0
117    maximum: 31
118
119  ports:
120    $ref: /schemas/graph.yaml#/properties/ports
121
122    properties:
123      port@0:
124        $ref: /schemas/graph.yaml#/$defs/port-base
125        unevaluatedProperties: false
126        description:
127          Input port node, single endpoint describing a parallel input source.
128
129        properties:
130          endpoint:
131            $ref: video-interfaces.yaml#
132            unevaluatedProperties: false
133
134            properties:
135              hsync-active:
136                description:
137                  If both HSYNC and VSYNC polarities are not specified, embedded
138                  synchronization is selected.
139                default: 1
140
141              vsync-active:
142                description:
143                  If both HSYNC and VSYNC polarities are not specified, embedded
144                  synchronization is selected.
145                default: 1
146
147              field-even-active: true
148
149              bus-width: true
150
151              data-shift: true
152
153              data-enable-active:
154                description: Polarity of CLKENB signal
155                default: 1
156
157              pclk-sample: true
158
159              data-active: true
160
161      port@1:
162        $ref: /schemas/graph.yaml#/properties/port
163        description:
164          Input port node, multiple endpoints describing all the R-Car CSI-2
165          modules connected the VIN.
166
167        properties:
168          endpoint@0:
169            $ref: /schemas/graph.yaml#/properties/endpoint
170            description: Endpoint connected to CSI20.
171
172          endpoint@1:
173            $ref: /schemas/graph.yaml#/properties/endpoint
174            description: Endpoint connected to CSI21.
175
176          endpoint@2:
177            $ref: /schemas/graph.yaml#/properties/endpoint
178            description: Endpoint connected to CSI40.
179
180          endpoint@3:
181            $ref: /schemas/graph.yaml#/properties/endpoint
182            description: Endpoint connected to CSI41.
183
184        anyOf:
185          - required:
186              - endpoint@0
187          - required:
188              - endpoint@1
189          - required:
190              - endpoint@2
191          - required:
192              - endpoint@3
193
194      port@2:
195        $ref: /schemas/graph.yaml#/properties/port
196        description:
197          Input port node, multiple endpoints describing all the R-Car ISP
198          modules connected the VIN.
199
200        properties:
201          endpoint@0:
202            $ref: /schemas/graph.yaml#/properties/endpoint
203            description: Endpoint connected to ISP0.
204
205          endpoint@1:
206            $ref: /schemas/graph.yaml#/properties/endpoint
207            description: Endpoint connected to ISP1.
208
209          endpoint@2:
210            $ref: /schemas/graph.yaml#/properties/endpoint
211            description: Endpoint connected to ISP2.
212
213          endpoint@3:
214            $ref: /schemas/graph.yaml#/properties/endpoint
215            description: Endpoint connected to ISP3.
216
217required:
218  - compatible
219  - reg
220  - interrupts
221  - clocks
222  - power-domains
223
224allOf:
225  - if:
226      not:
227        properties:
228          compatible:
229            contains:
230              enum:
231                - renesas,vin-r8a7778
232                - renesas,vin-r8a7779
233    then:
234      required:
235        - resets
236
237  - if:
238      properties:
239        compatible:
240          contains:
241            enum:
242              - renesas,vin-r8a7778
243              - renesas,vin-r8a7779
244              - renesas,rcar-gen2-vin
245    then:
246      required:
247        - port
248    else:
249      required:
250        - renesas,id
251        - ports
252
253additionalProperties: false
254
255examples:
256  # Device node example for Gen2 platform
257  - |
258    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
259    #include <dt-bindings/interrupt-controller/arm-gic.h>
260    #include <dt-bindings/power/r8a7790-sysc.h>
261
262    vin1: vin@e6ef1000 {
263            compatible = "renesas,vin-r8a7790",
264                         "renesas,rcar-gen2-vin";
265            reg = <0xe6ef1000 0x1000>;
266            interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
267            clocks = <&cpg CPG_MOD 810>;
268            power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
269            resets = <&cpg 810>;
270
271            port {
272                    vin1ep0: endpoint {
273                            remote-endpoint = <&adv7180>;
274                            bus-width = <8>;
275                    };
276            };
277    };
278
279  # Device node example for Gen3 platform with only CSI-2
280  - |
281    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
282    #include <dt-bindings/interrupt-controller/arm-gic.h>
283    #include <dt-bindings/power/r8a7795-sysc.h>
284
285    vin0: video@e6ef0000 {
286            compatible = "renesas,vin-r8a7795";
287            reg = <0xe6ef0000 0x1000>;
288            interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
289            clocks = <&cpg CPG_MOD 811>;
290            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
291            resets = <&cpg 811>;
292            renesas,id = <0>;
293
294            ports {
295                    #address-cells = <1>;
296                    #size-cells = <0>;
297
298                    port@1 {
299                            #address-cells = <1>;
300                            #size-cells = <0>;
301
302                            reg = <1>;
303
304                            vin0csi20: endpoint@0 {
305                                    reg = <0>;
306                                    remote-endpoint = <&csi20vin0>;
307                            };
308                            vin0csi40: endpoint@2 {
309                                    reg = <2>;
310                                    remote-endpoint = <&csi40vin0>;
311                            };
312                    };
313            };
314    };
315
316  # Device node example for Gen3 platform with CSI-2 and parallel
317  - |
318    #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
319    #include <dt-bindings/interrupt-controller/arm-gic.h>
320    #include <dt-bindings/power/r8a77970-sysc.h>
321
322    vin2: video@e6ef2000 {
323            compatible = "renesas,vin-r8a77970";
324            reg = <0xe6ef2000 0x1000>;
325            interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
326            clocks = <&cpg CPG_MOD 809>;
327            power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
328            resets = <&cpg 809>;
329            renesas,id = <2>;
330
331            ports {
332                    #address-cells = <1>;
333                    #size-cells = <0>;
334
335                    port@0 {
336                            reg = <0>;
337
338                            vin2_in: endpoint {
339                                    remote-endpoint = <&adv7612_out>;
340                                    hsync-active = <0>;
341                                    vsync-active = <0>;
342                            };
343                    };
344
345                    port@1 {
346                            #address-cells = <1>;
347                            #size-cells = <0>;
348
349                            reg = <1>;
350
351                            vin2csi40: endpoint@2 {
352                                    reg = <2>;
353                                    remote-endpoint = <&csi40vin2>;
354                            };
355                    };
356            };
357    };
358