1104834SobrienAPM X-Gene Standby GPIO controller bindings 2218822Sdim 378828SobrienThis is a gpio controller in the standby domain. It also supports interrupt in 478828Sobriensome particular pins which are sourced to its parent interrupt controller 578828Sobrienas diagram below: 678828Sobrien +-----------------+ 778828Sobrien | X-Gene standby | 878828Sobrien | GPIO controller +------ GPIO_0 978828Sobrien+------------+ | | ... 1078828Sobrien| Parent IRQ | EXT_INT_0 | +------ GPIO_8/EXT_INT_0 1178828Sobrien| controller | (SPI40) | | ... 1278828Sobrien| (GICv2) +--------------+ +------ GPIO_[N+8]/EXT_INT_N 1378828Sobrien| | ... | | 1478828Sobrien| | EXT_INT_N | +------ GPIO_[N+9] 1578828Sobrien| | (SPI[40 + N])| | ... 1678828Sobrien| +--------------+ +------ GPIO_MAX 1778828Sobrien+------------+ +-----------------+ 18218822Sdim 1978828SobrienRequired properties: 2033965Sjdp- compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller 2133965Sjdp- reg: Physical base address and size of the controller's registers 2233965Sjdp- #gpio-cells: Should be two. 2333965Sjdp - first cell is the pin number 2433965Sjdp - second cell is used to specify the gpio polarity: 2533965Sjdp 0 = active high 2633965Sjdp 1 = active low 2733965Sjdp- gpio-controller: Marks the device node as a GPIO controller. 2833965Sjdp- interrupts: The EXT_INT_0 parent interrupt resource must be listed first. 2933965Sjdp- interrupt-cells: Should be two. 3033965Sjdp - first cell is 0-N corresponding for EXT_INT_0 to EXT_INT_N. 3133965Sjdp - second cell is used to specify flags. 3233965Sjdp- interrupt-controller: Marks the device node as an interrupt controller. 3333965Sjdp- apm,nr-gpios: Optional, specify number of gpios pin. 3433965Sjdp- apm,nr-irqs: Optional, specify number of interrupt pins. 3533965Sjdp- apm,irq-start: Optional, specify lowest gpio pin support interrupt. 3633965Sjdp 3733965SjdpExample: 3833965Sjdp sbgpio: gpio@17001000{ 3933965Sjdp compatible = "apm,xgene-gpio-sb"; 4033965Sjdp reg = <0x0 0x17001000 0x0 0x400>; 4133965Sjdp #gpio-cells = <2>; 4233965Sjdp gpio-controller; 4333965Sjdp interrupts = <0x0 0x28 0x1>, 4433965Sjdp <0x0 0x29 0x1>, 4533965Sjdp <0x0 0x2a 0x1>, 46104834Sobrien <0x0 0x2b 0x1>, 4733965Sjdp <0x0 0x2c 0x1>, 4833965Sjdp <0x0 0x2d 0x1>; 4933965Sjdp interrupt-parent = <&gic>; 5033965Sjdp #interrupt-cells = <2>; 5133965Sjdp interrupt-controller; 5233965Sjdp apm,nr-gpios = <22>; 5333965Sjdp apm,nr-irqs = <6>; 5433965Sjdp apm,irq-start = <8>; 5533965Sjdp }; 56130561Sobrien 5733965Sjdp testuser { 5833965Sjdp compatible = "example,testuser"; 5933965Sjdp /* Use the GPIO_13/EXT_INT_5 line as an active high triggered 6033965Sjdp * level interrupt 6133965Sjdp */ 6233965Sjdp interrupts = <5 4>; 6333965Sjdp interrupt-parent = <&sbgpio>; 6433965Sjdp }; 6533965Sjdp