110015Speter# SPDX-License-Identifier: GPL-2.0
210015Speter%YAML 1.2
310015Speter---
410015Speter$id: http://devicetree.org/schemas/dma/arm,pl330.yaml#
510015Speter$schema: http://devicetree.org/meta-schemas/core.yaml#
610015Speter
710015Spetertitle: ARM PrimeCell PL330 DMA Controller
810015Speter
910015Spetermaintainers:
1010015Speter  - Vinod Koul <vkoul@kernel.org>
1110015Speter
1210015Speterdescription:
1310015Speter  The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
1410015Speter  between memory and peripherals or memory to memory.
1510015Speter
1610015Speter# We need a select here so we don't match all nodes with 'arm,primecell'
1710015Speterselect:
1810015Speter  properties:
1910015Speter    compatible:
2010015Speter      contains:
2110015Speter        const: arm,pl330
2210015Speter  required:
2310015Speter    - compatible
2410015Speter
2510015SpeterallOf:
2610015Speter  - $ref: dma-controller.yaml#
2710015Speter  - $ref: /schemas/arm/primecell.yaml#
2810015Speter
2910015Speterproperties:
3010015Speter  compatible:
3110015Speter    items:
3210015Speter      - enum:
3310161Speter          - arm,pl330
3410015Speter      - const: arm,primecell
3510015Speter
3610015Speter  reg:
3710015Speter    maxItems: 1
3810015Speter
3910015Speter  interrupts:
4010015Speter    minItems: 1
4110015Speter    maxItems: 32
4210015Speter    description: A single combined interrupt or an interrupt per event
4310015Speter
4410015Speter  '#dma-cells':
4510015Speter    const: 1
4610015Speter    description: Contains the DMA request number for the consumer
4710015Speter
4810015Speter  arm,pl330-broken-no-flushp:
4910015Speter    type: boolean
5010015Speter    description: quirk for avoiding to execute DMAFLUSHP
5110015Speter
5210015Speter  arm,pl330-periph-burst:
5310015Speter    type: boolean
5410015Speter    description: quirk for performing burst transfer only
5510015Speter
5610015Speter  dma-coherent: true
5710015Speter
5810015Speter  iommus:
5910015Speter    minItems: 1
6010015Speter    maxItems: 9
6110015Speter    description: Up to 1 IOMMU entry per DMA channel for writes and 1
6210015Speter      IOMMU entry for reads.
6310015Speter
6410015Speter  power-domains:
6510015Speter    maxItems: 1
6610015Speter
6710015Speter  resets:
6810015Speter    minItems: 1
6910015Speter    maxItems: 2
7010015Speter
7110015Speter  reset-names:
7210015Speter    minItems: 1
7310015Speter    items:
7410015Speter      - const: dma
7510015Speter      - const: dma-ocp
7610015Speter
7710015Speterrequired:
7810015Speter  - compatible
7910015Speter  - reg
8010015Speter  - interrupts
8110047Speter
8210015SpeterunevaluatedProperties: false
8310015Speter
8410015Speterexamples:
8510015Speter  - |
8610015Speter    dma-controller@12680000 {
8710015Speter        compatible = "arm,pl330", "arm,primecell";
8810015Speter        reg = <0x12680000 0x1000>;
8910015Speter        interrupts = <99>;
9010015Speter        #dma-cells = <1>;
9110015Speter    };
9210015Speter...
9310015Speter