12116Sjkh# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
22574Sbde# Copyright 2019 Texas Instruments Incorporated
32116Sjkh%YAML 1.2
42116Sjkh---
52116Sjkh$id: http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#
62116Sjkh$schema: http://devicetree.org/meta-schemas/core.yaml#
72116Sjkh
82116Sjkhtitle: Texas Instruments K2G Display Subsystem
92116Sjkh
102116Sjkhmaintainers:
112116Sjkh  - Jyri Sarha <jsarha@ti.com>
122116Sjkh  - Tomi Valkeinen <tomi.valkeinen@ti.com>
132116Sjkh
142116Sjkhdescription: |
152116Sjkh  The K2G DSS is an ultra-light version of TI Keystone Display
162116Sjkh  SubSystem. It has only one output port and video plane. The
172116Sjkh  output is DPI.
182116Sjkh
192116Sjkhproperties:
202116Sjkh  compatible:
212116Sjkh    const: ti,k2g-dss
222116Sjkh
232116Sjkh  reg:
242116Sjkh    items:
252116Sjkh      - description: cfg DSS top level
262116Sjkh      - description: common DISPC common
272116Sjkh      - description: VID1 video plane 1
282116Sjkh      - description: OVR1 overlay manager for vp1
292116Sjkh      - description: VP1 video port 1
302116Sjkh
312116Sjkh  reg-names:
322116Sjkh    items:
332116Sjkh      - const: cfg
342116Sjkh      - const: common
352116Sjkh      - const: vid1
362116Sjkh      - const: ovr1
372116Sjkh      - const: vp1
382116Sjkh
392116Sjkh  clocks:
402116Sjkh    items:
412116Sjkh      - description: fck DSS functional clock
422116Sjkh      - description: vp1 Video Port 1 pixel clock
432116Sjkh
442116Sjkh  clock-names:
452116Sjkh    items:
462122Sjkh      - const: fck
472116Sjkh      - const: vp1
482116Sjkh
492116Sjkh  interrupts:
502116Sjkh    maxItems: 1
512116Sjkh
522116Sjkh  power-domains:
532116Sjkh    maxItems: 1
542116Sjkh    description: phandle to the associated power domain
552116Sjkh
562116Sjkh  port:
572116Sjkh    $ref: /schemas/graph.yaml#/properties/port
582116Sjkh    description:
592116Sjkh      The DSS DPI output port node
602116Sjkh
612116Sjkh  max-memory-bandwidth:
622116Sjkh    $ref: /schemas/types.yaml#/definitions/uint32
632116Sjkh    description:
642116Sjkh      Input memory (from main memory to dispc) bandwidth limit in
652116Sjkh      bytes per second
662116Sjkh
672116Sjkhrequired:
682116Sjkh  - compatible
692116Sjkh  - reg
702116Sjkh  - reg-names
712116Sjkh  - clocks
722116Sjkh  - clock-names
732116Sjkh  - interrupts
742116Sjkh  - port
752116Sjkh
762116SjkhadditionalProperties: false
772116Sjkh
782116Sjkhexamples:
792116Sjkh  - |
802116Sjkh    #include <dt-bindings/interrupt-controller/arm-gic.h>
812116Sjkh    #include <dt-bindings/interrupt-controller/irq.h>
822116Sjkh
832116Sjkh    dss: dss@2540000 {
842116Sjkh            compatible = "ti,k2g-dss";
852116Sjkh            reg =   <0x02540000 0x400>,
862116Sjkh                    <0x02550000 0x1000>,
872116Sjkh                    <0x02557000 0x1000>,
882116Sjkh                    <0x0255a800 0x100>,
892116Sjkh                    <0x0255ac00 0x100>;
902116Sjkh            reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
912116Sjkh            clocks =        <&k2g_clks 0x2 0>,
922116Sjkh                            <&k2g_clks 0x2 1>;
932116Sjkh            clock-names = "fck", "vp1";
942116Sjkh            interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
952116Sjkh
962116Sjkh            power-domains = <&k2g_pds 0x2>;
972116Sjkh
982116Sjkh            max-memory-bandwidth = <230000000>;
992116Sjkh
1002116Sjkh            port {
1012116Sjkh                    dpi_out: endpoint {
1022116Sjkh                            remote-endpoint = <&sii9022_in>;
1032116Sjkh                    };
1042116Sjkh            };
1052116Sjkh    };
1062116Sjkh