1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/mobileye,eyeq5-clk.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mobileye EyeQ5 clock controller
8
9description:
10  The EyeQ5 clock controller handles 10 read-only PLLs derived from the main
11  crystal clock. It also exposes one divider clock, a child of one of the PLLs.
12  Its registers live in a shared region called OLB.
13
14maintainers:
15  - Gr��gory Clement <gregory.clement@bootlin.com>
16  - Th��o Lebrun <theo.lebrun@bootlin.com>
17  - Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
18
19properties:
20  compatible:
21    const: mobileye,eyeq5-clk
22
23  reg:
24    maxItems: 2
25
26  reg-names:
27    items:
28      - const: plls
29      - const: ospi
30
31  "#clock-cells":
32    const: 1
33
34  clocks:
35    maxItems: 1
36    description:
37      Input parent clock to all PLLs. Expected to be the main crystal.
38
39  clock-names:
40    items:
41      - const: ref
42
43required:
44  - compatible
45  - reg
46  - reg-names
47  - "#clock-cells"
48  - clocks
49  - clock-names
50
51additionalProperties: false
52