1/*
2 * Copyright 2006-2018, Haiku, Inc. All Rights Reserved.
3 * Distributed under the terms of the MIT License.
4 *
5 * Authors:
6 *		Alexander von Gluck IV, kallisti5@unixzen.com
7 *		Adrien Destugues, pulkomandy@pulkomandy.tk
8 */
9
10#include "accelerant_protos.h"
11#include "accelerant.h"
12#include "intel_extreme.h"
13#include "pll.h"
14
15#include <stdio.h>
16#include <stdlib.h>
17
18struct accelerant_info* gInfo;
19
20const struct  test_device {
21	uint32 type;
22	const char* name;
23} kTestDevices[] = {
24	{INTEL_MODEL_915, "915"},
25	{INTEL_MODEL_945, "945"},
26	{INTEL_MODEL_965, "965"},
27	{INTEL_MODEL_G33, "G33"},
28	{INTEL_MODEL_G45, "G45"},
29	{INTEL_MODEL_PINE, "PineView"},
30	{INTEL_MODEL_ILKG, "IronLake"},
31	{INTEL_MODEL_SNBG, "SandyBridge"},
32	{INTEL_MODEL_IVBG, "IvyBridge"}
33};
34
35
36// This is a function from app_server which the accelerant calls, we need an
37// implementation so pll.cpp can link.
38extern "C" void spin(long long int) {
39}
40
41
42static void
43simulate_mode(display_mode* mode, int j)
44{
45	mode->timing.flags = 0;
46	if (j == 0)
47		mode->timing.pixel_clock = uint32(75.2 * 1000);
48	else
49		mode->timing.pixel_clock = uint32(146.25 * 1000);
50	mode->timing.h_display = 1366;
51	mode->timing.h_sync_start = 1414;
52	mode->timing.h_sync_end = 1478;
53	mode->timing.h_total = 1582;
54
55	mode->timing.v_display = 768;
56	mode->timing.v_sync_start = 772;
57	mode->timing.v_sync_end = 779;
58	mode->timing.v_total = 792;
59
60	mode->virtual_width = 1366;
61	mode->virtual_height = 768;
62}
63
64
65int
66main(void)
67{
68	// First we simulate our global card info structs
69	gInfo = (accelerant_info*)malloc(sizeof(accelerant_info));
70	if (gInfo == NULL) {
71		fprintf(stderr, "Unable to malloc artificial gInfo!\n");
72		return 1;
73	}
74
75	gInfo->shared_info = (intel_shared_info*)malloc(sizeof(intel_shared_info));
76	if (gInfo->shared_info == NULL) {
77		fprintf(stderr, "Unable to malloc shared_info!\n");
78		free(gInfo);
79		return 2;
80	}
81
82	for (uint32 index = 0; index < (sizeof(kTestDevices) / sizeof(test_device));
83		index++) {
84		gInfo->shared_info->device_type = kTestDevices[index].type;
85		fprintf(stderr, "=== %s (Generation %d)\n",  kTestDevices[index].name,
86			gInfo->shared_info->device_type.Generation());
87
88		if (gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_SER5)) {
89			printf("Is series 5\n");
90			gInfo->shared_info->pll_info.reference_frequency = 120000;
91			gInfo->shared_info->pll_info.max_frequency = 350000;
92			gInfo->shared_info->pll_info.min_frequency = 20000;
93			gInfo->shared_info->pch_info = INTEL_PCH_CPT;
94		} else if (gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_9xx)) {
95			printf("Is 9xx\n");
96			gInfo->shared_info->pll_info.reference_frequency = 96000;
97			gInfo->shared_info->pll_info.max_frequency = 400000;
98			gInfo->shared_info->pll_info.min_frequency = 20000;
99		} else {
100			printf("Is other\n");
101			gInfo->shared_info->pll_info.reference_frequency = 96000;
102			gInfo->shared_info->pll_info.max_frequency = 400000;
103			gInfo->shared_info->pll_info.min_frequency = 20000;
104		}
105
106		pll_divisors output;
107		for (uint32 j = 0; j < 2; j++) {
108			display_mode fakeMode;
109			simulate_mode(&fakeMode, j);
110			compute_pll_divisors(&fakeMode, &output, false);
111
112			printf("%d -> %d\n", fakeMode.timing.pixel_clock,
113				gInfo->shared_info->pll_info.reference_frequency * output.m
114					/ (output.n * output.p));
115		}
116	}
117
118	free(gInfo->shared_info);
119	free(gInfo);
120	return 0;
121}
122