1/*	$OpenBSD: if_rtwn.c,v 1.6 2015/08/28 00:03:53 deraadt Exp $	*/
2
3/*-
4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
5 * Copyright (c) 2015 Stefan Sperling <stsp@openbsd.org>
6 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
7 *
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 */
20
21#include <sys/cdefs.h>
22__FBSDID("$FreeBSD$");
23
24#include "opt_wlan.h"
25
26#include <sys/param.h>
27#include <sys/lock.h>
28#include <sys/mutex.h>
29#include <sys/mbuf.h>
30#include <sys/kernel.h>
31#include <sys/socket.h>
32#include <sys/systm.h>
33#include <sys/malloc.h>
34#include <sys/queue.h>
35#include <sys/taskqueue.h>
36#include <sys/bus.h>
37#include <sys/endian.h>
38#include <sys/linker.h>
39
40#include <machine/bus.h>
41#include <machine/resource.h>
42#include <sys/rman.h>
43
44#include <net/if.h>
45#include <net/ethernet.h>
46#include <net/if_media.h>
47
48#include <net80211/ieee80211_var.h>
49#include <net80211/ieee80211_radiotap.h>
50
51#include <dev/rtwn/if_rtwnreg.h>
52#include <dev/rtwn/if_rtwnvar.h>
53#include <dev/rtwn/if_rtwn_nop.h>
54
55#include <dev/rtwn/pci/rtwn_pci_var.h>
56
57#include <dev/rtwn/rtl8192c/r92c_var.h>
58
59#include <dev/rtwn/rtl8192c/pci/r92ce.h>
60#include <dev/rtwn/rtl8192c/pci/r92ce_priv.h>
61#include <dev/rtwn/rtl8192c/pci/r92ce_reg.h>
62#include <dev/rtwn/rtl8192c/pci/r92ce_tx_desc.h>
63
64static struct rtwn_r92c_txpwr r92c_txpwr;
65
66void	r92ce_attach(struct rtwn_pci_softc *);
67
68static void
69r92ce_postattach(struct rtwn_softc *sc)
70{
71	struct r92c_softc *rs = sc->sc_priv;
72	struct ieee80211com *ic = &sc->sc_ic;
73
74	if (!(rs->chip & R92C_CHIP_92C) &&
75	    rs->board_type == R92C_BOARD_TYPE_HIGHPA)
76		rs->rs_txagc = &rtl8188ru_txagc[0];
77	else
78		rs->rs_txagc = &rtl8192cu_txagc[0];
79
80	if ((rs->chip & (R92C_CHIP_UMC_A_CUT | R92C_CHIP_92C)) ==
81	    R92C_CHIP_UMC_A_CUT)
82		sc->fwname = "rtwn-rtl8192cfwE";
83	else
84		sc->fwname = "rtwn-rtl8192cfwE_B";
85	sc->fwsig = 0x88c;
86
87	rs->rs_scan_start = ic->ic_scan_start;
88	ic->ic_scan_start = r92c_scan_start;
89	rs->rs_scan_end = ic->ic_scan_end;
90	ic->ic_scan_end = r92c_scan_end;
91}
92
93static void
94r92ce_set_name(struct rtwn_softc *sc, uint8_t *buf)
95{
96	struct r92c_softc *rs = sc->sc_priv;
97
98	if (rs->chip & R92C_CHIP_92C)
99		sc->name = "RTL8192CE";
100	else
101		sc->name = "RTL8188CE";
102}
103
104static void
105r92ce_attach_private(struct rtwn_softc *sc)
106{
107	struct r92c_softc *rs;
108
109	rs = malloc(sizeof(struct r92c_softc), M_RTWN_PRIV, M_WAITOK | M_ZERO);
110
111	rs->rs_txpwr			= &r92c_txpwr;
112
113	rs->rs_set_bw20			= r92c_set_bw20;
114	rs->rs_get_txpower		= r92c_get_txpower;
115	rs->rs_set_gain			= r92c_set_gain;
116	rs->rs_tx_enable_ampdu		= r92c_tx_enable_ampdu;
117	rs->rs_tx_setup_hwseq		= r92c_tx_setup_hwseq;
118	rs->rs_tx_setup_macid		= r92c_tx_setup_macid;
119	rs->rs_set_rom_opts		= r92ce_set_name;
120
121	/* XXX TODO: test with net80211 ratectl! */
122#ifndef RTWN_WITHOUT_UCODE
123	rs->rs_c2h_timeout		= hz;
124
125	callout_init_mtx(&rs->rs_c2h_report, &sc->sc_mtx, 0);
126#endif
127
128	rs->rf_read_delay[0]		= 1000;
129	rs->rf_read_delay[1]		= 1000;
130	rs->rf_read_delay[2]		= 1000;
131
132	sc->sc_priv = rs;
133}
134
135static void
136r92ce_adj_devcaps(struct rtwn_softc *sc)
137{
138	struct ieee80211com *ic = &sc->sc_ic;
139
140	/*
141	 * XXX do NOT enable PMGT until RSVD_PAGE command
142	 * will not be tested / fixed + HRPWM register must be set too.
143	 */
144	ic->ic_caps &= ~IEEE80211_C_PMGT;
145}
146
147void
148r92ce_attach(struct rtwn_pci_softc *pc)
149{
150	struct rtwn_softc *sc		= &pc->pc_sc;
151
152	/* PCIe part. */
153	pc->pc_setup_tx_desc		= r92ce_setup_tx_desc;
154	pc->pc_tx_postsetup		= r92ce_tx_postsetup;
155	pc->pc_copy_tx_desc		= r92ce_copy_tx_desc;
156	pc->pc_enable_intr		= r92ce_enable_intr;
157	pc->pc_get_intr_status		= r92ce_get_intr_status;
158
159	pc->pc_qmap			= 0xf771;
160	pc->tcr				=
161	    R92C_TCR_CFENDFORM | (1 << 12) | (1 << 13);
162
163	/* Common part. */
164	/* RTL8192C* cannot use pairwise keys from first 4 slots */
165	sc->sc_flags			= RTWN_FLAG_CAM_FIXED;
166
167	sc->sc_start_xfers		= r92ce_start_xfers;
168	sc->sc_set_chan			= r92c_set_chan;
169	sc->sc_fill_tx_desc		= r92c_fill_tx_desc;
170	sc->sc_fill_tx_desc_raw		= r92c_fill_tx_desc_raw;
171	sc->sc_fill_tx_desc_null	= r92c_fill_tx_desc_null; /* XXX recheck */
172	sc->sc_dump_tx_desc		= r92ce_dump_tx_desc;
173	sc->sc_tx_radiotap_flags	= r92c_tx_radiotap_flags;
174	sc->sc_rx_radiotap_flags	= r92c_rx_radiotap_flags;
175	sc->sc_get_rx_stats		= r92c_get_rx_stats;
176	sc->sc_get_rssi_cck		= r92c_get_rssi_cck;
177	sc->sc_get_rssi_ofdm		= r92c_get_rssi_ofdm;
178	sc->sc_classify_intr		= r92c_classify_intr;
179	sc->sc_handle_tx_report		= rtwn_nop_softc_uint8_int;
180	sc->sc_handle_c2h_report	= rtwn_nop_softc_uint8_int;
181	sc->sc_check_frame		= rtwn_nop_int_softc_mbuf;
182	sc->sc_rf_read			= r92c_rf_read;
183	sc->sc_rf_write			= r92c_rf_write;
184	sc->sc_check_condition		= r92c_check_condition;
185	sc->sc_efuse_postread		= r92c_efuse_postread;
186	sc->sc_parse_rom		= r92c_parse_rom;
187	sc->sc_set_led			= r92ce_set_led;
188	sc->sc_power_on			= r92ce_power_on;
189	sc->sc_power_off		= r92ce_power_off;
190#ifndef RTWN_WITHOUT_UCODE
191	sc->sc_fw_reset			= r92ce_fw_reset;
192	sc->sc_fw_download_enable	= r92c_fw_download_enable;
193#endif
194	sc->sc_llt_init			= r92c_llt_init;
195	sc->sc_set_page_size		= r92c_set_page_size;
196	sc->sc_lc_calib			= r92c_lc_calib;
197	sc->sc_iq_calib			= r92ce_iq_calib;
198	sc->sc_read_chipid_vendor	= r92c_read_chipid_vendor;
199	sc->sc_adj_devcaps		= r92ce_adj_devcaps;
200	sc->sc_vap_preattach		= rtwn_nop_softc_vap;
201	sc->sc_postattach		= r92ce_postattach;
202	sc->sc_detach_private		= r92c_detach_private;
203	sc->sc_set_media_status		= r92c_joinbss_rpt;
204#ifndef RTWN_WITHOUT_UCODE
205	sc->sc_set_rsvd_page		= r92c_set_rsvd_page;
206	sc->sc_set_pwrmode		= r92c_set_pwrmode;
207	sc->sc_set_rssi			= r92c_set_rssi;
208#endif
209	sc->sc_beacon_init		= r92c_beacon_init;
210	sc->sc_beacon_enable		= r92c_beacon_enable;
211	sc->sc_beacon_set_rate		= rtwn_nop_void_int;
212	sc->sc_beacon_select		= rtwn_nop_softc_int;
213	sc->sc_temp_measure		= r92c_temp_measure;
214	sc->sc_temp_read		= r92c_temp_read;
215	sc->sc_init_tx_agg		= rtwn_nop_softc;
216	sc->sc_init_rx_agg		= rtwn_nop_softc;
217	sc->sc_init_ampdu		= r92ce_init_ampdu;
218	sc->sc_init_intr		= r92ce_init_intr;
219	sc->sc_init_edca		= r92ce_init_edca;
220	sc->sc_init_bb			= r92ce_init_bb;
221	sc->sc_init_rf			= r92c_init_rf;
222	sc->sc_init_antsel		= rtwn_nop_softc;
223	sc->sc_post_init		= r92ce_post_init;
224	sc->sc_init_bcnq1_boundary	= rtwn_nop_int_softc;
225
226	sc->mac_prog			= &rtl8192ce_mac[0];
227	sc->mac_size			= nitems(rtl8192ce_mac);
228	sc->bb_prog			= &rtl8192ce_bb[0];
229	sc->bb_size			= nitems(rtl8192ce_bb);
230	sc->agc_prog			= &rtl8192ce_agc[0];
231	sc->agc_size			= nitems(rtl8192ce_agc);
232	sc->rf_prog			= &rtl8192c_rf[0];
233
234	sc->page_count			= R92CE_TX_PAGE_COUNT;
235	sc->pktbuf_count		= R92C_TXPKTBUF_COUNT;
236
237	sc->ackto			= 0x40;
238	sc->npubqpages			= R92CE_PUBQ_NPAGES;
239	sc->nhqpages			= R92CE_HPQ_NPAGES;
240	sc->nnqpages			= 0;
241	sc->nlqpages			= R92CE_LPQ_NPAGES;
242	sc->page_size			= R92C_TX_PAGE_SIZE;
243
244	sc->txdesc_len			= sizeof(struct r92ce_tx_desc);
245	sc->efuse_maxlen		= R92C_EFUSE_MAX_LEN;
246	sc->efuse_maplen		= R92C_EFUSE_MAP_LEN;
247	sc->rx_dma_size			= R92C_RX_DMA_BUFFER_SIZE;
248
249	sc->macid_limit			= R92C_MACID_MAX + 1;
250	sc->cam_entry_limit		= R92C_CAM_ENTRY_COUNT;
251	sc->fwsize_limit		= R92C_MAX_FW_SIZE;
252	sc->temp_delta			= R92C_CALIB_THRESHOLD;
253
254	sc->bcn_status_reg[0]		= R92C_TDECTRL;
255	/*
256	 * TODO: some additional setup is required
257	 * to maintain few beacons at the same time.
258	 *
259	 * XXX BCNQ1 mechanism is not needed here; move it to the USB module.
260	 */
261	sc->bcn_status_reg[1]		= R92C_TDECTRL;
262	sc->rcr				= 0;
263
264	r92ce_attach_private(sc);
265}
266